test/Transforms/NaCl/vector-canonicalization-binops.ll - Issue 1423873002: PNaCl: Add a vector type legalization pass.

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Issue 1423873002: PNaCl: Add a vector type legalization pass. Base URL: https://chromium.googlesource.com/native_client/pnacl-llvm.git@master

Patch Set: Created 5 years, 1 month ago

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	1 ; RUN: opt -S -pnacl-vector-canonicalization %s \| FileCheck %s

	2

	3 ; Auto-generated tests for all binary operations.

	4

	5 target datalayout = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64 :64:64-p:32:32:32-v128:32:128"

	6

	7 define <2 x float> @fadd_binop_2xfloat(<2 x float>, <2 x float>) {

	8 %3 = fadd <2 x float> %0, %1

	9 ret <2 x float> %3

	10 }

	11 ; CHECK-LABEL: define <4 x float> @fadd_binop_2xfloat(<4 x float>, <4 x float>)

	12 ; CHECK-NEXT: %3 = fadd <4 x float> %0, %1

	13 ; CHECK-NEXT: ret <4 x float> %3

	14

	15 define <2 x float> @fadd_binop_2xfloat_fast(<2 x float>, <2 x float>) {

	16 %3 = fadd fast <2 x float> %0, %1

	17 ret <2 x float> %3

	18 }

	19 ; CHECK-LABEL: define <4 x float> @fadd_binop_2xfloat_fast(<4 x float>, <4 x flo at>)

	20 ; CHECK-NEXT: %3 = fadd fast <4 x float> %0, %1

	21 ; CHECK-NEXT: ret <4 x float> %3

	22

	23 define <2 x double> @fadd_binop_2xdouble(<2 x double>, <2 x double>) {

	24 %3 = fadd <2 x double> %0, %1

	25 ret <2 x double> %3

	26 }

	27 ; CHECK-LABEL: define <2 x double> @fadd_binop_2xdouble(<2 x double>, <2 x doubl e>)

	28 ; CHECK-NEXT: %3 = fadd <2 x double> %0, %1

	29 ; CHECK-NEXT: ret <2 x double> %3

	30

	31 define <2 x double> @fadd_binop_2xdouble_fast(<2 x double>, <2 x double>) {

	32 %3 = fadd fast <2 x double> %0, %1

	33 ret <2 x double> %3

	34 }

	35 ; CHECK-LABEL: define <2 x double> @fadd_binop_2xdouble_fast(<2 x double>, <2 x double>)

	36 ; CHECK-NEXT: %3 = fadd fast <2 x double> %0, %1

	37 ; CHECK-NEXT: ret <2 x double> %3

	38

	39 define <2 x float> @fsub_binop_2xfloat(<2 x float>, <2 x float>) {

	40 %3 = fsub <2 x float> %0, %1

	41 ret <2 x float> %3

	42 }

	43 ; CHECK-LABEL: define <4 x float> @fsub_binop_2xfloat(<4 x float>, <4 x float>)

	44 ; CHECK-NEXT: %3 = fsub <4 x float> %0, %1

	45 ; CHECK-NEXT: ret <4 x float> %3

	46

	47 define <2 x float> @fsub_binop_2xfloat_fast(<2 x float>, <2 x float>) {

	48 %3 = fsub fast <2 x float> %0, %1

	49 ret <2 x float> %3

	50 }

	51 ; CHECK-LABEL: define <4 x float> @fsub_binop_2xfloat_fast(<4 x float>, <4 x flo at>)

	52 ; CHECK-NEXT: %3 = fsub fast <4 x float> %0, %1

	53 ; CHECK-NEXT: ret <4 x float> %3

	54

	55 define <2 x double> @fsub_binop_2xdouble(<2 x double>, <2 x double>) {

	56 %3 = fsub <2 x double> %0, %1

	57 ret <2 x double> %3

	58 }

	59 ; CHECK-LABEL: define <2 x double> @fsub_binop_2xdouble(<2 x double>, <2 x doubl e>)

	60 ; CHECK-NEXT: %3 = fsub <2 x double> %0, %1

	61 ; CHECK-NEXT: ret <2 x double> %3

	62

	63 define <2 x double> @fsub_binop_2xdouble_fast(<2 x double>, <2 x double>) {

	64 %3 = fsub fast <2 x double> %0, %1

	65 ret <2 x double> %3

	66 }

	67 ; CHECK-LABEL: define <2 x double> @fsub_binop_2xdouble_fast(<2 x double>, <2 x double>)

	68 ; CHECK-NEXT: %3 = fsub fast <2 x double> %0, %1

	69 ; CHECK-NEXT: ret <2 x double> %3

	70

	71 define <2 x float> @fmul_binop_2xfloat(<2 x float>, <2 x float>) {

	72 %3 = fmul <2 x float> %0, %1

	73 ret <2 x float> %3

	74 }

	75 ; CHECK-LABEL: define <4 x float> @fmul_binop_2xfloat(<4 x float>, <4 x float>)

	76 ; CHECK-NEXT: %3 = fmul <4 x float> %0, %1

	77 ; CHECK-NEXT: ret <4 x float> %3

	78

	79 define <2 x float> @fmul_binop_2xfloat_fast(<2 x float>, <2 x float>) {

	80 %3 = fmul fast <2 x float> %0, %1

	81 ret <2 x float> %3

	82 }

	83 ; CHECK-LABEL: define <4 x float> @fmul_binop_2xfloat_fast(<4 x float>, <4 x flo at>)

	84 ; CHECK-NEXT: %3 = fmul fast <4 x float> %0, %1

	85 ; CHECK-NEXT: ret <4 x float> %3

	86

	87 define <2 x double> @fmul_binop_2xdouble(<2 x double>, <2 x double>) {

	88 %3 = fmul <2 x double> %0, %1

	89 ret <2 x double> %3

	90 }

	91 ; CHECK-LABEL: define <2 x double> @fmul_binop_2xdouble(<2 x double>, <2 x doubl e>)

	92 ; CHECK-NEXT: %3 = fmul <2 x double> %0, %1

	93 ; CHECK-NEXT: ret <2 x double> %3

	94

	95 define <2 x double> @fmul_binop_2xdouble_fast(<2 x double>, <2 x double>) {

	96 %3 = fmul fast <2 x double> %0, %1

	97 ret <2 x double> %3

	98 }

	99 ; CHECK-LABEL: define <2 x double> @fmul_binop_2xdouble_fast(<2 x double>, <2 x double>)

	100 ; CHECK-NEXT: %3 = fmul fast <2 x double> %0, %1

	101 ; CHECK-NEXT: ret <2 x double> %3

	102

	103 define <2 x float> @fdiv_binop_2xfloat(<2 x float>, <2 x float>) {

	104 %3 = fdiv <2 x float> %0, %1

	105 ret <2 x float> %3

	106 }

	107 ; CHECK-LABEL: define <4 x float> @fdiv_binop_2xfloat(<4 x float>, <4 x float>)

	108 ; CHECK-NEXT: %3 = fdiv <4 x float> %0, %1

	109 ; CHECK-NEXT: ret <4 x float> %3

	110

	111 define <2 x float> @fdiv_binop_2xfloat_fast(<2 x float>, <2 x float>) {

	112 %3 = fdiv fast <2 x float> %0, %1

	113 ret <2 x float> %3

	114 }

	115 ; CHECK-LABEL: define <4 x float> @fdiv_binop_2xfloat_fast(<4 x float>, <4 x flo at>)

	116 ; CHECK-NEXT: %3 = fdiv fast <4 x float> %0, %1

	117 ; CHECK-NEXT: ret <4 x float> %3

	118

	119 define <2 x double> @fdiv_binop_2xdouble(<2 x double>, <2 x double>) {

	120 %3 = fdiv <2 x double> %0, %1

	121 ret <2 x double> %3

	122 }

	123 ; CHECK-LABEL: define <2 x double> @fdiv_binop_2xdouble(<2 x double>, <2 x doubl e>)

	124 ; CHECK-NEXT: %3 = fdiv <2 x double> %0, %1

	125 ; CHECK-NEXT: ret <2 x double> %3

	126

	127 define <2 x double> @fdiv_binop_2xdouble_fast(<2 x double>, <2 x double>) {

	128 %3 = fdiv fast <2 x double> %0, %1

	129 ret <2 x double> %3

	130 }

	131 ; CHECK-LABEL: define <2 x double> @fdiv_binop_2xdouble_fast(<2 x double>, <2 x double>)

	132 ; CHECK-NEXT: %3 = fdiv fast <2 x double> %0, %1

	133 ; CHECK-NEXT: ret <2 x double> %3

	134

	135 define <2 x float> @frem_binop_2xfloat(<2 x float>, <2 x float>) {

	136 %3 = frem <2 x float> %0, %1

	137 ret <2 x float> %3

	138 }

	139 ; CHECK-LABEL: define <4 x float> @frem_binop_2xfloat(<4 x float>, <4 x float>)

	140 ; CHECK-NEXT: %3 = frem <4 x float> %0, %1

	141 ; CHECK-NEXT: ret <4 x float> %3

	142

	143 define <2 x float> @frem_binop_2xfloat_fast(<2 x float>, <2 x float>) {

	144 %3 = frem fast <2 x float> %0, %1

	145 ret <2 x float> %3

	146 }

	147 ; CHECK-LABEL: define <4 x float> @frem_binop_2xfloat_fast(<4 x float>, <4 x flo at>)

	148 ; CHECK-NEXT: %3 = frem fast <4 x float> %0, %1

	149 ; CHECK-NEXT: ret <4 x float> %3

	150

	151 define <2 x double> @frem_binop_2xdouble(<2 x double>, <2 x double>) {

	152 %3 = frem <2 x double> %0, %1

	153 ret <2 x double> %3

	154 }

	155 ; CHECK-LABEL: define <2 x double> @frem_binop_2xdouble(<2 x double>, <2 x doubl e>)

	156 ; CHECK-NEXT: %3 = frem <2 x double> %0, %1

	157 ; CHECK-NEXT: ret <2 x double> %3

	158

	159 define <2 x double> @frem_binop_2xdouble_fast(<2 x double>, <2 x double>) {

	160 %3 = frem fast <2 x double> %0, %1

	161 ret <2 x double> %3

	162 }

	163 ; CHECK-LABEL: define <2 x double> @frem_binop_2xdouble_fast(<2 x double>, <2 x double>)

	164 ; CHECK-NEXT: %3 = frem fast <2 x double> %0, %1

	165 ; CHECK-NEXT: ret <2 x double> %3

	166

	167 define <4 x float> @fadd_binop_4xfloat(<4 x float>, <4 x float>) {

	168 %3 = fadd <4 x float> %0, %1

	169 ret <4 x float> %3

	170 }

	171 ; CHECK-LABEL: define <4 x float> @fadd_binop_4xfloat(<4 x float>, <4 x float>)

	172 ; CHECK-NEXT: %3 = fadd <4 x float> %0, %1

	173 ; CHECK-NEXT: ret <4 x float> %3

	174

	175 define <4 x float> @fadd_binop_4xfloat_fast(<4 x float>, <4 x float>) {

	176 %3 = fadd fast <4 x float> %0, %1

	177 ret <4 x float> %3

	178 }

	179 ; CHECK-LABEL: define <4 x float> @fadd_binop_4xfloat_fast(<4 x float>, <4 x flo at>)

	180 ; CHECK-NEXT: %3 = fadd fast <4 x float> %0, %1

	181 ; CHECK-NEXT: ret <4 x float> %3

	182

	183 define <4 x double> @fadd_binop_4xdouble(<4 x double>, <4 x double>) {

	184 %3 = fadd <4 x double> %0, %1

	185 ret <4 x double> %3

	186 }

	187 ; CHECK-LABEL: define <2 x double> @fadd_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>)

	188 ; CHECK-NEXT: %6 = fadd <2 x double> %1, %3

	189 ; CHECK-NEXT: %7 = fadd <2 x double> %2, %4

	190 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	191 ; CHECK-NEXT: ret <2 x double> %6

	192

	193 define <4 x double> @fadd_binop_4xdouble_fast(<4 x double>, <4 x double>) {

	194 %3 = fadd fast <4 x double> %0, %1

	195 ret <4 x double> %3

	196 }

	197 ; CHECK-LABEL: define <2 x double> @fadd_binop_4xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	198 ; CHECK-NEXT: %6 = fadd fast <2 x double> %1, %3

	199 ; CHECK-NEXT: %7 = fadd fast <2 x double> %2, %4

	200 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	201 ; CHECK-NEXT: ret <2 x double> %6

	202

	203 define <4 x float> @fsub_binop_4xfloat(<4 x float>, <4 x float>) {

	204 %3 = fsub <4 x float> %0, %1

	205 ret <4 x float> %3

	206 }

	207 ; CHECK-LABEL: define <4 x float> @fsub_binop_4xfloat(<4 x float>, <4 x float>)

	208 ; CHECK-NEXT: %3 = fsub <4 x float> %0, %1

	209 ; CHECK-NEXT: ret <4 x float> %3

	210

	211 define <4 x float> @fsub_binop_4xfloat_fast(<4 x float>, <4 x float>) {

	212 %3 = fsub fast <4 x float> %0, %1

	213 ret <4 x float> %3

	214 }

	215 ; CHECK-LABEL: define <4 x float> @fsub_binop_4xfloat_fast(<4 x float>, <4 x flo at>)

	216 ; CHECK-NEXT: %3 = fsub fast <4 x float> %0, %1

	217 ; CHECK-NEXT: ret <4 x float> %3

	218

	219 define <4 x double> @fsub_binop_4xdouble(<4 x double>, <4 x double>) {

	220 %3 = fsub <4 x double> %0, %1

	221 ret <4 x double> %3

	222 }

	223 ; CHECK-LABEL: define <2 x double> @fsub_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>)

	224 ; CHECK-NEXT: %6 = fsub <2 x double> %1, %3

	225 ; CHECK-NEXT: %7 = fsub <2 x double> %2, %4

	226 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	227 ; CHECK-NEXT: ret <2 x double> %6

	228

	229 define <4 x double> @fsub_binop_4xdouble_fast(<4 x double>, <4 x double>) {

	230 %3 = fsub fast <4 x double> %0, %1

	231 ret <4 x double> %3

	232 }

	233 ; CHECK-LABEL: define <2 x double> @fsub_binop_4xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	234 ; CHECK-NEXT: %6 = fsub fast <2 x double> %1, %3

	235 ; CHECK-NEXT: %7 = fsub fast <2 x double> %2, %4

	236 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	237 ; CHECK-NEXT: ret <2 x double> %6

	238

	239 define <4 x float> @fmul_binop_4xfloat(<4 x float>, <4 x float>) {

	240 %3 = fmul <4 x float> %0, %1

	241 ret <4 x float> %3

	242 }

	243 ; CHECK-LABEL: define <4 x float> @fmul_binop_4xfloat(<4 x float>, <4 x float>)

	244 ; CHECK-NEXT: %3 = fmul <4 x float> %0, %1

	245 ; CHECK-NEXT: ret <4 x float> %3

	246

	247 define <4 x float> @fmul_binop_4xfloat_fast(<4 x float>, <4 x float>) {

	248 %3 = fmul fast <4 x float> %0, %1

	249 ret <4 x float> %3

	250 }

	251 ; CHECK-LABEL: define <4 x float> @fmul_binop_4xfloat_fast(<4 x float>, <4 x flo at>)

	252 ; CHECK-NEXT: %3 = fmul fast <4 x float> %0, %1

	253 ; CHECK-NEXT: ret <4 x float> %3

	254

	255 define <4 x double> @fmul_binop_4xdouble(<4 x double>, <4 x double>) {

	256 %3 = fmul <4 x double> %0, %1

	257 ret <4 x double> %3

	258 }

	259 ; CHECK-LABEL: define <2 x double> @fmul_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>)

	260 ; CHECK-NEXT: %6 = fmul <2 x double> %1, %3

	261 ; CHECK-NEXT: %7 = fmul <2 x double> %2, %4

	262 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	263 ; CHECK-NEXT: ret <2 x double> %6

	264

	265 define <4 x double> @fmul_binop_4xdouble_fast(<4 x double>, <4 x double>) {

	266 %3 = fmul fast <4 x double> %0, %1

	267 ret <4 x double> %3

	268 }

	269 ; CHECK-LABEL: define <2 x double> @fmul_binop_4xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	270 ; CHECK-NEXT: %6 = fmul fast <2 x double> %1, %3

	271 ; CHECK-NEXT: %7 = fmul fast <2 x double> %2, %4

	272 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	273 ; CHECK-NEXT: ret <2 x double> %6

	274

	275 define <4 x float> @fdiv_binop_4xfloat(<4 x float>, <4 x float>) {

	276 %3 = fdiv <4 x float> %0, %1

	277 ret <4 x float> %3

	278 }

	279 ; CHECK-LABEL: define <4 x float> @fdiv_binop_4xfloat(<4 x float>, <4 x float>)

	280 ; CHECK-NEXT: %3 = fdiv <4 x float> %0, %1

	281 ; CHECK-NEXT: ret <4 x float> %3

	282

	283 define <4 x float> @fdiv_binop_4xfloat_fast(<4 x float>, <4 x float>) {

	284 %3 = fdiv fast <4 x float> %0, %1

	285 ret <4 x float> %3

	286 }

	287 ; CHECK-LABEL: define <4 x float> @fdiv_binop_4xfloat_fast(<4 x float>, <4 x flo at>)

	288 ; CHECK-NEXT: %3 = fdiv fast <4 x float> %0, %1

	289 ; CHECK-NEXT: ret <4 x float> %3

	290

	291 define <4 x double> @fdiv_binop_4xdouble(<4 x double>, <4 x double>) {

	292 %3 = fdiv <4 x double> %0, %1

	293 ret <4 x double> %3

	294 }

	295 ; CHECK-LABEL: define <2 x double> @fdiv_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>)

	296 ; CHECK-NEXT: %6 = fdiv <2 x double> %1, %3

	297 ; CHECK-NEXT: %7 = fdiv <2 x double> %2, %4

	298 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	299 ; CHECK-NEXT: ret <2 x double> %6

	300

	301 define <4 x double> @fdiv_binop_4xdouble_fast(<4 x double>, <4 x double>) {

	302 %3 = fdiv fast <4 x double> %0, %1

	303 ret <4 x double> %3

	304 }

	305 ; CHECK-LABEL: define <2 x double> @fdiv_binop_4xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	306 ; CHECK-NEXT: %6 = fdiv fast <2 x double> %1, %3

	307 ; CHECK-NEXT: %7 = fdiv fast <2 x double> %2, %4

	308 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	309 ; CHECK-NEXT: ret <2 x double> %6

	310

	311 define <4 x float> @frem_binop_4xfloat(<4 x float>, <4 x float>) {

	312 %3 = frem <4 x float> %0, %1

	313 ret <4 x float> %3

	314 }

	315 ; CHECK-LABEL: define <4 x float> @frem_binop_4xfloat(<4 x float>, <4 x float>)

	316 ; CHECK-NEXT: %3 = frem <4 x float> %0, %1

	317 ; CHECK-NEXT: ret <4 x float> %3

	318

	319 define <4 x float> @frem_binop_4xfloat_fast(<4 x float>, <4 x float>) {

	320 %3 = frem fast <4 x float> %0, %1

	321 ret <4 x float> %3

	322 }

	323 ; CHECK-LABEL: define <4 x float> @frem_binop_4xfloat_fast(<4 x float>, <4 x flo at>)

	324 ; CHECK-NEXT: %3 = frem fast <4 x float> %0, %1

	325 ; CHECK-NEXT: ret <4 x float> %3

	326

	327 define <4 x double> @frem_binop_4xdouble(<4 x double>, <4 x double>) {

	328 %3 = frem <4 x double> %0, %1

	329 ret <4 x double> %3

	330 }

	331 ; CHECK-LABEL: define <2 x double> @frem_binop_4xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doub le>)

	332 ; CHECK-NEXT: %6 = frem <2 x double> %1, %3

	333 ; CHECK-NEXT: %7 = frem <2 x double> %2, %4

	334 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	335 ; CHECK-NEXT: ret <2 x double> %6

	336

	337 define <4 x double> @frem_binop_4xdouble_fast(<4 x double>, <4 x double>) {

	338 %3 = frem fast <4 x double> %0, %1

	339 ret <4 x double> %3

	340 }

	341 ; CHECK-LABEL: define <2 x double> @frem_binop_4xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	342 ; CHECK-NEXT: %6 = frem fast <2 x double> %1, %3

	343 ; CHECK-NEXT: %7 = frem fast <2 x double> %2, %4

	344 ; CHECK-NEXT: store <2 x double> %7, <2 x double>* %0, align 16

	345 ; CHECK-NEXT: ret <2 x double> %6

	346

	347 define <6 x float> @fadd_binop_6xfloat(<6 x float>, <6 x float>) {

	348 %3 = fadd <6 x float> %0, %1

	349 ret <6 x float> %3

	350 }

	351 ; CHECK-LABEL: define <4 x float> @fadd_binop_6xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	352 ; CHECK-NEXT: %6 = fadd <4 x float> %1, %3

	353 ; CHECK-NEXT: %7 = fadd <4 x float> %2, %4

	354 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	355 ; CHECK-NEXT: ret <4 x float> %6

	356

	357 define <6 x float> @fadd_binop_6xfloat_fast(<6 x float>, <6 x float>) {

	358 %3 = fadd fast <6 x float> %0, %1

	359 ret <6 x float> %3

	360 }

	361 ; CHECK-LABEL: define <4 x float> @fadd_binop_6xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	362 ; CHECK-NEXT: %6 = fadd fast <4 x float> %1, %3

	363 ; CHECK-NEXT: %7 = fadd fast <4 x float> %2, %4

	364 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	365 ; CHECK-NEXT: ret <4 x float> %6

	366

	367 define <6 x double> @fadd_binop_6xdouble(<6 x double>, <6 x double>) {

	368 %3 = fadd <6 x double> %0, %1

	369 ret <6 x double> %3

	370 }

	371 ; CHECK-LABEL: define <2 x double> @fadd_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>)

	372 ; CHECK-NEXT: %9 = fadd <2 x double> %2, %5

	373 ; CHECK-NEXT: %10 = fadd <2 x double> %3, %6

	374 ; CHECK-NEXT: %11 = fadd <2 x double> %4, %7

	375 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	376 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	377 ; CHECK-NEXT: ret <2 x double> %9

	378

	379 define <6 x double> @fadd_binop_6xdouble_fast(<6 x double>, <6 x double>) {

	380 %3 = fadd fast <6 x double> %0, %1

	381 ret <6 x double> %3

	382 }

	383 ; CHECK-LABEL: define <2 x double> @fadd_binop_6xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	384 ; CHECK-NEXT: %9 = fadd fast <2 x double> %2, %5

	385 ; CHECK-NEXT: %10 = fadd fast <2 x double> %3, %6

	386 ; CHECK-NEXT: %11 = fadd fast <2 x double> %4, %7

	387 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	388 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	389 ; CHECK-NEXT: ret <2 x double> %9

	390

	391 define <6 x float> @fsub_binop_6xfloat(<6 x float>, <6 x float>) {

	392 %3 = fsub <6 x float> %0, %1

	393 ret <6 x float> %3

	394 }

	395 ; CHECK-LABEL: define <4 x float> @fsub_binop_6xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	396 ; CHECK-NEXT: %6 = fsub <4 x float> %1, %3

	397 ; CHECK-NEXT: %7 = fsub <4 x float> %2, %4

	398 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	399 ; CHECK-NEXT: ret <4 x float> %6

	400

	401 define <6 x float> @fsub_binop_6xfloat_fast(<6 x float>, <6 x float>) {

	402 %3 = fsub fast <6 x float> %0, %1

	403 ret <6 x float> %3

	404 }

	405 ; CHECK-LABEL: define <4 x float> @fsub_binop_6xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	406 ; CHECK-NEXT: %6 = fsub fast <4 x float> %1, %3

	407 ; CHECK-NEXT: %7 = fsub fast <4 x float> %2, %4

	408 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	409 ; CHECK-NEXT: ret <4 x float> %6

	410

	411 define <6 x double> @fsub_binop_6xdouble(<6 x double>, <6 x double>) {

	412 %3 = fsub <6 x double> %0, %1

	413 ret <6 x double> %3

	414 }

	415 ; CHECK-LABEL: define <2 x double> @fsub_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>)

	416 ; CHECK-NEXT: %9 = fsub <2 x double> %2, %5

	417 ; CHECK-NEXT: %10 = fsub <2 x double> %3, %6

	418 ; CHECK-NEXT: %11 = fsub <2 x double> %4, %7

	419 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	420 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	421 ; CHECK-NEXT: ret <2 x double> %9

	422

	423 define <6 x double> @fsub_binop_6xdouble_fast(<6 x double>, <6 x double>) {

	424 %3 = fsub fast <6 x double> %0, %1

	425 ret <6 x double> %3

	426 }

	427 ; CHECK-LABEL: define <2 x double> @fsub_binop_6xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	428 ; CHECK-NEXT: %9 = fsub fast <2 x double> %2, %5

	429 ; CHECK-NEXT: %10 = fsub fast <2 x double> %3, %6

	430 ; CHECK-NEXT: %11 = fsub fast <2 x double> %4, %7

	431 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	432 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	433 ; CHECK-NEXT: ret <2 x double> %9

	434

	435 define <6 x float> @fmul_binop_6xfloat(<6 x float>, <6 x float>) {

	436 %3 = fmul <6 x float> %0, %1

	437 ret <6 x float> %3

	438 }

	439 ; CHECK-LABEL: define <4 x float> @fmul_binop_6xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	440 ; CHECK-NEXT: %6 = fmul <4 x float> %1, %3

	441 ; CHECK-NEXT: %7 = fmul <4 x float> %2, %4

	442 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	443 ; CHECK-NEXT: ret <4 x float> %6

	444

	445 define <6 x float> @fmul_binop_6xfloat_fast(<6 x float>, <6 x float>) {

	446 %3 = fmul fast <6 x float> %0, %1

	447 ret <6 x float> %3

	448 }

	449 ; CHECK-LABEL: define <4 x float> @fmul_binop_6xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	450 ; CHECK-NEXT: %6 = fmul fast <4 x float> %1, %3

	451 ; CHECK-NEXT: %7 = fmul fast <4 x float> %2, %4

	452 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	453 ; CHECK-NEXT: ret <4 x float> %6

	454

	455 define <6 x double> @fmul_binop_6xdouble(<6 x double>, <6 x double>) {

	456 %3 = fmul <6 x double> %0, %1

	457 ret <6 x double> %3

	458 }

	459 ; CHECK-LABEL: define <2 x double> @fmul_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>)

	460 ; CHECK-NEXT: %9 = fmul <2 x double> %2, %5

	461 ; CHECK-NEXT: %10 = fmul <2 x double> %3, %6

	462 ; CHECK-NEXT: %11 = fmul <2 x double> %4, %7

	463 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	464 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	465 ; CHECK-NEXT: ret <2 x double> %9

	466

	467 define <6 x double> @fmul_binop_6xdouble_fast(<6 x double>, <6 x double>) {

	468 %3 = fmul fast <6 x double> %0, %1

	469 ret <6 x double> %3

	470 }

	471 ; CHECK-LABEL: define <2 x double> @fmul_binop_6xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	472 ; CHECK-NEXT: %9 = fmul fast <2 x double> %2, %5

	473 ; CHECK-NEXT: %10 = fmul fast <2 x double> %3, %6

	474 ; CHECK-NEXT: %11 = fmul fast <2 x double> %4, %7

	475 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	476 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	477 ; CHECK-NEXT: ret <2 x double> %9

	478

	479 define <6 x float> @fdiv_binop_6xfloat(<6 x float>, <6 x float>) {

	480 %3 = fdiv <6 x float> %0, %1

	481 ret <6 x float> %3

	482 }

	483 ; CHECK-LABEL: define <4 x float> @fdiv_binop_6xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	484 ; CHECK-NEXT: %6 = fdiv <4 x float> %1, %3

	485 ; CHECK-NEXT: %7 = fdiv <4 x float> %2, %4

	486 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	487 ; CHECK-NEXT: ret <4 x float> %6

	488

	489 define <6 x float> @fdiv_binop_6xfloat_fast(<6 x float>, <6 x float>) {

	490 %3 = fdiv fast <6 x float> %0, %1

	491 ret <6 x float> %3

	492 }

	493 ; CHECK-LABEL: define <4 x float> @fdiv_binop_6xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	494 ; CHECK-NEXT: %6 = fdiv fast <4 x float> %1, %3

	495 ; CHECK-NEXT: %7 = fdiv fast <4 x float> %2, %4

	496 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	497 ; CHECK-NEXT: ret <4 x float> %6

	498

	499 define <6 x double> @fdiv_binop_6xdouble(<6 x double>, <6 x double>) {

	500 %3 = fdiv <6 x double> %0, %1

	501 ret <6 x double> %3

	502 }

	503 ; CHECK-LABEL: define <2 x double> @fdiv_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>)

	504 ; CHECK-NEXT: %9 = fdiv <2 x double> %2, %5

	505 ; CHECK-NEXT: %10 = fdiv <2 x double> %3, %6

	506 ; CHECK-NEXT: %11 = fdiv <2 x double> %4, %7

	507 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	508 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	509 ; CHECK-NEXT: ret <2 x double> %9

	510

	511 define <6 x double> @fdiv_binop_6xdouble_fast(<6 x double>, <6 x double>) {

	512 %3 = fdiv fast <6 x double> %0, %1

	513 ret <6 x double> %3

	514 }

	515 ; CHECK-LABEL: define <2 x double> @fdiv_binop_6xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	516 ; CHECK-NEXT: %9 = fdiv fast <2 x double> %2, %5

	517 ; CHECK-NEXT: %10 = fdiv fast <2 x double> %3, %6

	518 ; CHECK-NEXT: %11 = fdiv fast <2 x double> %4, %7

	519 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	520 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	521 ; CHECK-NEXT: ret <2 x double> %9

	522

	523 define <6 x float> @frem_binop_6xfloat(<6 x float>, <6 x float>) {

	524 %3 = frem <6 x float> %0, %1

	525 ret <6 x float> %3

	526 }

	527 ; CHECK-LABEL: define <4 x float> @frem_binop_6xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	528 ; CHECK-NEXT: %6 = frem <4 x float> %1, %3

	529 ; CHECK-NEXT: %7 = frem <4 x float> %2, %4

	530 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	531 ; CHECK-NEXT: ret <4 x float> %6

	532

	533 define <6 x float> @frem_binop_6xfloat_fast(<6 x float>, <6 x float>) {

	534 %3 = frem fast <6 x float> %0, %1

	535 ret <6 x float> %3

	536 }

	537 ; CHECK-LABEL: define <4 x float> @frem_binop_6xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	538 ; CHECK-NEXT: %6 = frem fast <4 x float> %1, %3

	539 ; CHECK-NEXT: %7 = frem fast <4 x float> %2, %4

	540 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	541 ; CHECK-NEXT: ret <4 x float> %6

	542

	543 define <6 x double> @frem_binop_6xdouble(<6 x double>, <6 x double>) {

	544 %3 = frem <6 x double> %0, %1

	545 ret <6 x double> %3

	546 }

	547 ; CHECK-LABEL: define <2 x double> @frem_binop_6xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>)

	548 ; CHECK-NEXT: %9 = frem <2 x double> %2, %5

	549 ; CHECK-NEXT: %10 = frem <2 x double> %3, %6

	550 ; CHECK-NEXT: %11 = frem <2 x double> %4, %7

	551 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	552 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	553 ; CHECK-NEXT: ret <2 x double> %9

	554

	555 define <6 x double> @frem_binop_6xdouble_fast(<6 x double>, <6 x double>) {

	556 %3 = frem fast <6 x double> %0, %1

	557 ret <6 x double> %3

	558 }

	559 ; CHECK-LABEL: define <2 x double> @frem_binop_6xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	560 ; CHECK-NEXT: %9 = frem fast <2 x double> %2, %5

	561 ; CHECK-NEXT: %10 = frem fast <2 x double> %3, %6

	562 ; CHECK-NEXT: %11 = frem fast <2 x double> %4, %7

	563 ; CHECK-NEXT: store <2 x double> %10, <2 x double>* %0, align 16

	564 ; CHECK-NEXT: store <2 x double> %11, <2 x double>* %1, align 16

	565 ; CHECK-NEXT: ret <2 x double> %9

	566

	567 define <8 x float> @fadd_binop_8xfloat(<8 x float>, <8 x float>) {

	568 %3 = fadd <8 x float> %0, %1

	569 ret <8 x float> %3

	570 }

	571 ; CHECK-LABEL: define <4 x float> @fadd_binop_8xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	572 ; CHECK-NEXT: %6 = fadd <4 x float> %1, %3

	573 ; CHECK-NEXT: %7 = fadd <4 x float> %2, %4

	574 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	575 ; CHECK-NEXT: ret <4 x float> %6

	576

	577 define <8 x float> @fadd_binop_8xfloat_fast(<8 x float>, <8 x float>) {

	578 %3 = fadd fast <8 x float> %0, %1

	579 ret <8 x float> %3

	580 }

	581 ; CHECK-LABEL: define <4 x float> @fadd_binop_8xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	582 ; CHECK-NEXT: %6 = fadd fast <4 x float> %1, %3

	583 ; CHECK-NEXT: %7 = fadd fast <4 x float> %2, %4

	584 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	585 ; CHECK-NEXT: ret <4 x float> %6

	586

	587 define <8 x double> @fadd_binop_8xdouble(<8 x double>, <8 x double>) {

	588 %3 = fadd <8 x double> %0, %1

	589 ret <8 x double> %3

	590 }

	591 ; CHECK-LABEL: define <2 x double> @fadd_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>)

	592 ; CHECK-NEXT: %12 = fadd <2 x double> %3, %7

	593 ; CHECK-NEXT: %13 = fadd <2 x double> %4, %8

	594 ; CHECK-NEXT: %14 = fadd <2 x double> %5, %9

	595 ; CHECK-NEXT: %15 = fadd <2 x double> %6, %10

	596 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	597 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	598 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	599 ; CHECK-NEXT: ret <2 x double> %12

	600

	601 define <8 x double> @fadd_binop_8xdouble_fast(<8 x double>, <8 x double>) {

	602 %3 = fadd fast <8 x double> %0, %1

	603 ret <8 x double> %3

	604 }

	605 ; CHECK-LABEL: define <2 x double> @fadd_binop_8xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	606 ; CHECK-NEXT: %12 = fadd fast <2 x double> %3, %7

	607 ; CHECK-NEXT: %13 = fadd fast <2 x double> %4, %8

	608 ; CHECK-NEXT: %14 = fadd fast <2 x double> %5, %9

	609 ; CHECK-NEXT: %15 = fadd fast <2 x double> %6, %10

	610 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	611 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	612 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	613 ; CHECK-NEXT: ret <2 x double> %12

	614

	615 define <8 x float> @fsub_binop_8xfloat(<8 x float>, <8 x float>) {

	616 %3 = fsub <8 x float> %0, %1

	617 ret <8 x float> %3

	618 }

	619 ; CHECK-LABEL: define <4 x float> @fsub_binop_8xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	620 ; CHECK-NEXT: %6 = fsub <4 x float> %1, %3

	621 ; CHECK-NEXT: %7 = fsub <4 x float> %2, %4

	622 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	623 ; CHECK-NEXT: ret <4 x float> %6

	624

	625 define <8 x float> @fsub_binop_8xfloat_fast(<8 x float>, <8 x float>) {

	626 %3 = fsub fast <8 x float> %0, %1

	627 ret <8 x float> %3

	628 }

	629 ; CHECK-LABEL: define <4 x float> @fsub_binop_8xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	630 ; CHECK-NEXT: %6 = fsub fast <4 x float> %1, %3

	631 ; CHECK-NEXT: %7 = fsub fast <4 x float> %2, %4

	632 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	633 ; CHECK-NEXT: ret <4 x float> %6

	634

	635 define <8 x double> @fsub_binop_8xdouble(<8 x double>, <8 x double>) {

	636 %3 = fsub <8 x double> %0, %1

	637 ret <8 x double> %3

	638 }

	639 ; CHECK-LABEL: define <2 x double> @fsub_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>)

	640 ; CHECK-NEXT: %12 = fsub <2 x double> %3, %7

	641 ; CHECK-NEXT: %13 = fsub <2 x double> %4, %8

	642 ; CHECK-NEXT: %14 = fsub <2 x double> %5, %9

	643 ; CHECK-NEXT: %15 = fsub <2 x double> %6, %10

	644 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	645 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	646 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	647 ; CHECK-NEXT: ret <2 x double> %12

	648

	649 define <8 x double> @fsub_binop_8xdouble_fast(<8 x double>, <8 x double>) {

	650 %3 = fsub fast <8 x double> %0, %1

	651 ret <8 x double> %3

	652 }

	653 ; CHECK-LABEL: define <2 x double> @fsub_binop_8xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	654 ; CHECK-NEXT: %12 = fsub fast <2 x double> %3, %7

	655 ; CHECK-NEXT: %13 = fsub fast <2 x double> %4, %8

	656 ; CHECK-NEXT: %14 = fsub fast <2 x double> %5, %9

	657 ; CHECK-NEXT: %15 = fsub fast <2 x double> %6, %10

	658 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	659 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	660 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	661 ; CHECK-NEXT: ret <2 x double> %12

	662

	663 define <8 x float> @fmul_binop_8xfloat(<8 x float>, <8 x float>) {

	664 %3 = fmul <8 x float> %0, %1

	665 ret <8 x float> %3

	666 }

	667 ; CHECK-LABEL: define <4 x float> @fmul_binop_8xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	668 ; CHECK-NEXT: %6 = fmul <4 x float> %1, %3

	669 ; CHECK-NEXT: %7 = fmul <4 x float> %2, %4

	670 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	671 ; CHECK-NEXT: ret <4 x float> %6

	672

	673 define <8 x float> @fmul_binop_8xfloat_fast(<8 x float>, <8 x float>) {

	674 %3 = fmul fast <8 x float> %0, %1

	675 ret <8 x float> %3

	676 }

	677 ; CHECK-LABEL: define <4 x float> @fmul_binop_8xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	678 ; CHECK-NEXT: %6 = fmul fast <4 x float> %1, %3

	679 ; CHECK-NEXT: %7 = fmul fast <4 x float> %2, %4

	680 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	681 ; CHECK-NEXT: ret <4 x float> %6

	682

	683 define <8 x double> @fmul_binop_8xdouble(<8 x double>, <8 x double>) {

	684 %3 = fmul <8 x double> %0, %1

	685 ret <8 x double> %3

	686 }

	687 ; CHECK-LABEL: define <2 x double> @fmul_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>)

	688 ; CHECK-NEXT: %12 = fmul <2 x double> %3, %7

	689 ; CHECK-NEXT: %13 = fmul <2 x double> %4, %8

	690 ; CHECK-NEXT: %14 = fmul <2 x double> %5, %9

	691 ; CHECK-NEXT: %15 = fmul <2 x double> %6, %10

	692 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	693 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	694 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	695 ; CHECK-NEXT: ret <2 x double> %12

	696

	697 define <8 x double> @fmul_binop_8xdouble_fast(<8 x double>, <8 x double>) {

	698 %3 = fmul fast <8 x double> %0, %1

	699 ret <8 x double> %3

	700 }

	701 ; CHECK-LABEL: define <2 x double> @fmul_binop_8xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	702 ; CHECK-NEXT: %12 = fmul fast <2 x double> %3, %7

	703 ; CHECK-NEXT: %13 = fmul fast <2 x double> %4, %8

	704 ; CHECK-NEXT: %14 = fmul fast <2 x double> %5, %9

	705 ; CHECK-NEXT: %15 = fmul fast <2 x double> %6, %10

	706 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	707 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	708 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	709 ; CHECK-NEXT: ret <2 x double> %12

	710

	711 define <8 x float> @fdiv_binop_8xfloat(<8 x float>, <8 x float>) {

	712 %3 = fdiv <8 x float> %0, %1

	713 ret <8 x float> %3

	714 }

	715 ; CHECK-LABEL: define <4 x float> @fdiv_binop_8xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	716 ; CHECK-NEXT: %6 = fdiv <4 x float> %1, %3

	717 ; CHECK-NEXT: %7 = fdiv <4 x float> %2, %4

	718 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	719 ; CHECK-NEXT: ret <4 x float> %6

	720

	721 define <8 x float> @fdiv_binop_8xfloat_fast(<8 x float>, <8 x float>) {

	722 %3 = fdiv fast <8 x float> %0, %1

	723 ret <8 x float> %3

	724 }

	725 ; CHECK-LABEL: define <4 x float> @fdiv_binop_8xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	726 ; CHECK-NEXT: %6 = fdiv fast <4 x float> %1, %3

	727 ; CHECK-NEXT: %7 = fdiv fast <4 x float> %2, %4

	728 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	729 ; CHECK-NEXT: ret <4 x float> %6

	730

	731 define <8 x double> @fdiv_binop_8xdouble(<8 x double>, <8 x double>) {

	732 %3 = fdiv <8 x double> %0, %1

	733 ret <8 x double> %3

	734 }

	735 ; CHECK-LABEL: define <2 x double> @fdiv_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>)

	736 ; CHECK-NEXT: %12 = fdiv <2 x double> %3, %7

	737 ; CHECK-NEXT: %13 = fdiv <2 x double> %4, %8

	738 ; CHECK-NEXT: %14 = fdiv <2 x double> %5, %9

	739 ; CHECK-NEXT: %15 = fdiv <2 x double> %6, %10

	740 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	741 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	742 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	743 ; CHECK-NEXT: ret <2 x double> %12

	744

	745 define <8 x double> @fdiv_binop_8xdouble_fast(<8 x double>, <8 x double>) {

	746 %3 = fdiv fast <8 x double> %0, %1

	747 ret <8 x double> %3

	748 }

	749 ; CHECK-LABEL: define <2 x double> @fdiv_binop_8xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	750 ; CHECK-NEXT: %12 = fdiv fast <2 x double> %3, %7

	751 ; CHECK-NEXT: %13 = fdiv fast <2 x double> %4, %8

	752 ; CHECK-NEXT: %14 = fdiv fast <2 x double> %5, %9

	753 ; CHECK-NEXT: %15 = fdiv fast <2 x double> %6, %10

	754 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	755 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	756 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	757 ; CHECK-NEXT: ret <2 x double> %12

	758

	759 define <8 x float> @frem_binop_8xfloat(<8 x float>, <8 x float>) {

	760 %3 = frem <8 x float> %0, %1

	761 ret <8 x float> %3

	762 }

	763 ; CHECK-LABEL: define <4 x float> @frem_binop_8xfloat(<4 x float>* nocapture non null dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	764 ; CHECK-NEXT: %6 = frem <4 x float> %1, %3

	765 ; CHECK-NEXT: %7 = frem <4 x float> %2, %4

	766 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	767 ; CHECK-NEXT: ret <4 x float> %6

	768

	769 define <8 x float> @frem_binop_8xfloat_fast(<8 x float>, <8 x float>) {

	770 %3 = frem fast <8 x float> %0, %1

	771 ret <8 x float> %3

	772 }

	773 ; CHECK-LABEL: define <4 x float> @frem_binop_8xfloat_fast(<4 x float>* nocaptur e nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float >)

	774 ; CHECK-NEXT: %6 = frem fast <4 x float> %1, %3

	775 ; CHECK-NEXT: %7 = frem fast <4 x float> %2, %4

	776 ; CHECK-NEXT: store <4 x float> %7, <4 x float>* %0, align 16

	777 ; CHECK-NEXT: ret <4 x float> %6

	778

	779 define <8 x double> @frem_binop_8xdouble(<8 x double>, <8 x double>) {

	780 %3 = frem <8 x double> %0, %1

	781 ret <8 x double> %3

	782 }

	783 ; CHECK-LABEL: define <2 x double> @frem_binop_8xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double >, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x do uble>)

	784 ; CHECK-NEXT: %12 = frem <2 x double> %3, %7

	785 ; CHECK-NEXT: %13 = frem <2 x double> %4, %8

	786 ; CHECK-NEXT: %14 = frem <2 x double> %5, %9

	787 ; CHECK-NEXT: %15 = frem <2 x double> %6, %10

	788 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	789 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	790 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	791 ; CHECK-NEXT: ret <2 x double> %12

	792

	793 define <8 x double> @frem_binop_8xdouble_fast(<8 x double>, <8 x double>) {

	794 %3 = frem fast <8 x double> %0, %1

	795 ret <8 x double> %3

	796 }

	797 ; CHECK-LABEL: define <2 x double> @frem_binop_8xdouble_fast(<2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	798 ; CHECK-NEXT: %12 = frem fast <2 x double> %3, %7

	799 ; CHECK-NEXT: %13 = frem fast <2 x double> %4, %8

	800 ; CHECK-NEXT: %14 = frem fast <2 x double> %5, %9

	801 ; CHECK-NEXT: %15 = frem fast <2 x double> %6, %10

	802 ; CHECK-NEXT: store <2 x double> %13, <2 x double>* %0, align 16

	803 ; CHECK-NEXT: store <2 x double> %14, <2 x double>* %1, align 16

	804 ; CHECK-NEXT: store <2 x double> %15, <2 x double>* %2, align 16

	805 ; CHECK-NEXT: ret <2 x double> %12

	806

	807 define <12 x float> @fadd_binop_12xfloat(<12 x float>, <12 x float>) {

	808 %3 = fadd <12 x float> %0, %1

	809 ret <12 x float> %3

	810 }

	811 ; CHECK-LABEL: define <4 x float> @fadd_binop_12xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	812 ; CHECK-NEXT: %9 = fadd <4 x float> %2, %5

	813 ; CHECK-NEXT: %10 = fadd <4 x float> %3, %6

	814 ; CHECK-NEXT: %11 = fadd <4 x float> %4, %7

	815 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	816 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	817 ; CHECK-NEXT: ret <4 x float> %9

	818

	819 define <12 x float> @fadd_binop_12xfloat_fast(<12 x float>, <12 x float>) {

	820 %3 = fadd fast <12 x float> %0, %1

	821 ret <12 x float> %3

	822 }

	823 ; CHECK-LABEL: define <4 x float> @fadd_binop_12xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> )

	824 ; CHECK-NEXT: %9 = fadd fast <4 x float> %2, %5

	825 ; CHECK-NEXT: %10 = fadd fast <4 x float> %3, %6

	826 ; CHECK-NEXT: %11 = fadd fast <4 x float> %4, %7

	827 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	828 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	829 ; CHECK-NEXT: ret <4 x float> %9

	830

	831 define <12 x double> @fadd_binop_12xdouble(<12 x double>, <12 x double>) {

	832 %3 = fadd <12 x double> %0, %1

	833 ret <12 x double> %3

	834 }

	835 ; CHECK-LABEL: define <2 x double> @fadd_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	836 ; CHECK-NEXT: %18 = fadd <2 x double> %5, %11

	837 ; CHECK-NEXT: %19 = fadd <2 x double> %6, %12

	838 ; CHECK-NEXT: %20 = fadd <2 x double> %7, %13

	839 ; CHECK-NEXT: %21 = fadd <2 x double> %8, %14

	840 ; CHECK-NEXT: %22 = fadd <2 x double> %9, %15

	841 ; CHECK-NEXT: %23 = fadd <2 x double> %10, %16

	842 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	843 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	844 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	845 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	846 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	847 ; CHECK-NEXT: ret <2 x double> %18

	848

	849 define <12 x double> @fadd_binop_12xdouble_fast(<12 x double>, <12 x double>) {

	850 %3 = fadd fast <12 x double> %0, %1

	851 ret <12 x double> %3

	852 }

	853 ; CHECK-LABEL: define <2 x double> @fadd_binop_12xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	854 ; CHECK-NEXT: %18 = fadd fast <2 x double> %5, %11

	855 ; CHECK-NEXT: %19 = fadd fast <2 x double> %6, %12

	856 ; CHECK-NEXT: %20 = fadd fast <2 x double> %7, %13

	857 ; CHECK-NEXT: %21 = fadd fast <2 x double> %8, %14

	858 ; CHECK-NEXT: %22 = fadd fast <2 x double> %9, %15

	859 ; CHECK-NEXT: %23 = fadd fast <2 x double> %10, %16

	860 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	861 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	862 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	863 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	864 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	865 ; CHECK-NEXT: ret <2 x double> %18

	866

	867 define <12 x float> @fsub_binop_12xfloat(<12 x float>, <12 x float>) {

	868 %3 = fsub <12 x float> %0, %1

	869 ret <12 x float> %3

	870 }

	871 ; CHECK-LABEL: define <4 x float> @fsub_binop_12xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	872 ; CHECK-NEXT: %9 = fsub <4 x float> %2, %5

	873 ; CHECK-NEXT: %10 = fsub <4 x float> %3, %6

	874 ; CHECK-NEXT: %11 = fsub <4 x float> %4, %7

	875 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	876 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	877 ; CHECK-NEXT: ret <4 x float> %9

	878

	879 define <12 x float> @fsub_binop_12xfloat_fast(<12 x float>, <12 x float>) {

	880 %3 = fsub fast <12 x float> %0, %1

	881 ret <12 x float> %3

	882 }

	883 ; CHECK-LABEL: define <4 x float> @fsub_binop_12xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> )

	884 ; CHECK-NEXT: %9 = fsub fast <4 x float> %2, %5

	885 ; CHECK-NEXT: %10 = fsub fast <4 x float> %3, %6

	886 ; CHECK-NEXT: %11 = fsub fast <4 x float> %4, %7

	887 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	888 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	889 ; CHECK-NEXT: ret <4 x float> %9

	890

	891 define <12 x double> @fsub_binop_12xdouble(<12 x double>, <12 x double>) {

	892 %3 = fsub <12 x double> %0, %1

	893 ret <12 x double> %3

	894 }

	895 ; CHECK-LABEL: define <2 x double> @fsub_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	896 ; CHECK-NEXT: %18 = fsub <2 x double> %5, %11

	897 ; CHECK-NEXT: %19 = fsub <2 x double> %6, %12

	898 ; CHECK-NEXT: %20 = fsub <2 x double> %7, %13

	899 ; CHECK-NEXT: %21 = fsub <2 x double> %8, %14

	900 ; CHECK-NEXT: %22 = fsub <2 x double> %9, %15

	901 ; CHECK-NEXT: %23 = fsub <2 x double> %10, %16

	902 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	903 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	904 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	905 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	906 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	907 ; CHECK-NEXT: ret <2 x double> %18

	908

	909 define <12 x double> @fsub_binop_12xdouble_fast(<12 x double>, <12 x double>) {

	910 %3 = fsub fast <12 x double> %0, %1

	911 ret <12 x double> %3

	912 }

	913 ; CHECK-LABEL: define <2 x double> @fsub_binop_12xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	914 ; CHECK-NEXT: %18 = fsub fast <2 x double> %5, %11

	915 ; CHECK-NEXT: %19 = fsub fast <2 x double> %6, %12

	916 ; CHECK-NEXT: %20 = fsub fast <2 x double> %7, %13

	917 ; CHECK-NEXT: %21 = fsub fast <2 x double> %8, %14

	918 ; CHECK-NEXT: %22 = fsub fast <2 x double> %9, %15

	919 ; CHECK-NEXT: %23 = fsub fast <2 x double> %10, %16

	920 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	921 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	922 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	923 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	924 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	925 ; CHECK-NEXT: ret <2 x double> %18

	926

	927 define <12 x float> @fmul_binop_12xfloat(<12 x float>, <12 x float>) {

	928 %3 = fmul <12 x float> %0, %1

	929 ret <12 x float> %3

	930 }

	931 ; CHECK-LABEL: define <4 x float> @fmul_binop_12xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	932 ; CHECK-NEXT: %9 = fmul <4 x float> %2, %5

	933 ; CHECK-NEXT: %10 = fmul <4 x float> %3, %6

	934 ; CHECK-NEXT: %11 = fmul <4 x float> %4, %7

	935 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	936 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	937 ; CHECK-NEXT: ret <4 x float> %9

	938

	939 define <12 x float> @fmul_binop_12xfloat_fast(<12 x float>, <12 x float>) {

	940 %3 = fmul fast <12 x float> %0, %1

	941 ret <12 x float> %3

	942 }

	943 ; CHECK-LABEL: define <4 x float> @fmul_binop_12xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> )

	944 ; CHECK-NEXT: %9 = fmul fast <4 x float> %2, %5

	945 ; CHECK-NEXT: %10 = fmul fast <4 x float> %3, %6

	946 ; CHECK-NEXT: %11 = fmul fast <4 x float> %4, %7

	947 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	948 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	949 ; CHECK-NEXT: ret <4 x float> %9

	950

	951 define <12 x double> @fmul_binop_12xdouble(<12 x double>, <12 x double>) {

	952 %3 = fmul <12 x double> %0, %1

	953 ret <12 x double> %3

	954 }

	955 ; CHECK-LABEL: define <2 x double> @fmul_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	956 ; CHECK-NEXT: %18 = fmul <2 x double> %5, %11

	957 ; CHECK-NEXT: %19 = fmul <2 x double> %6, %12

	958 ; CHECK-NEXT: %20 = fmul <2 x double> %7, %13

	959 ; CHECK-NEXT: %21 = fmul <2 x double> %8, %14

	960 ; CHECK-NEXT: %22 = fmul <2 x double> %9, %15

	961 ; CHECK-NEXT: %23 = fmul <2 x double> %10, %16

	962 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	963 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	964 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	965 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	966 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	967 ; CHECK-NEXT: ret <2 x double> %18

	968

	969 define <12 x double> @fmul_binop_12xdouble_fast(<12 x double>, <12 x double>) {

	970 %3 = fmul fast <12 x double> %0, %1

	971 ret <12 x double> %3

	972 }

	973 ; CHECK-LABEL: define <2 x double> @fmul_binop_12xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	974 ; CHECK-NEXT: %18 = fmul fast <2 x double> %5, %11

	975 ; CHECK-NEXT: %19 = fmul fast <2 x double> %6, %12

	976 ; CHECK-NEXT: %20 = fmul fast <2 x double> %7, %13

	977 ; CHECK-NEXT: %21 = fmul fast <2 x double> %8, %14

	978 ; CHECK-NEXT: %22 = fmul fast <2 x double> %9, %15

	979 ; CHECK-NEXT: %23 = fmul fast <2 x double> %10, %16

	980 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	981 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	982 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	983 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	984 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	985 ; CHECK-NEXT: ret <2 x double> %18

	986

	987 define <12 x float> @fdiv_binop_12xfloat(<12 x float>, <12 x float>) {

	988 %3 = fdiv <12 x float> %0, %1

	989 ret <12 x float> %3

	990 }

	991 ; CHECK-LABEL: define <4 x float> @fdiv_binop_12xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	992 ; CHECK-NEXT: %9 = fdiv <4 x float> %2, %5

	993 ; CHECK-NEXT: %10 = fdiv <4 x float> %3, %6

	994 ; CHECK-NEXT: %11 = fdiv <4 x float> %4, %7

	995 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	996 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	997 ; CHECK-NEXT: ret <4 x float> %9

	998

	999 define <12 x float> @fdiv_binop_12xfloat_fast(<12 x float>, <12 x float>) {

	1000 %3 = fdiv fast <12 x float> %0, %1

	1001 ret <12 x float> %3

	1002 }

	1003 ; CHECK-LABEL: define <4 x float> @fdiv_binop_12xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> )

	1004 ; CHECK-NEXT: %9 = fdiv fast <4 x float> %2, %5

	1005 ; CHECK-NEXT: %10 = fdiv fast <4 x float> %3, %6

	1006 ; CHECK-NEXT: %11 = fdiv fast <4 x float> %4, %7

	1007 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	1008 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	1009 ; CHECK-NEXT: ret <4 x float> %9

	1010

	1011 define <12 x double> @fdiv_binop_12xdouble(<12 x double>, <12 x double>) {

	1012 %3 = fdiv <12 x double> %0, %1

	1013 ret <12 x double> %3

	1014 }

	1015 ; CHECK-LABEL: define <2 x double> @fdiv_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1016 ; CHECK-NEXT: %18 = fdiv <2 x double> %5, %11

	1017 ; CHECK-NEXT: %19 = fdiv <2 x double> %6, %12

	1018 ; CHECK-NEXT: %20 = fdiv <2 x double> %7, %13

	1019 ; CHECK-NEXT: %21 = fdiv <2 x double> %8, %14

	1020 ; CHECK-NEXT: %22 = fdiv <2 x double> %9, %15

	1021 ; CHECK-NEXT: %23 = fdiv <2 x double> %10, %16

	1022 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	1023 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	1024 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	1025 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	1026 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	1027 ; CHECK-NEXT: ret <2 x double> %18

	1028

	1029 define <12 x double> @fdiv_binop_12xdouble_fast(<12 x double>, <12 x double>) {

	1030 %3 = fdiv fast <12 x double> %0, %1

	1031 ret <12 x double> %3

	1032 }

	1033 ; CHECK-LABEL: define <2 x double> @fdiv_binop_12xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1034 ; CHECK-NEXT: %18 = fdiv fast <2 x double> %5, %11

	1035 ; CHECK-NEXT: %19 = fdiv fast <2 x double> %6, %12

	1036 ; CHECK-NEXT: %20 = fdiv fast <2 x double> %7, %13

	1037 ; CHECK-NEXT: %21 = fdiv fast <2 x double> %8, %14

	1038 ; CHECK-NEXT: %22 = fdiv fast <2 x double> %9, %15

	1039 ; CHECK-NEXT: %23 = fdiv fast <2 x double> %10, %16

	1040 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	1041 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	1042 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	1043 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	1044 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	1045 ; CHECK-NEXT: ret <2 x double> %18

	1046

	1047 define <12 x float> @frem_binop_12xfloat(<12 x float>, <12 x float>) {

	1048 %3 = frem <12 x float> %0, %1

	1049 ret <12 x float> %3

	1050 }

	1051 ; CHECK-LABEL: define <4 x float> @frem_binop_12xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1052 ; CHECK-NEXT: %9 = frem <4 x float> %2, %5

	1053 ; CHECK-NEXT: %10 = frem <4 x float> %3, %6

	1054 ; CHECK-NEXT: %11 = frem <4 x float> %4, %7

	1055 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	1056 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	1057 ; CHECK-NEXT: ret <4 x float> %9

	1058

	1059 define <12 x float> @frem_binop_12xfloat_fast(<12 x float>, <12 x float>) {

	1060 %3 = frem fast <12 x float> %0, %1

	1061 ret <12 x float> %3

	1062 }

	1063 ; CHECK-LABEL: define <4 x float> @frem_binop_12xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float> )

	1064 ; CHECK-NEXT: %9 = frem fast <4 x float> %2, %5

	1065 ; CHECK-NEXT: %10 = frem fast <4 x float> %3, %6

	1066 ; CHECK-NEXT: %11 = frem fast <4 x float> %4, %7

	1067 ; CHECK-NEXT: store <4 x float> %10, <4 x float>* %0, align 16

	1068 ; CHECK-NEXT: store <4 x float> %11, <4 x float>* %1, align 16

	1069 ; CHECK-NEXT: ret <4 x float> %9

	1070

	1071 define <12 x double> @frem_binop_12xdouble(<12 x double>, <12 x double>) {

	1072 %3 = frem <12 x double> %0, %1

	1073 ret <12 x double> %3

	1074 }

	1075 ; CHECK-LABEL: define <2 x double> @frem_binop_12xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1076 ; CHECK-NEXT: %18 = frem <2 x double> %5, %11

	1077 ; CHECK-NEXT: %19 = frem <2 x double> %6, %12

	1078 ; CHECK-NEXT: %20 = frem <2 x double> %7, %13

	1079 ; CHECK-NEXT: %21 = frem <2 x double> %8, %14

	1080 ; CHECK-NEXT: %22 = frem <2 x double> %9, %15

	1081 ; CHECK-NEXT: %23 = frem <2 x double> %10, %16

	1082 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	1083 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	1084 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	1085 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	1086 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	1087 ; CHECK-NEXT: ret <2 x double> %18

	1088

	1089 define <12 x double> @frem_binop_12xdouble_fast(<12 x double>, <12 x double>) {

	1090 %3 = frem fast <12 x double> %0, %1

	1091 ret <12 x double> %3

	1092 }

	1093 ; CHECK-LABEL: define <2 x double> @frem_binop_12xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1094 ; CHECK-NEXT: %18 = frem fast <2 x double> %5, %11

	1095 ; CHECK-NEXT: %19 = frem fast <2 x double> %6, %12

	1096 ; CHECK-NEXT: %20 = frem fast <2 x double> %7, %13

	1097 ; CHECK-NEXT: %21 = frem fast <2 x double> %8, %14

	1098 ; CHECK-NEXT: %22 = frem fast <2 x double> %9, %15

	1099 ; CHECK-NEXT: %23 = frem fast <2 x double> %10, %16

	1100 ; CHECK-NEXT: store <2 x double> %19, <2 x double>* %0, align 16

	1101 ; CHECK-NEXT: store <2 x double> %20, <2 x double>* %1, align 16

	1102 ; CHECK-NEXT: store <2 x double> %21, <2 x double>* %2, align 16

	1103 ; CHECK-NEXT: store <2 x double> %22, <2 x double>* %3, align 16

	1104 ; CHECK-NEXT: store <2 x double> %23, <2 x double>* %4, align 16

	1105 ; CHECK-NEXT: ret <2 x double> %18

	1106

	1107 define <16 x float> @fadd_binop_16xfloat(<16 x float>, <16 x float>) {

	1108 %3 = fadd <16 x float> %0, %1

	1109 ret <16 x float> %3

	1110 }

	1111 ; CHECK-LABEL: define <4 x float> @fadd_binop_16xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1112 ; CHECK-NEXT: %12 = fadd <4 x float> %3, %7

	1113 ; CHECK-NEXT: %13 = fadd <4 x float> %4, %8

	1114 ; CHECK-NEXT: %14 = fadd <4 x float> %5, %9

	1115 ; CHECK-NEXT: %15 = fadd <4 x float> %6, %10

	1116 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1117 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1118 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1119 ; CHECK-NEXT: ret <4 x float> %12

	1120

	1121 define <16 x float> @fadd_binop_16xfloat_fast(<16 x float>, <16 x float>) {

	1122 %3 = fadd fast <16 x float> %0, %1

	1123 ret <16 x float> %3

	1124 }

	1125 ; CHECK-LABEL: define <4 x float> @fadd_binop_16xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float> , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1126 ; CHECK-NEXT: %12 = fadd fast <4 x float> %3, %7

	1127 ; CHECK-NEXT: %13 = fadd fast <4 x float> %4, %8

	1128 ; CHECK-NEXT: %14 = fadd fast <4 x float> %5, %9

	1129 ; CHECK-NEXT: %15 = fadd fast <4 x float> %6, %10

	1130 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1131 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1132 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1133 ; CHECK-NEXT: ret <4 x float> %12

	1134

	1135 define <16 x double> @fadd_binop_16xdouble(<16 x double>, <16 x double>) {

	1136 %3 = fadd <16 x double> %0, %1

	1137 ret <16 x double> %3

	1138 }

	1139 ; CHECK-LABEL: define <2 x double> @fadd_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1140 ; CHECK-NEXT: %24 = fadd <2 x double> %7, %15

	1141 ; CHECK-NEXT: %25 = fadd <2 x double> %8, %16

	1142 ; CHECK-NEXT: %26 = fadd <2 x double> %9, %17

	1143 ; CHECK-NEXT: %27 = fadd <2 x double> %10, %18

	1144 ; CHECK-NEXT: %28 = fadd <2 x double> %11, %19

	1145 ; CHECK-NEXT: %29 = fadd <2 x double> %12, %20

	1146 ; CHECK-NEXT: %30 = fadd <2 x double> %13, %21

	1147 ; CHECK-NEXT: %31 = fadd <2 x double> %14, %22

	1148 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1149 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1150 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1151 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1152 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1153 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1154 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1155 ; CHECK-NEXT: ret <2 x double> %24

	1156

	1157 define <16 x double> @fadd_binop_16xdouble_fast(<16 x double>, <16 x double>) {

	1158 %3 = fadd fast <16 x double> %0, %1

	1159 ret <16 x double> %3

	1160 }

	1161 ; CHECK-LABEL: define <2 x double> @fadd_binop_16xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>)

	1162 ; CHECK-NEXT: %24 = fadd fast <2 x double> %7, %15

	1163 ; CHECK-NEXT: %25 = fadd fast <2 x double> %8, %16

	1164 ; CHECK-NEXT: %26 = fadd fast <2 x double> %9, %17

	1165 ; CHECK-NEXT: %27 = fadd fast <2 x double> %10, %18

	1166 ; CHECK-NEXT: %28 = fadd fast <2 x double> %11, %19

	1167 ; CHECK-NEXT: %29 = fadd fast <2 x double> %12, %20

	1168 ; CHECK-NEXT: %30 = fadd fast <2 x double> %13, %21

	1169 ; CHECK-NEXT: %31 = fadd fast <2 x double> %14, %22

	1170 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1171 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1172 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1173 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1174 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1175 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1176 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1177 ; CHECK-NEXT: ret <2 x double> %24

	1178

	1179 define <16 x float> @fsub_binop_16xfloat(<16 x float>, <16 x float>) {

	1180 %3 = fsub <16 x float> %0, %1

	1181 ret <16 x float> %3

	1182 }

	1183 ; CHECK-LABEL: define <4 x float> @fsub_binop_16xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1184 ; CHECK-NEXT: %12 = fsub <4 x float> %3, %7

	1185 ; CHECK-NEXT: %13 = fsub <4 x float> %4, %8

	1186 ; CHECK-NEXT: %14 = fsub <4 x float> %5, %9

	1187 ; CHECK-NEXT: %15 = fsub <4 x float> %6, %10

	1188 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1189 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1190 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1191 ; CHECK-NEXT: ret <4 x float> %12

	1192

	1193 define <16 x float> @fsub_binop_16xfloat_fast(<16 x float>, <16 x float>) {

	1194 %3 = fsub fast <16 x float> %0, %1

	1195 ret <16 x float> %3

	1196 }

	1197 ; CHECK-LABEL: define <4 x float> @fsub_binop_16xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float> , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1198 ; CHECK-NEXT: %12 = fsub fast <4 x float> %3, %7

	1199 ; CHECK-NEXT: %13 = fsub fast <4 x float> %4, %8

	1200 ; CHECK-NEXT: %14 = fsub fast <4 x float> %5, %9

	1201 ; CHECK-NEXT: %15 = fsub fast <4 x float> %6, %10

	1202 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1203 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1204 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1205 ; CHECK-NEXT: ret <4 x float> %12

	1206

	1207 define <16 x double> @fsub_binop_16xdouble(<16 x double>, <16 x double>) {

	1208 %3 = fsub <16 x double> %0, %1

	1209 ret <16 x double> %3

	1210 }

	1211 ; CHECK-LABEL: define <2 x double> @fsub_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1212 ; CHECK-NEXT: %24 = fsub <2 x double> %7, %15

	1213 ; CHECK-NEXT: %25 = fsub <2 x double> %8, %16

	1214 ; CHECK-NEXT: %26 = fsub <2 x double> %9, %17

	1215 ; CHECK-NEXT: %27 = fsub <2 x double> %10, %18

	1216 ; CHECK-NEXT: %28 = fsub <2 x double> %11, %19

	1217 ; CHECK-NEXT: %29 = fsub <2 x double> %12, %20

	1218 ; CHECK-NEXT: %30 = fsub <2 x double> %13, %21

	1219 ; CHECK-NEXT: %31 = fsub <2 x double> %14, %22

	1220 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1221 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1222 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1223 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1224 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1225 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1226 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1227 ; CHECK-NEXT: ret <2 x double> %24

	1228

	1229 define <16 x double> @fsub_binop_16xdouble_fast(<16 x double>, <16 x double>) {

	1230 %3 = fsub fast <16 x double> %0, %1

	1231 ret <16 x double> %3

	1232 }

	1233 ; CHECK-LABEL: define <2 x double> @fsub_binop_16xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>)

	1234 ; CHECK-NEXT: %24 = fsub fast <2 x double> %7, %15

	1235 ; CHECK-NEXT: %25 = fsub fast <2 x double> %8, %16

	1236 ; CHECK-NEXT: %26 = fsub fast <2 x double> %9, %17

	1237 ; CHECK-NEXT: %27 = fsub fast <2 x double> %10, %18

	1238 ; CHECK-NEXT: %28 = fsub fast <2 x double> %11, %19

	1239 ; CHECK-NEXT: %29 = fsub fast <2 x double> %12, %20

	1240 ; CHECK-NEXT: %30 = fsub fast <2 x double> %13, %21

	1241 ; CHECK-NEXT: %31 = fsub fast <2 x double> %14, %22

	1242 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1243 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1244 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1245 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1246 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1247 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1248 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1249 ; CHECK-NEXT: ret <2 x double> %24

	1250

	1251 define <16 x float> @fmul_binop_16xfloat(<16 x float>, <16 x float>) {

	1252 %3 = fmul <16 x float> %0, %1

	1253 ret <16 x float> %3

	1254 }

	1255 ; CHECK-LABEL: define <4 x float> @fmul_binop_16xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1256 ; CHECK-NEXT: %12 = fmul <4 x float> %3, %7

	1257 ; CHECK-NEXT: %13 = fmul <4 x float> %4, %8

	1258 ; CHECK-NEXT: %14 = fmul <4 x float> %5, %9

	1259 ; CHECK-NEXT: %15 = fmul <4 x float> %6, %10

	1260 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1261 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1262 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1263 ; CHECK-NEXT: ret <4 x float> %12

	1264

	1265 define <16 x float> @fmul_binop_16xfloat_fast(<16 x float>, <16 x float>) {

	1266 %3 = fmul fast <16 x float> %0, %1

	1267 ret <16 x float> %3

	1268 }

	1269 ; CHECK-LABEL: define <4 x float> @fmul_binop_16xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float> , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1270 ; CHECK-NEXT: %12 = fmul fast <4 x float> %3, %7

	1271 ; CHECK-NEXT: %13 = fmul fast <4 x float> %4, %8

	1272 ; CHECK-NEXT: %14 = fmul fast <4 x float> %5, %9

	1273 ; CHECK-NEXT: %15 = fmul fast <4 x float> %6, %10

	1274 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1275 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1276 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1277 ; CHECK-NEXT: ret <4 x float> %12

	1278

	1279 define <16 x double> @fmul_binop_16xdouble(<16 x double>, <16 x double>) {

	1280 %3 = fmul <16 x double> %0, %1

	1281 ret <16 x double> %3

	1282 }

	1283 ; CHECK-LABEL: define <2 x double> @fmul_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1284 ; CHECK-NEXT: %24 = fmul <2 x double> %7, %15

	1285 ; CHECK-NEXT: %25 = fmul <2 x double> %8, %16

	1286 ; CHECK-NEXT: %26 = fmul <2 x double> %9, %17

	1287 ; CHECK-NEXT: %27 = fmul <2 x double> %10, %18

	1288 ; CHECK-NEXT: %28 = fmul <2 x double> %11, %19

	1289 ; CHECK-NEXT: %29 = fmul <2 x double> %12, %20

	1290 ; CHECK-NEXT: %30 = fmul <2 x double> %13, %21

	1291 ; CHECK-NEXT: %31 = fmul <2 x double> %14, %22

	1292 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1293 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1294 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1295 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1296 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1297 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1298 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1299 ; CHECK-NEXT: ret <2 x double> %24

	1300

	1301 define <16 x double> @fmul_binop_16xdouble_fast(<16 x double>, <16 x double>) {

	1302 %3 = fmul fast <16 x double> %0, %1

	1303 ret <16 x double> %3

	1304 }

	1305 ; CHECK-LABEL: define <2 x double> @fmul_binop_16xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>)

	1306 ; CHECK-NEXT: %24 = fmul fast <2 x double> %7, %15

	1307 ; CHECK-NEXT: %25 = fmul fast <2 x double> %8, %16

	1308 ; CHECK-NEXT: %26 = fmul fast <2 x double> %9, %17

	1309 ; CHECK-NEXT: %27 = fmul fast <2 x double> %10, %18

	1310 ; CHECK-NEXT: %28 = fmul fast <2 x double> %11, %19

	1311 ; CHECK-NEXT: %29 = fmul fast <2 x double> %12, %20

	1312 ; CHECK-NEXT: %30 = fmul fast <2 x double> %13, %21

	1313 ; CHECK-NEXT: %31 = fmul fast <2 x double> %14, %22

	1314 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1315 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1316 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1317 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1318 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1319 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1320 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1321 ; CHECK-NEXT: ret <2 x double> %24

	1322

	1323 define <16 x float> @fdiv_binop_16xfloat(<16 x float>, <16 x float>) {

	1324 %3 = fdiv <16 x float> %0, %1

	1325 ret <16 x float> %3

	1326 }

	1327 ; CHECK-LABEL: define <4 x float> @fdiv_binop_16xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1328 ; CHECK-NEXT: %12 = fdiv <4 x float> %3, %7

	1329 ; CHECK-NEXT: %13 = fdiv <4 x float> %4, %8

	1330 ; CHECK-NEXT: %14 = fdiv <4 x float> %5, %9

	1331 ; CHECK-NEXT: %15 = fdiv <4 x float> %6, %10

	1332 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1333 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1334 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1335 ; CHECK-NEXT: ret <4 x float> %12

	1336

	1337 define <16 x float> @fdiv_binop_16xfloat_fast(<16 x float>, <16 x float>) {

	1338 %3 = fdiv fast <16 x float> %0, %1

	1339 ret <16 x float> %3

	1340 }

	1341 ; CHECK-LABEL: define <4 x float> @fdiv_binop_16xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float> , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1342 ; CHECK-NEXT: %12 = fdiv fast <4 x float> %3, %7

	1343 ; CHECK-NEXT: %13 = fdiv fast <4 x float> %4, %8

	1344 ; CHECK-NEXT: %14 = fdiv fast <4 x float> %5, %9

	1345 ; CHECK-NEXT: %15 = fdiv fast <4 x float> %6, %10

	1346 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1347 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1348 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1349 ; CHECK-NEXT: ret <4 x float> %12

	1350

	1351 define <16 x double> @fdiv_binop_16xdouble(<16 x double>, <16 x double>) {

	1352 %3 = fdiv <16 x double> %0, %1

	1353 ret <16 x double> %3

	1354 }

	1355 ; CHECK-LABEL: define <2 x double> @fdiv_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1356 ; CHECK-NEXT: %24 = fdiv <2 x double> %7, %15

	1357 ; CHECK-NEXT: %25 = fdiv <2 x double> %8, %16

	1358 ; CHECK-NEXT: %26 = fdiv <2 x double> %9, %17

	1359 ; CHECK-NEXT: %27 = fdiv <2 x double> %10, %18

	1360 ; CHECK-NEXT: %28 = fdiv <2 x double> %11, %19

	1361 ; CHECK-NEXT: %29 = fdiv <2 x double> %12, %20

	1362 ; CHECK-NEXT: %30 = fdiv <2 x double> %13, %21

	1363 ; CHECK-NEXT: %31 = fdiv <2 x double> %14, %22

	1364 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1365 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1366 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1367 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1368 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1369 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1370 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1371 ; CHECK-NEXT: ret <2 x double> %24

	1372

	1373 define <16 x double> @fdiv_binop_16xdouble_fast(<16 x double>, <16 x double>) {

	1374 %3 = fdiv fast <16 x double> %0, %1

	1375 ret <16 x double> %3

	1376 }

	1377 ; CHECK-LABEL: define <2 x double> @fdiv_binop_16xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>)

	1378 ; CHECK-NEXT: %24 = fdiv fast <2 x double> %7, %15

	1379 ; CHECK-NEXT: %25 = fdiv fast <2 x double> %8, %16

	1380 ; CHECK-NEXT: %26 = fdiv fast <2 x double> %9, %17

	1381 ; CHECK-NEXT: %27 = fdiv fast <2 x double> %10, %18

	1382 ; CHECK-NEXT: %28 = fdiv fast <2 x double> %11, %19

	1383 ; CHECK-NEXT: %29 = fdiv fast <2 x double> %12, %20

	1384 ; CHECK-NEXT: %30 = fdiv fast <2 x double> %13, %21

	1385 ; CHECK-NEXT: %31 = fdiv fast <2 x double> %14, %22

	1386 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1387 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1388 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1389 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1390 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1391 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1392 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1393 ; CHECK-NEXT: ret <2 x double> %24

	1394

	1395 define <16 x float> @frem_binop_16xfloat(<16 x float>, <16 x float>) {

	1396 %3 = frem <16 x float> %0, %1

	1397 ret <16 x float> %3

	1398 }

	1399 ; CHECK-LABEL: define <4 x float> @frem_binop_16xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1400 ; CHECK-NEXT: %12 = frem <4 x float> %3, %7

	1401 ; CHECK-NEXT: %13 = frem <4 x float> %4, %8

	1402 ; CHECK-NEXT: %14 = frem <4 x float> %5, %9

	1403 ; CHECK-NEXT: %15 = frem <4 x float> %6, %10

	1404 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1405 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1406 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1407 ; CHECK-NEXT: ret <4 x float> %12

	1408

	1409 define <16 x float> @frem_binop_16xfloat_fast(<16 x float>, <16 x float>) {

	1410 %3 = frem fast <16 x float> %0, %1

	1411 ret <16 x float> %3

	1412 }

	1413 ; CHECK-LABEL: define <4 x float> @frem_binop_16xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>, <4 x float> , <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1414 ; CHECK-NEXT: %12 = frem fast <4 x float> %3, %7

	1415 ; CHECK-NEXT: %13 = frem fast <4 x float> %4, %8

	1416 ; CHECK-NEXT: %14 = frem fast <4 x float> %5, %9

	1417 ; CHECK-NEXT: %15 = frem fast <4 x float> %6, %10

	1418 ; CHECK-NEXT: store <4 x float> %13, <4 x float>* %0, align 16

	1419 ; CHECK-NEXT: store <4 x float> %14, <4 x float>* %1, align 16

	1420 ; CHECK-NEXT: store <4 x float> %15, <4 x float>* %2, align 16

	1421 ; CHECK-NEXT: ret <4 x float> %12

	1422

	1423 define <16 x double> @frem_binop_16xdouble(<16 x double>, <16 x double>) {

	1424 %3 = frem <16 x double> %0, %1

	1425 ret <16 x double> %3

	1426 }

	1427 ; CHECK-LABEL: define <2 x double> @frem_binop_16xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x doubl e>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x d ouble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1428 ; CHECK-NEXT: %24 = frem <2 x double> %7, %15

	1429 ; CHECK-NEXT: %25 = frem <2 x double> %8, %16

	1430 ; CHECK-NEXT: %26 = frem <2 x double> %9, %17

	1431 ; CHECK-NEXT: %27 = frem <2 x double> %10, %18

	1432 ; CHECK-NEXT: %28 = frem <2 x double> %11, %19

	1433 ; CHECK-NEXT: %29 = frem <2 x double> %12, %20

	1434 ; CHECK-NEXT: %30 = frem <2 x double> %13, %21

	1435 ; CHECK-NEXT: %31 = frem <2 x double> %14, %22

	1436 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1437 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1438 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1439 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1440 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1441 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1442 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1443 ; CHECK-NEXT: ret <2 x double> %24

	1444

	1445 define <16 x double> @frem_binop_16xdouble_fast(<16 x double>, <16 x double>) {

	1446 %3 = frem fast <16 x double> %0, %1

	1447 ret <16 x double> %3

	1448 }

	1449 ; CHECK-LABEL: define <2 x double> @frem_binop_16xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, < 2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double >, <2 x double>)

	1450 ; CHECK-NEXT: %24 = frem fast <2 x double> %7, %15

	1451 ; CHECK-NEXT: %25 = frem fast <2 x double> %8, %16

	1452 ; CHECK-NEXT: %26 = frem fast <2 x double> %9, %17

	1453 ; CHECK-NEXT: %27 = frem fast <2 x double> %10, %18

	1454 ; CHECK-NEXT: %28 = frem fast <2 x double> %11, %19

	1455 ; CHECK-NEXT: %29 = frem fast <2 x double> %12, %20

	1456 ; CHECK-NEXT: %30 = frem fast <2 x double> %13, %21

	1457 ; CHECK-NEXT: %31 = frem fast <2 x double> %14, %22

	1458 ; CHECK-NEXT: store <2 x double> %25, <2 x double>* %0, align 16

	1459 ; CHECK-NEXT: store <2 x double> %26, <2 x double>* %1, align 16

	1460 ; CHECK-NEXT: store <2 x double> %27, <2 x double>* %2, align 16

	1461 ; CHECK-NEXT: store <2 x double> %28, <2 x double>* %3, align 16

	1462 ; CHECK-NEXT: store <2 x double> %29, <2 x double>* %4, align 16

	1463 ; CHECK-NEXT: store <2 x double> %30, <2 x double>* %5, align 16

	1464 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %6, align 16

	1465 ; CHECK-NEXT: ret <2 x double> %24

	1466

	1467 define <20 x float> @fadd_binop_20xfloat(<20 x float>, <20 x float>) {

	1468 %3 = fadd <20 x float> %0, %1

	1469 ret <20 x float> %3

	1470 }

	1471 ; CHECK-LABEL: define <4 x float> @fadd_binop_20xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnul l dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1472 ; CHECK-NEXT: %15 = fadd <4 x float> %4, %9

	1473 ; CHECK-NEXT: %16 = fadd <4 x float> %5, %10

	1474 ; CHECK-NEXT: %17 = fadd <4 x float> %6, %11

	1475 ; CHECK-NEXT: %18 = fadd <4 x float> %7, %12

	1476 ; CHECK-NEXT: %19 = fadd <4 x float> %8, %13

	1477 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1478 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1479 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1480 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1481 ; CHECK-NEXT: ret <4 x float> %15

	1482

	1483 define <20 x float> @fadd_binop_20xfloat_fast(<20 x float>, <20 x float>) {

	1484 %3 = fadd fast <20 x float> %0, %1

	1485 ret <20 x float> %3

	1486 }

	1487 ; CHECK-LABEL: define <4 x float> @fadd_binop_20xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1488 ; CHECK-NEXT: %15 = fadd fast <4 x float> %4, %9

	1489 ; CHECK-NEXT: %16 = fadd fast <4 x float> %5, %10

	1490 ; CHECK-NEXT: %17 = fadd fast <4 x float> %6, %11

	1491 ; CHECK-NEXT: %18 = fadd fast <4 x float> %7, %12

	1492 ; CHECK-NEXT: %19 = fadd fast <4 x float> %8, %13

	1493 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1494 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1495 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1496 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1497 ; CHECK-NEXT: ret <4 x float> %15

	1498

	1499 define <20 x double> @fadd_binop_20xdouble(<20 x double>, <20 x double>) {

	1500 %3 = fadd <20 x double> %0, %1

	1501 ret <20 x double> %3

	1502 }

	1503 ; CHECK-LABEL: define <2 x double> @fadd_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1504 ; CHECK-NEXT: %30 = fadd <2 x double> %9, %19

	1505 ; CHECK-NEXT: %31 = fadd <2 x double> %10, %20

	1506 ; CHECK-NEXT: %32 = fadd <2 x double> %11, %21

	1507 ; CHECK-NEXT: %33 = fadd <2 x double> %12, %22

	1508 ; CHECK-NEXT: %34 = fadd <2 x double> %13, %23

	1509 ; CHECK-NEXT: %35 = fadd <2 x double> %14, %24

	1510 ; CHECK-NEXT: %36 = fadd <2 x double> %15, %25

	1511 ; CHECK-NEXT: %37 = fadd <2 x double> %16, %26

	1512 ; CHECK-NEXT: %38 = fadd <2 x double> %17, %27

	1513 ; CHECK-NEXT: %39 = fadd <2 x double> %18, %28

	1514 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1515 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1516 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1517 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1518 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1519 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1520 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1521 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1522 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1523 ; CHECK-NEXT: ret <2 x double> %30

	1524

	1525 define <20 x double> @fadd_binop_20xdouble_fast(<20 x double>, <20 x double>) {

	1526 %3 = fadd fast <20 x double> %0, %1

	1527 ret <20 x double> %3

	1528 }

	1529 ; CHECK-LABEL: define <2 x double> @fadd_binop_20xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>)

	1530 ; CHECK-NEXT: %30 = fadd fast <2 x double> %9, %19

	1531 ; CHECK-NEXT: %31 = fadd fast <2 x double> %10, %20

	1532 ; CHECK-NEXT: %32 = fadd fast <2 x double> %11, %21

	1533 ; CHECK-NEXT: %33 = fadd fast <2 x double> %12, %22

	1534 ; CHECK-NEXT: %34 = fadd fast <2 x double> %13, %23

	1535 ; CHECK-NEXT: %35 = fadd fast <2 x double> %14, %24

	1536 ; CHECK-NEXT: %36 = fadd fast <2 x double> %15, %25

	1537 ; CHECK-NEXT: %37 = fadd fast <2 x double> %16, %26

	1538 ; CHECK-NEXT: %38 = fadd fast <2 x double> %17, %27

	1539 ; CHECK-NEXT: %39 = fadd fast <2 x double> %18, %28

	1540 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1541 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1542 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1543 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1544 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1545 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1546 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1547 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1548 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1549 ; CHECK-NEXT: ret <2 x double> %30

	1550

	1551 define <20 x float> @fsub_binop_20xfloat(<20 x float>, <20 x float>) {

	1552 %3 = fsub <20 x float> %0, %1

	1553 ret <20 x float> %3

	1554 }

	1555 ; CHECK-LABEL: define <4 x float> @fsub_binop_20xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnul l dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1556 ; CHECK-NEXT: %15 = fsub <4 x float> %4, %9

	1557 ; CHECK-NEXT: %16 = fsub <4 x float> %5, %10

	1558 ; CHECK-NEXT: %17 = fsub <4 x float> %6, %11

	1559 ; CHECK-NEXT: %18 = fsub <4 x float> %7, %12

	1560 ; CHECK-NEXT: %19 = fsub <4 x float> %8, %13

	1561 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1562 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1563 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1564 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1565 ; CHECK-NEXT: ret <4 x float> %15

	1566

	1567 define <20 x float> @fsub_binop_20xfloat_fast(<20 x float>, <20 x float>) {

	1568 %3 = fsub fast <20 x float> %0, %1

	1569 ret <20 x float> %3

	1570 }

	1571 ; CHECK-LABEL: define <4 x float> @fsub_binop_20xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1572 ; CHECK-NEXT: %15 = fsub fast <4 x float> %4, %9

	1573 ; CHECK-NEXT: %16 = fsub fast <4 x float> %5, %10

	1574 ; CHECK-NEXT: %17 = fsub fast <4 x float> %6, %11

	1575 ; CHECK-NEXT: %18 = fsub fast <4 x float> %7, %12

	1576 ; CHECK-NEXT: %19 = fsub fast <4 x float> %8, %13

	1577 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1578 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1579 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1580 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1581 ; CHECK-NEXT: ret <4 x float> %15

	1582

	1583 define <20 x double> @fsub_binop_20xdouble(<20 x double>, <20 x double>) {

	1584 %3 = fsub <20 x double> %0, %1

	1585 ret <20 x double> %3

	1586 }

	1587 ; CHECK-LABEL: define <2 x double> @fsub_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1588 ; CHECK-NEXT: %30 = fsub <2 x double> %9, %19

	1589 ; CHECK-NEXT: %31 = fsub <2 x double> %10, %20

	1590 ; CHECK-NEXT: %32 = fsub <2 x double> %11, %21

	1591 ; CHECK-NEXT: %33 = fsub <2 x double> %12, %22

	1592 ; CHECK-NEXT: %34 = fsub <2 x double> %13, %23

	1593 ; CHECK-NEXT: %35 = fsub <2 x double> %14, %24

	1594 ; CHECK-NEXT: %36 = fsub <2 x double> %15, %25

	1595 ; CHECK-NEXT: %37 = fsub <2 x double> %16, %26

	1596 ; CHECK-NEXT: %38 = fsub <2 x double> %17, %27

	1597 ; CHECK-NEXT: %39 = fsub <2 x double> %18, %28

	1598 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1599 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1600 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1601 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1602 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1603 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1604 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1605 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1606 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1607 ; CHECK-NEXT: ret <2 x double> %30

	1608

	1609 define <20 x double> @fsub_binop_20xdouble_fast(<20 x double>, <20 x double>) {

	1610 %3 = fsub fast <20 x double> %0, %1

	1611 ret <20 x double> %3

	1612 }

	1613 ; CHECK-LABEL: define <2 x double> @fsub_binop_20xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>)

	1614 ; CHECK-NEXT: %30 = fsub fast <2 x double> %9, %19

	1615 ; CHECK-NEXT: %31 = fsub fast <2 x double> %10, %20

	1616 ; CHECK-NEXT: %32 = fsub fast <2 x double> %11, %21

	1617 ; CHECK-NEXT: %33 = fsub fast <2 x double> %12, %22

	1618 ; CHECK-NEXT: %34 = fsub fast <2 x double> %13, %23

	1619 ; CHECK-NEXT: %35 = fsub fast <2 x double> %14, %24

	1620 ; CHECK-NEXT: %36 = fsub fast <2 x double> %15, %25

	1621 ; CHECK-NEXT: %37 = fsub fast <2 x double> %16, %26

	1622 ; CHECK-NEXT: %38 = fsub fast <2 x double> %17, %27

	1623 ; CHECK-NEXT: %39 = fsub fast <2 x double> %18, %28

	1624 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1625 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1626 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1627 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1628 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1629 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1630 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1631 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1632 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1633 ; CHECK-NEXT: ret <2 x double> %30

	1634

	1635 define <20 x float> @fmul_binop_20xfloat(<20 x float>, <20 x float>) {

	1636 %3 = fmul <20 x float> %0, %1

	1637 ret <20 x float> %3

	1638 }

	1639 ; CHECK-LABEL: define <4 x float> @fmul_binop_20xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnul l dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1640 ; CHECK-NEXT: %15 = fmul <4 x float> %4, %9

	1641 ; CHECK-NEXT: %16 = fmul <4 x float> %5, %10

	1642 ; CHECK-NEXT: %17 = fmul <4 x float> %6, %11

	1643 ; CHECK-NEXT: %18 = fmul <4 x float> %7, %12

	1644 ; CHECK-NEXT: %19 = fmul <4 x float> %8, %13

	1645 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1646 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1647 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1648 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1649 ; CHECK-NEXT: ret <4 x float> %15

	1650

	1651 define <20 x float> @fmul_binop_20xfloat_fast(<20 x float>, <20 x float>) {

	1652 %3 = fmul fast <20 x float> %0, %1

	1653 ret <20 x float> %3

	1654 }

	1655 ; CHECK-LABEL: define <4 x float> @fmul_binop_20xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1656 ; CHECK-NEXT: %15 = fmul fast <4 x float> %4, %9

	1657 ; CHECK-NEXT: %16 = fmul fast <4 x float> %5, %10

	1658 ; CHECK-NEXT: %17 = fmul fast <4 x float> %6, %11

	1659 ; CHECK-NEXT: %18 = fmul fast <4 x float> %7, %12

	1660 ; CHECK-NEXT: %19 = fmul fast <4 x float> %8, %13

	1661 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1662 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1663 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1664 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1665 ; CHECK-NEXT: ret <4 x float> %15

	1666

	1667 define <20 x double> @fmul_binop_20xdouble(<20 x double>, <20 x double>) {

	1668 %3 = fmul <20 x double> %0, %1

	1669 ret <20 x double> %3

	1670 }

	1671 ; CHECK-LABEL: define <2 x double> @fmul_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1672 ; CHECK-NEXT: %30 = fmul <2 x double> %9, %19

	1673 ; CHECK-NEXT: %31 = fmul <2 x double> %10, %20

	1674 ; CHECK-NEXT: %32 = fmul <2 x double> %11, %21

	1675 ; CHECK-NEXT: %33 = fmul <2 x double> %12, %22

	1676 ; CHECK-NEXT: %34 = fmul <2 x double> %13, %23

	1677 ; CHECK-NEXT: %35 = fmul <2 x double> %14, %24

	1678 ; CHECK-NEXT: %36 = fmul <2 x double> %15, %25

	1679 ; CHECK-NEXT: %37 = fmul <2 x double> %16, %26

	1680 ; CHECK-NEXT: %38 = fmul <2 x double> %17, %27

	1681 ; CHECK-NEXT: %39 = fmul <2 x double> %18, %28

	1682 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1683 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1684 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1685 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1686 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1687 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1688 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1689 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1690 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1691 ; CHECK-NEXT: ret <2 x double> %30

	1692

	1693 define <20 x double> @fmul_binop_20xdouble_fast(<20 x double>, <20 x double>) {

	1694 %3 = fmul fast <20 x double> %0, %1

	1695 ret <20 x double> %3

	1696 }

	1697 ; CHECK-LABEL: define <2 x double> @fmul_binop_20xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>)

	1698 ; CHECK-NEXT: %30 = fmul fast <2 x double> %9, %19

	1699 ; CHECK-NEXT: %31 = fmul fast <2 x double> %10, %20

	1700 ; CHECK-NEXT: %32 = fmul fast <2 x double> %11, %21

	1701 ; CHECK-NEXT: %33 = fmul fast <2 x double> %12, %22

	1702 ; CHECK-NEXT: %34 = fmul fast <2 x double> %13, %23

	1703 ; CHECK-NEXT: %35 = fmul fast <2 x double> %14, %24

	1704 ; CHECK-NEXT: %36 = fmul fast <2 x double> %15, %25

	1705 ; CHECK-NEXT: %37 = fmul fast <2 x double> %16, %26

	1706 ; CHECK-NEXT: %38 = fmul fast <2 x double> %17, %27

	1707 ; CHECK-NEXT: %39 = fmul fast <2 x double> %18, %28

	1708 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1709 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1710 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1711 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1712 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1713 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1714 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1715 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1716 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1717 ; CHECK-NEXT: ret <2 x double> %30

	1718

	1719 define <20 x float> @fdiv_binop_20xfloat(<20 x float>, <20 x float>) {

	1720 %3 = fdiv <20 x float> %0, %1

	1721 ret <20 x float> %3

	1722 }

	1723 ; CHECK-LABEL: define <4 x float> @fdiv_binop_20xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnul l dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1724 ; CHECK-NEXT: %15 = fdiv <4 x float> %4, %9

	1725 ; CHECK-NEXT: %16 = fdiv <4 x float> %5, %10

	1726 ; CHECK-NEXT: %17 = fdiv <4 x float> %6, %11

	1727 ; CHECK-NEXT: %18 = fdiv <4 x float> %7, %12

	1728 ; CHECK-NEXT: %19 = fdiv <4 x float> %8, %13

	1729 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1730 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1731 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1732 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1733 ; CHECK-NEXT: ret <4 x float> %15

	1734

	1735 define <20 x float> @fdiv_binop_20xfloat_fast(<20 x float>, <20 x float>) {

	1736 %3 = fdiv fast <20 x float> %0, %1

	1737 ret <20 x float> %3

	1738 }

	1739 ; CHECK-LABEL: define <4 x float> @fdiv_binop_20xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1740 ; CHECK-NEXT: %15 = fdiv fast <4 x float> %4, %9

	1741 ; CHECK-NEXT: %16 = fdiv fast <4 x float> %5, %10

	1742 ; CHECK-NEXT: %17 = fdiv fast <4 x float> %6, %11

	1743 ; CHECK-NEXT: %18 = fdiv fast <4 x float> %7, %12

	1744 ; CHECK-NEXT: %19 = fdiv fast <4 x float> %8, %13

	1745 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1746 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1747 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1748 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1749 ; CHECK-NEXT: ret <4 x float> %15

	1750

	1751 define <20 x double> @fdiv_binop_20xdouble(<20 x double>, <20 x double>) {

	1752 %3 = fdiv <20 x double> %0, %1

	1753 ret <20 x double> %3

	1754 }

	1755 ; CHECK-LABEL: define <2 x double> @fdiv_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1756 ; CHECK-NEXT: %30 = fdiv <2 x double> %9, %19

	1757 ; CHECK-NEXT: %31 = fdiv <2 x double> %10, %20

	1758 ; CHECK-NEXT: %32 = fdiv <2 x double> %11, %21

	1759 ; CHECK-NEXT: %33 = fdiv <2 x double> %12, %22

	1760 ; CHECK-NEXT: %34 = fdiv <2 x double> %13, %23

	1761 ; CHECK-NEXT: %35 = fdiv <2 x double> %14, %24

	1762 ; CHECK-NEXT: %36 = fdiv <2 x double> %15, %25

	1763 ; CHECK-NEXT: %37 = fdiv <2 x double> %16, %26

	1764 ; CHECK-NEXT: %38 = fdiv <2 x double> %17, %27

	1765 ; CHECK-NEXT: %39 = fdiv <2 x double> %18, %28

	1766 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1767 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1768 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1769 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1770 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1771 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1772 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1773 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1774 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1775 ; CHECK-NEXT: ret <2 x double> %30

	1776

	1777 define <20 x double> @fdiv_binop_20xdouble_fast(<20 x double>, <20 x double>) {

	1778 %3 = fdiv fast <20 x double> %0, %1

	1779 ret <20 x double> %3

	1780 }

	1781 ; CHECK-LABEL: define <2 x double> @fdiv_binop_20xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>)

	1782 ; CHECK-NEXT: %30 = fdiv fast <2 x double> %9, %19

	1783 ; CHECK-NEXT: %31 = fdiv fast <2 x double> %10, %20

	1784 ; CHECK-NEXT: %32 = fdiv fast <2 x double> %11, %21

	1785 ; CHECK-NEXT: %33 = fdiv fast <2 x double> %12, %22

	1786 ; CHECK-NEXT: %34 = fdiv fast <2 x double> %13, %23

	1787 ; CHECK-NEXT: %35 = fdiv fast <2 x double> %14, %24

	1788 ; CHECK-NEXT: %36 = fdiv fast <2 x double> %15, %25

	1789 ; CHECK-NEXT: %37 = fdiv fast <2 x double> %16, %26

	1790 ; CHECK-NEXT: %38 = fdiv fast <2 x double> %17, %27

	1791 ; CHECK-NEXT: %39 = fdiv fast <2 x double> %18, %28

	1792 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1793 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1794 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1795 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1796 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1797 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1798 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1799 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1800 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1801 ; CHECK-NEXT: ret <2 x double> %30

	1802

	1803 define <20 x float> @frem_binop_20xfloat(<20 x float>, <20 x float>) {

	1804 %3 = frem <20 x float> %0, %1

	1805 ret <20 x float> %3

	1806 }

	1807 ; CHECK-LABEL: define <4 x float> @frem_binop_20xfloat(<4 x float>* nocapture no nnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(16), < 4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture nonnul l dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1808 ; CHECK-NEXT: %15 = frem <4 x float> %4, %9

	1809 ; CHECK-NEXT: %16 = frem <4 x float> %5, %10

	1810 ; CHECK-NEXT: %17 = frem <4 x float> %6, %11

	1811 ; CHECK-NEXT: %18 = frem <4 x float> %7, %12

	1812 ; CHECK-NEXT: %19 = frem <4 x float> %8, %13

	1813 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1814 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1815 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1816 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1817 ; CHECK-NEXT: ret <4 x float> %15

	1818

	1819 define <20 x float> @frem_binop_20xfloat_fast(<20 x float>, <20 x float>) {

	1820 %3 = frem fast <20 x float> %0, %1

	1821 ret <20 x float> %3

	1822 }

	1823 ; CHECK-LABEL: define <4 x float> @frem_binop_20xfloat_fast(<4 x float>* nocaptu re nonnull dereferenceable(16), <4 x float>* nocapture nonnull dereferenceable(1 6), <4 x float>* nocapture nonnull dereferenceable(16), <4 x float>* nocapture n onnull dereferenceable(16), <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)

	1824 ; CHECK-NEXT: %15 = frem fast <4 x float> %4, %9

	1825 ; CHECK-NEXT: %16 = frem fast <4 x float> %5, %10

	1826 ; CHECK-NEXT: %17 = frem fast <4 x float> %6, %11

	1827 ; CHECK-NEXT: %18 = frem fast <4 x float> %7, %12

	1828 ; CHECK-NEXT: %19 = frem fast <4 x float> %8, %13

	1829 ; CHECK-NEXT: store <4 x float> %16, <4 x float>* %0, align 16

	1830 ; CHECK-NEXT: store <4 x float> %17, <4 x float>* %1, align 16

	1831 ; CHECK-NEXT: store <4 x float> %18, <4 x float>* %2, align 16

	1832 ; CHECK-NEXT: store <4 x float> %19, <4 x float>* %3, align 16

	1833 ; CHECK-NEXT: ret <4 x float> %15

	1834

	1835 define <20 x double> @frem_binop_20xdouble(<20 x double>, <20 x double>) {

	1836 %3 = frem <20 x double> %0, %1

	1837 ret <20 x double> %3

	1838 }

	1839 ; CHECK-LABEL: define <2 x double> @frem_binop_20xdouble(<2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16 ), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16) , <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture n onnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x double> , <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x dou ble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>)

	1840 ; CHECK-NEXT: %30 = frem <2 x double> %9, %19

	1841 ; CHECK-NEXT: %31 = frem <2 x double> %10, %20

	1842 ; CHECK-NEXT: %32 = frem <2 x double> %11, %21

	1843 ; CHECK-NEXT: %33 = frem <2 x double> %12, %22

	1844 ; CHECK-NEXT: %34 = frem <2 x double> %13, %23

	1845 ; CHECK-NEXT: %35 = frem <2 x double> %14, %24

	1846 ; CHECK-NEXT: %36 = frem <2 x double> %15, %25

	1847 ; CHECK-NEXT: %37 = frem <2 x double> %16, %26

	1848 ; CHECK-NEXT: %38 = frem <2 x double> %17, %27

	1849 ; CHECK-NEXT: %39 = frem <2 x double> %18, %28

	1850 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1851 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1852 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1853 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1854 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1855 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1856 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1857 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1858 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1859 ; CHECK-NEXT: ret <2 x double> %30

	1860

	1861 define <20 x double> @frem_binop_20xdouble_fast(<20 x double>, <20 x double>) {

	1862 %3 = frem fast <20 x double> %0, %1

	1863 ret <20 x double> %3

	1864 }

	1865 ; CHECK-LABEL: define <2 x double> @frem_binop_20xdouble_fast(<2 x double>* noca pture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceab le(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocap ture nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceabl e(16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>* nocapt ure nonnull dereferenceable(16), <2 x double>* nocapture nonnull dereferenceable (16), <2 x double>* nocapture nonnull dereferenceable(16), <2 x double>, <2 x do uble>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x double>, <2 x doub le>, <2 x double>)

	1866 ; CHECK-NEXT: %30 = frem fast <2 x double> %9, %19

	1867 ; CHECK-NEXT: %31 = frem fast <2 x double> %10, %20

	1868 ; CHECK-NEXT: %32 = frem fast <2 x double> %11, %21

	1869 ; CHECK-NEXT: %33 = frem fast <2 x double> %12, %22

	1870 ; CHECK-NEXT: %34 = frem fast <2 x double> %13, %23

	1871 ; CHECK-NEXT: %35 = frem fast <2 x double> %14, %24

	1872 ; CHECK-NEXT: %36 = frem fast <2 x double> %15, %25

	1873 ; CHECK-NEXT: %37 = frem fast <2 x double> %16, %26

	1874 ; CHECK-NEXT: %38 = frem fast <2 x double> %17, %27

	1875 ; CHECK-NEXT: %39 = frem fast <2 x double> %18, %28

	1876 ; CHECK-NEXT: store <2 x double> %31, <2 x double>* %0, align 16

	1877 ; CHECK-NEXT: store <2 x double> %32, <2 x double>* %1, align 16

	1878 ; CHECK-NEXT: store <2 x double> %33, <2 x double>* %2, align 16

	1879 ; CHECK-NEXT: store <2 x double> %34, <2 x double>* %3, align 16

	1880 ; CHECK-NEXT: store <2 x double> %35, <2 x double>* %4, align 16

	1881 ; CHECK-NEXT: store <2 x double> %36, <2 x double>* %5, align 16

	1882 ; CHECK-NEXT: store <2 x double> %37, <2 x double>* %6, align 16

	1883 ; CHECK-NEXT: store <2 x double> %38, <2 x double>* %7, align 16

	1884 ; CHECK-NEXT: store <2 x double> %39, <2 x double>* %8, align 16

	1885 ; CHECK-NEXT: ret <2 x double> %30

	1886

	1887 define <2 x i8> @add_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {

	1888 %3 = add nuw <2 x i8> %0, %1

	1889 ret <2 x i8> %3

	1890 }

	1891 ; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nuw(<16 x i8>, <16 x i8>)

	1892 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	1893 ; CHECK-NEXT: ret <16 x i8> %3

	1894

	1895 define <2 x i8> @add_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {

	1896 %3 = add nsw <2 x i8> %0, %1

	1897 ret <2 x i8> %3

	1898 }

	1899 ; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nsw(<16 x i8>, <16 x i8>)

	1900 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	1901 ; CHECK-NEXT: ret <16 x i8> %3

	1902

	1903 define <2 x i8> @add_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {

	1904 %3 = add nuw nsw <2 x i8> %0, %1

	1905 ret <2 x i8> %3

	1906 }

	1907 ; CHECK-LABEL: define <16 x i8> @add_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	1908 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	1909 ; CHECK-NEXT: ret <16 x i8> %3

	1910

	1911 define <2 x i8> @sub_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {

	1912 %3 = sub nuw <2 x i8> %0, %1

	1913 ret <2 x i8> %3

	1914 }

	1915 ; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nuw(<16 x i8>, <16 x i8>)

	1916 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	1917 ; CHECK-NEXT: ret <16 x i8> %3

	1918

	1919 define <2 x i8> @sub_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {

	1920 %3 = sub nsw <2 x i8> %0, %1

	1921 ret <2 x i8> %3

	1922 }

	1923 ; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nsw(<16 x i8>, <16 x i8>)

	1924 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	1925 ; CHECK-NEXT: ret <16 x i8> %3

	1926

	1927 define <2 x i8> @sub_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {

	1928 %3 = sub nuw nsw <2 x i8> %0, %1

	1929 ret <2 x i8> %3

	1930 }

	1931 ; CHECK-LABEL: define <16 x i8> @sub_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	1932 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	1933 ; CHECK-NEXT: ret <16 x i8> %3

	1934

	1935 define <2 x i8> @mul_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {

	1936 %3 = mul nuw <2 x i8> %0, %1

	1937 ret <2 x i8> %3

	1938 }

	1939 ; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nuw(<16 x i8>, <16 x i8>)

	1940 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	1941 ; CHECK-NEXT: ret <16 x i8> %3

	1942

	1943 define <2 x i8> @mul_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {

	1944 %3 = mul nsw <2 x i8> %0, %1

	1945 ret <2 x i8> %3

	1946 }

	1947 ; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nsw(<16 x i8>, <16 x i8>)

	1948 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	1949 ; CHECK-NEXT: ret <16 x i8> %3

	1950

	1951 define <2 x i8> @mul_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {

	1952 %3 = mul nuw nsw <2 x i8> %0, %1

	1953 ret <2 x i8> %3

	1954 }

	1955 ; CHECK-LABEL: define <16 x i8> @mul_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	1956 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	1957 ; CHECK-NEXT: ret <16 x i8> %3

	1958

	1959 define <2 x i8> @shl_binop_2xi8_nuw(<2 x i8>, <2 x i8>) {

	1960 %3 = shl nuw <2 x i8> %0, %1

	1961 ret <2 x i8> %3

	1962 }

	1963 ; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nuw(<16 x i8>, <16 x i8>)

	1964 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	1965 ; CHECK-NEXT: ret <16 x i8> %3

	1966

	1967 define <2 x i8> @shl_binop_2xi8_nsw(<2 x i8>, <2 x i8>) {

	1968 %3 = shl nsw <2 x i8> %0, %1

	1969 ret <2 x i8> %3

	1970 }

	1971 ; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nsw(<16 x i8>, <16 x i8>)

	1972 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	1973 ; CHECK-NEXT: ret <16 x i8> %3

	1974

	1975 define <2 x i8> @shl_binop_2xi8_nuw_nsw(<2 x i8>, <2 x i8>) {

	1976 %3 = shl nuw nsw <2 x i8> %0, %1

	1977 ret <2 x i8> %3

	1978 }

	1979 ; CHECK-LABEL: define <16 x i8> @shl_binop_2xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	1980 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	1981 ; CHECK-NEXT: ret <16 x i8> %3

	1982

	1983 define <2 x i8> @udiv_binop_2xi8(<2 x i8>, <2 x i8>) {

	1984 %3 = udiv <2 x i8> %0, %1

	1985 ret <2 x i8> %3

	1986 }

	1987 ; CHECK-LABEL: define <16 x i8> @udiv_binop_2xi8(<16 x i8>, <16 x i8>)

	1988 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	1989 ; CHECK-NEXT: ret <16 x i8> %3

	1990

	1991 define <2 x i8> @udiv_binop_2xi8_exact(<2 x i8>, <2 x i8>) {

	1992 %3 = udiv exact <2 x i8> %0, %1

	1993 ret <2 x i8> %3

	1994 }

	1995 ; CHECK-LABEL: define <16 x i8> @udiv_binop_2xi8_exact(<16 x i8>, <16 x i8>)

	1996 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	1997 ; CHECK-NEXT: ret <16 x i8> %3

	1998

	1999 define <2 x i8> @sdiv_binop_2xi8(<2 x i8>, <2 x i8>) {

	2000 %3 = sdiv <2 x i8> %0, %1

	2001 ret <2 x i8> %3

	2002 }

	2003 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_2xi8(<16 x i8>, <16 x i8>)

	2004 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	2005 ; CHECK-NEXT: ret <16 x i8> %3

	2006

	2007 define <2 x i8> @sdiv_binop_2xi8_exact(<2 x i8>, <2 x i8>) {

	2008 %3 = sdiv exact <2 x i8> %0, %1

	2009 ret <2 x i8> %3

	2010 }

	2011 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_2xi8_exact(<16 x i8>, <16 x i8>)

	2012 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	2013 ; CHECK-NEXT: ret <16 x i8> %3

	2014

	2015 define <2 x i8> @lshr_binop_2xi8(<2 x i8>, <2 x i8>) {

	2016 %3 = lshr <2 x i8> %0, %1

	2017 ret <2 x i8> %3

	2018 }

	2019 ; CHECK-LABEL: define <16 x i8> @lshr_binop_2xi8(<16 x i8>, <16 x i8>)

	2020 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	2021 ; CHECK-NEXT: ret <16 x i8> %3

	2022

	2023 define <2 x i8> @lshr_binop_2xi8_exact(<2 x i8>, <2 x i8>) {

	2024 %3 = lshr exact <2 x i8> %0, %1

	2025 ret <2 x i8> %3

	2026 }

	2027 ; CHECK-LABEL: define <16 x i8> @lshr_binop_2xi8_exact(<16 x i8>, <16 x i8>)

	2028 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	2029 ; CHECK-NEXT: ret <16 x i8> %3

	2030

	2031 define <2 x i8> @ashr_binop_2xi8(<2 x i8>, <2 x i8>) {

	2032 %3 = ashr <2 x i8> %0, %1

	2033 ret <2 x i8> %3

	2034 }

	2035 ; CHECK-LABEL: define <16 x i8> @ashr_binop_2xi8(<16 x i8>, <16 x i8>)

	2036 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	2037 ; CHECK-NEXT: ret <16 x i8> %3

	2038

	2039 define <2 x i8> @ashr_binop_2xi8_exact(<2 x i8>, <2 x i8>) {

	2040 %3 = ashr exact <2 x i8> %0, %1

	2041 ret <2 x i8> %3

	2042 }

	2043 ; CHECK-LABEL: define <16 x i8> @ashr_binop_2xi8_exact(<16 x i8>, <16 x i8>)

	2044 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	2045 ; CHECK-NEXT: ret <16 x i8> %3

	2046

	2047 define <2 x i8> @and_binop_2xi8(<2 x i8>, <2 x i8>) {

	2048 %3 = and <2 x i8> %0, %1

	2049 ret <2 x i8> %3

	2050 }

	2051 ; CHECK-LABEL: define <16 x i8> @and_binop_2xi8(<16 x i8>, <16 x i8>)

	2052 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	2053 ; CHECK-NEXT: ret <16 x i8> %3

	2054

	2055 define <2 x i8> @xor_binop_2xi8(<2 x i8>, <2 x i8>) {

	2056 %3 = xor <2 x i8> %0, %1

	2057 ret <2 x i8> %3

	2058 }

	2059 ; CHECK-LABEL: define <16 x i8> @xor_binop_2xi8(<16 x i8>, <16 x i8>)

	2060 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	2061 ; CHECK-NEXT: ret <16 x i8> %3

	2062

	2063 define <2 x i8> @or_binop_2xi8(<2 x i8>, <2 x i8>) {

	2064 %3 = or <2 x i8> %0, %1

	2065 ret <2 x i8> %3

	2066 }

	2067 ; CHECK-LABEL: define <16 x i8> @or_binop_2xi8(<16 x i8>, <16 x i8>)

	2068 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	2069 ; CHECK-NEXT: ret <16 x i8> %3

	2070

	2071 define <2 x i8> @urem_binop_2xi8(<2 x i8>, <2 x i8>) {

	2072 %3 = urem <2 x i8> %0, %1

	2073 ret <2 x i8> %3

	2074 }

	2075 ; CHECK-LABEL: define <16 x i8> @urem_binop_2xi8(<16 x i8>, <16 x i8>)

	2076 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	2077 ; CHECK-NEXT: ret <16 x i8> %3

	2078

	2079 define <2 x i8> @srem_binop_2xi8(<2 x i8>, <2 x i8>) {

	2080 %3 = srem <2 x i8> %0, %1

	2081 ret <2 x i8> %3

	2082 }

	2083 ; CHECK-LABEL: define <16 x i8> @srem_binop_2xi8(<16 x i8>, <16 x i8>)

	2084 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	2085 ; CHECK-NEXT: ret <16 x i8> %3

	2086

	2087 define <2 x i16> @add_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {

	2088 %3 = add nuw <2 x i16> %0, %1

	2089 ret <2 x i16> %3

	2090 }

	2091 ; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nuw(<8 x i16>, <8 x i16>)

	2092 ; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1

	2093 ; CHECK-NEXT: ret <8 x i16> %3

	2094

	2095 define <2 x i16> @add_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {

	2096 %3 = add nsw <2 x i16> %0, %1

	2097 ret <2 x i16> %3

	2098 }

	2099 ; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nsw(<8 x i16>, <8 x i16>)

	2100 ; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1

	2101 ; CHECK-NEXT: ret <8 x i16> %3

	2102

	2103 define <2 x i16> @add_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {

	2104 %3 = add nuw nsw <2 x i16> %0, %1

	2105 ret <2 x i16> %3

	2106 }

	2107 ; CHECK-LABEL: define <8 x i16> @add_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2108 ; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1

	2109 ; CHECK-NEXT: ret <8 x i16> %3

	2110

	2111 define <2 x i16> @sub_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {

	2112 %3 = sub nuw <2 x i16> %0, %1

	2113 ret <2 x i16> %3

	2114 }

	2115 ; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nuw(<8 x i16>, <8 x i16>)

	2116 ; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1

	2117 ; CHECK-NEXT: ret <8 x i16> %3

	2118

	2119 define <2 x i16> @sub_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {

	2120 %3 = sub nsw <2 x i16> %0, %1

	2121 ret <2 x i16> %3

	2122 }

	2123 ; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nsw(<8 x i16>, <8 x i16>)

	2124 ; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1

	2125 ; CHECK-NEXT: ret <8 x i16> %3

	2126

	2127 define <2 x i16> @sub_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {

	2128 %3 = sub nuw nsw <2 x i16> %0, %1

	2129 ret <2 x i16> %3

	2130 }

	2131 ; CHECK-LABEL: define <8 x i16> @sub_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2132 ; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1

	2133 ; CHECK-NEXT: ret <8 x i16> %3

	2134

	2135 define <2 x i16> @mul_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {

	2136 %3 = mul nuw <2 x i16> %0, %1

	2137 ret <2 x i16> %3

	2138 }

	2139 ; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nuw(<8 x i16>, <8 x i16>)

	2140 ; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1

	2141 ; CHECK-NEXT: ret <8 x i16> %3

	2142

	2143 define <2 x i16> @mul_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {

	2144 %3 = mul nsw <2 x i16> %0, %1

	2145 ret <2 x i16> %3

	2146 }

	2147 ; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nsw(<8 x i16>, <8 x i16>)

	2148 ; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1

	2149 ; CHECK-NEXT: ret <8 x i16> %3

	2150

	2151 define <2 x i16> @mul_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {

	2152 %3 = mul nuw nsw <2 x i16> %0, %1

	2153 ret <2 x i16> %3

	2154 }

	2155 ; CHECK-LABEL: define <8 x i16> @mul_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2156 ; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1

	2157 ; CHECK-NEXT: ret <8 x i16> %3

	2158

	2159 define <2 x i16> @shl_binop_2xi16_nuw(<2 x i16>, <2 x i16>) {

	2160 %3 = shl nuw <2 x i16> %0, %1

	2161 ret <2 x i16> %3

	2162 }

	2163 ; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nuw(<8 x i16>, <8 x i16>)

	2164 ; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1

	2165 ; CHECK-NEXT: ret <8 x i16> %3

	2166

	2167 define <2 x i16> @shl_binop_2xi16_nsw(<2 x i16>, <2 x i16>) {

	2168 %3 = shl nsw <2 x i16> %0, %1

	2169 ret <2 x i16> %3

	2170 }

	2171 ; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nsw(<8 x i16>, <8 x i16>)

	2172 ; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1

	2173 ; CHECK-NEXT: ret <8 x i16> %3

	2174

	2175 define <2 x i16> @shl_binop_2xi16_nuw_nsw(<2 x i16>, <2 x i16>) {

	2176 %3 = shl nuw nsw <2 x i16> %0, %1

	2177 ret <2 x i16> %3

	2178 }

	2179 ; CHECK-LABEL: define <8 x i16> @shl_binop_2xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2180 ; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1

	2181 ; CHECK-NEXT: ret <8 x i16> %3

	2182

	2183 define <2 x i16> @udiv_binop_2xi16(<2 x i16>, <2 x i16>) {

	2184 %3 = udiv <2 x i16> %0, %1

	2185 ret <2 x i16> %3

	2186 }

	2187 ; CHECK-LABEL: define <8 x i16> @udiv_binop_2xi16(<8 x i16>, <8 x i16>)

	2188 ; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1

	2189 ; CHECK-NEXT: ret <8 x i16> %3

	2190

	2191 define <2 x i16> @udiv_binop_2xi16_exact(<2 x i16>, <2 x i16>) {

	2192 %3 = udiv exact <2 x i16> %0, %1

	2193 ret <2 x i16> %3

	2194 }

	2195 ; CHECK-LABEL: define <8 x i16> @udiv_binop_2xi16_exact(<8 x i16>, <8 x i16>)

	2196 ; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1

	2197 ; CHECK-NEXT: ret <8 x i16> %3

	2198

	2199 define <2 x i16> @sdiv_binop_2xi16(<2 x i16>, <2 x i16>) {

	2200 %3 = sdiv <2 x i16> %0, %1

	2201 ret <2 x i16> %3

	2202 }

	2203 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_2xi16(<8 x i16>, <8 x i16>)

	2204 ; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1

	2205 ; CHECK-NEXT: ret <8 x i16> %3

	2206

	2207 define <2 x i16> @sdiv_binop_2xi16_exact(<2 x i16>, <2 x i16>) {

	2208 %3 = sdiv exact <2 x i16> %0, %1

	2209 ret <2 x i16> %3

	2210 }

	2211 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_2xi16_exact(<8 x i16>, <8 x i16>)

	2212 ; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1

	2213 ; CHECK-NEXT: ret <8 x i16> %3

	2214

	2215 define <2 x i16> @lshr_binop_2xi16(<2 x i16>, <2 x i16>) {

	2216 %3 = lshr <2 x i16> %0, %1

	2217 ret <2 x i16> %3

	2218 }

	2219 ; CHECK-LABEL: define <8 x i16> @lshr_binop_2xi16(<8 x i16>, <8 x i16>)

	2220 ; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1

	2221 ; CHECK-NEXT: ret <8 x i16> %3

	2222

	2223 define <2 x i16> @lshr_binop_2xi16_exact(<2 x i16>, <2 x i16>) {

	2224 %3 = lshr exact <2 x i16> %0, %1

	2225 ret <2 x i16> %3

	2226 }

	2227 ; CHECK-LABEL: define <8 x i16> @lshr_binop_2xi16_exact(<8 x i16>, <8 x i16>)

	2228 ; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1

	2229 ; CHECK-NEXT: ret <8 x i16> %3

	2230

	2231 define <2 x i16> @ashr_binop_2xi16(<2 x i16>, <2 x i16>) {

	2232 %3 = ashr <2 x i16> %0, %1

	2233 ret <2 x i16> %3

	2234 }

	2235 ; CHECK-LABEL: define <8 x i16> @ashr_binop_2xi16(<8 x i16>, <8 x i16>)

	2236 ; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1

	2237 ; CHECK-NEXT: ret <8 x i16> %3

	2238

	2239 define <2 x i16> @ashr_binop_2xi16_exact(<2 x i16>, <2 x i16>) {

	2240 %3 = ashr exact <2 x i16> %0, %1

	2241 ret <2 x i16> %3

	2242 }

	2243 ; CHECK-LABEL: define <8 x i16> @ashr_binop_2xi16_exact(<8 x i16>, <8 x i16>)

	2244 ; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1

	2245 ; CHECK-NEXT: ret <8 x i16> %3

	2246

	2247 define <2 x i16> @and_binop_2xi16(<2 x i16>, <2 x i16>) {

	2248 %3 = and <2 x i16> %0, %1

	2249 ret <2 x i16> %3

	2250 }

	2251 ; CHECK-LABEL: define <8 x i16> @and_binop_2xi16(<8 x i16>, <8 x i16>)

	2252 ; CHECK-NEXT: %3 = and <8 x i16> %0, %1

	2253 ; CHECK-NEXT: ret <8 x i16> %3

	2254

	2255 define <2 x i16> @xor_binop_2xi16(<2 x i16>, <2 x i16>) {

	2256 %3 = xor <2 x i16> %0, %1

	2257 ret <2 x i16> %3

	2258 }

	2259 ; CHECK-LABEL: define <8 x i16> @xor_binop_2xi16(<8 x i16>, <8 x i16>)

	2260 ; CHECK-NEXT: %3 = xor <8 x i16> %0, %1

	2261 ; CHECK-NEXT: ret <8 x i16> %3

	2262

	2263 define <2 x i16> @or_binop_2xi16(<2 x i16>, <2 x i16>) {

	2264 %3 = or <2 x i16> %0, %1

	2265 ret <2 x i16> %3

	2266 }

	2267 ; CHECK-LABEL: define <8 x i16> @or_binop_2xi16(<8 x i16>, <8 x i16>)

	2268 ; CHECK-NEXT: %3 = or <8 x i16> %0, %1

	2269 ; CHECK-NEXT: ret <8 x i16> %3

	2270

	2271 define <2 x i16> @urem_binop_2xi16(<2 x i16>, <2 x i16>) {

	2272 %3 = urem <2 x i16> %0, %1

	2273 ret <2 x i16> %3

	2274 }

	2275 ; CHECK-LABEL: define <8 x i16> @urem_binop_2xi16(<8 x i16>, <8 x i16>)

	2276 ; CHECK-NEXT: %3 = urem <8 x i16> %0, %1

	2277 ; CHECK-NEXT: ret <8 x i16> %3

	2278

	2279 define <2 x i16> @srem_binop_2xi16(<2 x i16>, <2 x i16>) {

	2280 %3 = srem <2 x i16> %0, %1

	2281 ret <2 x i16> %3

	2282 }

	2283 ; CHECK-LABEL: define <8 x i16> @srem_binop_2xi16(<8 x i16>, <8 x i16>)

	2284 ; CHECK-NEXT: %3 = srem <8 x i16> %0, %1

	2285 ; CHECK-NEXT: ret <8 x i16> %3

	2286

	2287 define <2 x i32> @add_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {

	2288 %3 = add nuw <2 x i32> %0, %1

	2289 ret <2 x i32> %3

	2290 }

	2291 ; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nuw(<4 x i32>, <4 x i32>)

	2292 ; CHECK-NEXT: %3 = add nuw <4 x i32> %0, %1

	2293 ; CHECK-NEXT: ret <4 x i32> %3

	2294

	2295 define <2 x i32> @add_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {

	2296 %3 = add nsw <2 x i32> %0, %1

	2297 ret <2 x i32> %3

	2298 }

	2299 ; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nsw(<4 x i32>, <4 x i32>)

	2300 ; CHECK-NEXT: %3 = add nsw <4 x i32> %0, %1

	2301 ; CHECK-NEXT: ret <4 x i32> %3

	2302

	2303 define <2 x i32> @add_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {

	2304 %3 = add nuw nsw <2 x i32> %0, %1

	2305 ret <2 x i32> %3

	2306 }

	2307 ; CHECK-LABEL: define <4 x i32> @add_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	2308 ; CHECK-NEXT: %3 = add nuw nsw <4 x i32> %0, %1

	2309 ; CHECK-NEXT: ret <4 x i32> %3

	2310

	2311 define <2 x i32> @sub_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {

	2312 %3 = sub nuw <2 x i32> %0, %1

	2313 ret <2 x i32> %3

	2314 }

	2315 ; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nuw(<4 x i32>, <4 x i32>)

	2316 ; CHECK-NEXT: %3 = sub nuw <4 x i32> %0, %1

	2317 ; CHECK-NEXT: ret <4 x i32> %3

	2318

	2319 define <2 x i32> @sub_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {

	2320 %3 = sub nsw <2 x i32> %0, %1

	2321 ret <2 x i32> %3

	2322 }

	2323 ; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nsw(<4 x i32>, <4 x i32>)

	2324 ; CHECK-NEXT: %3 = sub nsw <4 x i32> %0, %1

	2325 ; CHECK-NEXT: ret <4 x i32> %3

	2326

	2327 define <2 x i32> @sub_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {

	2328 %3 = sub nuw nsw <2 x i32> %0, %1

	2329 ret <2 x i32> %3

	2330 }

	2331 ; CHECK-LABEL: define <4 x i32> @sub_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	2332 ; CHECK-NEXT: %3 = sub nuw nsw <4 x i32> %0, %1

	2333 ; CHECK-NEXT: ret <4 x i32> %3

	2334

	2335 define <2 x i32> @mul_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {

	2336 %3 = mul nuw <2 x i32> %0, %1

	2337 ret <2 x i32> %3

	2338 }

	2339 ; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nuw(<4 x i32>, <4 x i32>)

	2340 ; CHECK-NEXT: %3 = mul nuw <4 x i32> %0, %1

	2341 ; CHECK-NEXT: ret <4 x i32> %3

	2342

	2343 define <2 x i32> @mul_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {

	2344 %3 = mul nsw <2 x i32> %0, %1

	2345 ret <2 x i32> %3

	2346 }

	2347 ; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nsw(<4 x i32>, <4 x i32>)

	2348 ; CHECK-NEXT: %3 = mul nsw <4 x i32> %0, %1

	2349 ; CHECK-NEXT: ret <4 x i32> %3

	2350

	2351 define <2 x i32> @mul_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {

	2352 %3 = mul nuw nsw <2 x i32> %0, %1

	2353 ret <2 x i32> %3

	2354 }

	2355 ; CHECK-LABEL: define <4 x i32> @mul_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	2356 ; CHECK-NEXT: %3 = mul nuw nsw <4 x i32> %0, %1

	2357 ; CHECK-NEXT: ret <4 x i32> %3

	2358

	2359 define <2 x i32> @shl_binop_2xi32_nuw(<2 x i32>, <2 x i32>) {

	2360 %3 = shl nuw <2 x i32> %0, %1

	2361 ret <2 x i32> %3

	2362 }

	2363 ; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nuw(<4 x i32>, <4 x i32>)

	2364 ; CHECK-NEXT: %3 = shl nuw <4 x i32> %0, %1

	2365 ; CHECK-NEXT: ret <4 x i32> %3

	2366

	2367 define <2 x i32> @shl_binop_2xi32_nsw(<2 x i32>, <2 x i32>) {

	2368 %3 = shl nsw <2 x i32> %0, %1

	2369 ret <2 x i32> %3

	2370 }

	2371 ; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nsw(<4 x i32>, <4 x i32>)

	2372 ; CHECK-NEXT: %3 = shl nsw <4 x i32> %0, %1

	2373 ; CHECK-NEXT: ret <4 x i32> %3

	2374

	2375 define <2 x i32> @shl_binop_2xi32_nuw_nsw(<2 x i32>, <2 x i32>) {

	2376 %3 = shl nuw nsw <2 x i32> %0, %1

	2377 ret <2 x i32> %3

	2378 }

	2379 ; CHECK-LABEL: define <4 x i32> @shl_binop_2xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	2380 ; CHECK-NEXT: %3 = shl nuw nsw <4 x i32> %0, %1

	2381 ; CHECK-NEXT: ret <4 x i32> %3

	2382

	2383 define <2 x i32> @udiv_binop_2xi32(<2 x i32>, <2 x i32>) {

	2384 %3 = udiv <2 x i32> %0, %1

	2385 ret <2 x i32> %3

	2386 }

	2387 ; CHECK-LABEL: define <4 x i32> @udiv_binop_2xi32(<4 x i32>, <4 x i32>)

	2388 ; CHECK-NEXT: %3 = udiv <4 x i32> %0, %1

	2389 ; CHECK-NEXT: ret <4 x i32> %3

	2390

	2391 define <2 x i32> @udiv_binop_2xi32_exact(<2 x i32>, <2 x i32>) {

	2392 %3 = udiv exact <2 x i32> %0, %1

	2393 ret <2 x i32> %3

	2394 }

	2395 ; CHECK-LABEL: define <4 x i32> @udiv_binop_2xi32_exact(<4 x i32>, <4 x i32>)

	2396 ; CHECK-NEXT: %3 = udiv exact <4 x i32> %0, %1

	2397 ; CHECK-NEXT: ret <4 x i32> %3

	2398

	2399 define <2 x i32> @sdiv_binop_2xi32(<2 x i32>, <2 x i32>) {

	2400 %3 = sdiv <2 x i32> %0, %1

	2401 ret <2 x i32> %3

	2402 }

	2403 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_2xi32(<4 x i32>, <4 x i32>)

	2404 ; CHECK-NEXT: %3 = sdiv <4 x i32> %0, %1

	2405 ; CHECK-NEXT: ret <4 x i32> %3

	2406

	2407 define <2 x i32> @sdiv_binop_2xi32_exact(<2 x i32>, <2 x i32>) {

	2408 %3 = sdiv exact <2 x i32> %0, %1

	2409 ret <2 x i32> %3

	2410 }

	2411 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_2xi32_exact(<4 x i32>, <4 x i32>)

	2412 ; CHECK-NEXT: %3 = sdiv exact <4 x i32> %0, %1

	2413 ; CHECK-NEXT: ret <4 x i32> %3

	2414

	2415 define <2 x i32> @lshr_binop_2xi32(<2 x i32>, <2 x i32>) {

	2416 %3 = lshr <2 x i32> %0, %1

	2417 ret <2 x i32> %3

	2418 }

	2419 ; CHECK-LABEL: define <4 x i32> @lshr_binop_2xi32(<4 x i32>, <4 x i32>)

	2420 ; CHECK-NEXT: %3 = lshr <4 x i32> %0, %1

	2421 ; CHECK-NEXT: ret <4 x i32> %3

	2422

	2423 define <2 x i32> @lshr_binop_2xi32_exact(<2 x i32>, <2 x i32>) {

	2424 %3 = lshr exact <2 x i32> %0, %1

	2425 ret <2 x i32> %3

	2426 }

	2427 ; CHECK-LABEL: define <4 x i32> @lshr_binop_2xi32_exact(<4 x i32>, <4 x i32>)

	2428 ; CHECK-NEXT: %3 = lshr exact <4 x i32> %0, %1

	2429 ; CHECK-NEXT: ret <4 x i32> %3

	2430

	2431 define <2 x i32> @ashr_binop_2xi32(<2 x i32>, <2 x i32>) {

	2432 %3 = ashr <2 x i32> %0, %1

	2433 ret <2 x i32> %3

	2434 }

	2435 ; CHECK-LABEL: define <4 x i32> @ashr_binop_2xi32(<4 x i32>, <4 x i32>)

	2436 ; CHECK-NEXT: %3 = ashr <4 x i32> %0, %1

	2437 ; CHECK-NEXT: ret <4 x i32> %3

	2438

	2439 define <2 x i32> @ashr_binop_2xi32_exact(<2 x i32>, <2 x i32>) {

	2440 %3 = ashr exact <2 x i32> %0, %1

	2441 ret <2 x i32> %3

	2442 }

	2443 ; CHECK-LABEL: define <4 x i32> @ashr_binop_2xi32_exact(<4 x i32>, <4 x i32>)

	2444 ; CHECK-NEXT: %3 = ashr exact <4 x i32> %0, %1

	2445 ; CHECK-NEXT: ret <4 x i32> %3

	2446

	2447 define <2 x i32> @and_binop_2xi32(<2 x i32>, <2 x i32>) {

	2448 %3 = and <2 x i32> %0, %1

	2449 ret <2 x i32> %3

	2450 }

	2451 ; CHECK-LABEL: define <4 x i32> @and_binop_2xi32(<4 x i32>, <4 x i32>)

	2452 ; CHECK-NEXT: %3 = and <4 x i32> %0, %1

	2453 ; CHECK-NEXT: ret <4 x i32> %3

	2454

	2455 define <2 x i32> @xor_binop_2xi32(<2 x i32>, <2 x i32>) {

	2456 %3 = xor <2 x i32> %0, %1

	2457 ret <2 x i32> %3

	2458 }

	2459 ; CHECK-LABEL: define <4 x i32> @xor_binop_2xi32(<4 x i32>, <4 x i32>)

	2460 ; CHECK-NEXT: %3 = xor <4 x i32> %0, %1

	2461 ; CHECK-NEXT: ret <4 x i32> %3

	2462

	2463 define <2 x i32> @or_binop_2xi32(<2 x i32>, <2 x i32>) {

	2464 %3 = or <2 x i32> %0, %1

	2465 ret <2 x i32> %3

	2466 }

	2467 ; CHECK-LABEL: define <4 x i32> @or_binop_2xi32(<4 x i32>, <4 x i32>)

	2468 ; CHECK-NEXT: %3 = or <4 x i32> %0, %1

	2469 ; CHECK-NEXT: ret <4 x i32> %3

	2470

	2471 define <2 x i32> @urem_binop_2xi32(<2 x i32>, <2 x i32>) {

	2472 %3 = urem <2 x i32> %0, %1

	2473 ret <2 x i32> %3

	2474 }

	2475 ; CHECK-LABEL: define <4 x i32> @urem_binop_2xi32(<4 x i32>, <4 x i32>)

	2476 ; CHECK-NEXT: %3 = urem <4 x i32> %0, %1

	2477 ; CHECK-NEXT: ret <4 x i32> %3

	2478

	2479 define <2 x i32> @srem_binop_2xi32(<2 x i32>, <2 x i32>) {

	2480 %3 = srem <2 x i32> %0, %1

	2481 ret <2 x i32> %3

	2482 }

	2483 ; CHECK-LABEL: define <4 x i32> @srem_binop_2xi32(<4 x i32>, <4 x i32>)

	2484 ; CHECK-NEXT: %3 = srem <4 x i32> %0, %1

	2485 ; CHECK-NEXT: ret <4 x i32> %3

	2486

	2487 define <2 x i64> @add_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {

	2488 %3 = add nuw <2 x i64> %0, %1

	2489 ret <2 x i64> %3

	2490 }

	2491 ; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nuw(<2 x i64>, <2 x i64>)

	2492 ; CHECK-NEXT: %3 = add nuw <2 x i64> %0, %1

	2493 ; CHECK-NEXT: ret <2 x i64> %3

	2494

	2495 define <2 x i64> @add_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {

	2496 %3 = add nsw <2 x i64> %0, %1

	2497 ret <2 x i64> %3

	2498 }

	2499 ; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nsw(<2 x i64>, <2 x i64>)

	2500 ; CHECK-NEXT: %3 = add nsw <2 x i64> %0, %1

	2501 ; CHECK-NEXT: ret <2 x i64> %3

	2502

	2503 define <2 x i64> @add_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {

	2504 %3 = add nuw nsw <2 x i64> %0, %1

	2505 ret <2 x i64> %3

	2506 }

	2507 ; CHECK-LABEL: define <2 x i64> @add_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)

	2508 ; CHECK-NEXT: %3 = add nuw nsw <2 x i64> %0, %1

	2509 ; CHECK-NEXT: ret <2 x i64> %3

	2510

	2511 define <2 x i64> @sub_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {

	2512 %3 = sub nuw <2 x i64> %0, %1

	2513 ret <2 x i64> %3

	2514 }

	2515 ; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nuw(<2 x i64>, <2 x i64>)

	2516 ; CHECK-NEXT: %3 = sub nuw <2 x i64> %0, %1

	2517 ; CHECK-NEXT: ret <2 x i64> %3

	2518

	2519 define <2 x i64> @sub_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {

	2520 %3 = sub nsw <2 x i64> %0, %1

	2521 ret <2 x i64> %3

	2522 }

	2523 ; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nsw(<2 x i64>, <2 x i64>)

	2524 ; CHECK-NEXT: %3 = sub nsw <2 x i64> %0, %1

	2525 ; CHECK-NEXT: ret <2 x i64> %3

	2526

	2527 define <2 x i64> @sub_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {

	2528 %3 = sub nuw nsw <2 x i64> %0, %1

	2529 ret <2 x i64> %3

	2530 }

	2531 ; CHECK-LABEL: define <2 x i64> @sub_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)

	2532 ; CHECK-NEXT: %3 = sub nuw nsw <2 x i64> %0, %1

	2533 ; CHECK-NEXT: ret <2 x i64> %3

	2534

	2535 define <2 x i64> @mul_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {

	2536 %3 = mul nuw <2 x i64> %0, %1

	2537 ret <2 x i64> %3

	2538 }

	2539 ; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nuw(<2 x i64>, <2 x i64>)

	2540 ; CHECK-NEXT: %3 = mul nuw <2 x i64> %0, %1

	2541 ; CHECK-NEXT: ret <2 x i64> %3

	2542

	2543 define <2 x i64> @mul_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {

	2544 %3 = mul nsw <2 x i64> %0, %1

	2545 ret <2 x i64> %3

	2546 }

	2547 ; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nsw(<2 x i64>, <2 x i64>)

	2548 ; CHECK-NEXT: %3 = mul nsw <2 x i64> %0, %1

	2549 ; CHECK-NEXT: ret <2 x i64> %3

	2550

	2551 define <2 x i64> @mul_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {

	2552 %3 = mul nuw nsw <2 x i64> %0, %1

	2553 ret <2 x i64> %3

	2554 }

	2555 ; CHECK-LABEL: define <2 x i64> @mul_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)

	2556 ; CHECK-NEXT: %3 = mul nuw nsw <2 x i64> %0, %1

	2557 ; CHECK-NEXT: ret <2 x i64> %3

	2558

	2559 define <2 x i64> @shl_binop_2xi64_nuw(<2 x i64>, <2 x i64>) {

	2560 %3 = shl nuw <2 x i64> %0, %1

	2561 ret <2 x i64> %3

	2562 }

	2563 ; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nuw(<2 x i64>, <2 x i64>)

	2564 ; CHECK-NEXT: %3 = shl nuw <2 x i64> %0, %1

	2565 ; CHECK-NEXT: ret <2 x i64> %3

	2566

	2567 define <2 x i64> @shl_binop_2xi64_nsw(<2 x i64>, <2 x i64>) {

	2568 %3 = shl nsw <2 x i64> %0, %1

	2569 ret <2 x i64> %3

	2570 }

	2571 ; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nsw(<2 x i64>, <2 x i64>)

	2572 ; CHECK-NEXT: %3 = shl nsw <2 x i64> %0, %1

	2573 ; CHECK-NEXT: ret <2 x i64> %3

	2574

	2575 define <2 x i64> @shl_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>) {

	2576 %3 = shl nuw nsw <2 x i64> %0, %1

	2577 ret <2 x i64> %3

	2578 }

	2579 ; CHECK-LABEL: define <2 x i64> @shl_binop_2xi64_nuw_nsw(<2 x i64>, <2 x i64>)

	2580 ; CHECK-NEXT: %3 = shl nuw nsw <2 x i64> %0, %1

	2581 ; CHECK-NEXT: ret <2 x i64> %3

	2582

	2583 define <2 x i64> @udiv_binop_2xi64(<2 x i64>, <2 x i64>) {

	2584 %3 = udiv <2 x i64> %0, %1

	2585 ret <2 x i64> %3

	2586 }

	2587 ; CHECK-LABEL: define <2 x i64> @udiv_binop_2xi64(<2 x i64>, <2 x i64>)

	2588 ; CHECK-NEXT: %3 = udiv <2 x i64> %0, %1

	2589 ; CHECK-NEXT: ret <2 x i64> %3

	2590

	2591 define <2 x i64> @udiv_binop_2xi64_exact(<2 x i64>, <2 x i64>) {

	2592 %3 = udiv exact <2 x i64> %0, %1

	2593 ret <2 x i64> %3

	2594 }

	2595 ; CHECK-LABEL: define <2 x i64> @udiv_binop_2xi64_exact(<2 x i64>, <2 x i64>)

	2596 ; CHECK-NEXT: %3 = udiv exact <2 x i64> %0, %1

	2597 ; CHECK-NEXT: ret <2 x i64> %3

	2598

	2599 define <2 x i64> @sdiv_binop_2xi64(<2 x i64>, <2 x i64>) {

	2600 %3 = sdiv <2 x i64> %0, %1

	2601 ret <2 x i64> %3

	2602 }

	2603 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_2xi64(<2 x i64>, <2 x i64>)

	2604 ; CHECK-NEXT: %3 = sdiv <2 x i64> %0, %1

	2605 ; CHECK-NEXT: ret <2 x i64> %3

	2606

	2607 define <2 x i64> @sdiv_binop_2xi64_exact(<2 x i64>, <2 x i64>) {

	2608 %3 = sdiv exact <2 x i64> %0, %1

	2609 ret <2 x i64> %3

	2610 }

	2611 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_2xi64_exact(<2 x i64>, <2 x i64>)

	2612 ; CHECK-NEXT: %3 = sdiv exact <2 x i64> %0, %1

	2613 ; CHECK-NEXT: ret <2 x i64> %3

	2614

	2615 define <2 x i64> @lshr_binop_2xi64(<2 x i64>, <2 x i64>) {

	2616 %3 = lshr <2 x i64> %0, %1

	2617 ret <2 x i64> %3

	2618 }

	2619 ; CHECK-LABEL: define <2 x i64> @lshr_binop_2xi64(<2 x i64>, <2 x i64>)

	2620 ; CHECK-NEXT: %3 = lshr <2 x i64> %0, %1

	2621 ; CHECK-NEXT: ret <2 x i64> %3

	2622

	2623 define <2 x i64> @lshr_binop_2xi64_exact(<2 x i64>, <2 x i64>) {

	2624 %3 = lshr exact <2 x i64> %0, %1

	2625 ret <2 x i64> %3

	2626 }

	2627 ; CHECK-LABEL: define <2 x i64> @lshr_binop_2xi64_exact(<2 x i64>, <2 x i64>)

	2628 ; CHECK-NEXT: %3 = lshr exact <2 x i64> %0, %1

	2629 ; CHECK-NEXT: ret <2 x i64> %3

	2630

	2631 define <2 x i64> @ashr_binop_2xi64(<2 x i64>, <2 x i64>) {

	2632 %3 = ashr <2 x i64> %0, %1

	2633 ret <2 x i64> %3

	2634 }

	2635 ; CHECK-LABEL: define <2 x i64> @ashr_binop_2xi64(<2 x i64>, <2 x i64>)

	2636 ; CHECK-NEXT: %3 = ashr <2 x i64> %0, %1

	2637 ; CHECK-NEXT: ret <2 x i64> %3

	2638

	2639 define <2 x i64> @ashr_binop_2xi64_exact(<2 x i64>, <2 x i64>) {

	2640 %3 = ashr exact <2 x i64> %0, %1

	2641 ret <2 x i64> %3

	2642 }

	2643 ; CHECK-LABEL: define <2 x i64> @ashr_binop_2xi64_exact(<2 x i64>, <2 x i64>)

	2644 ; CHECK-NEXT: %3 = ashr exact <2 x i64> %0, %1

	2645 ; CHECK-NEXT: ret <2 x i64> %3

	2646

	2647 define <2 x i64> @and_binop_2xi64(<2 x i64>, <2 x i64>) {

	2648 %3 = and <2 x i64> %0, %1

	2649 ret <2 x i64> %3

	2650 }

	2651 ; CHECK-LABEL: define <2 x i64> @and_binop_2xi64(<2 x i64>, <2 x i64>)

	2652 ; CHECK-NEXT: %3 = and <2 x i64> %0, %1

	2653 ; CHECK-NEXT: ret <2 x i64> %3

	2654

	2655 define <2 x i64> @xor_binop_2xi64(<2 x i64>, <2 x i64>) {

	2656 %3 = xor <2 x i64> %0, %1

	2657 ret <2 x i64> %3

	2658 }

	2659 ; CHECK-LABEL: define <2 x i64> @xor_binop_2xi64(<2 x i64>, <2 x i64>)

	2660 ; CHECK-NEXT: %3 = xor <2 x i64> %0, %1

	2661 ; CHECK-NEXT: ret <2 x i64> %3

	2662

	2663 define <2 x i64> @or_binop_2xi64(<2 x i64>, <2 x i64>) {

	2664 %3 = or <2 x i64> %0, %1

	2665 ret <2 x i64> %3

	2666 }

	2667 ; CHECK-LABEL: define <2 x i64> @or_binop_2xi64(<2 x i64>, <2 x i64>)

	2668 ; CHECK-NEXT: %3 = or <2 x i64> %0, %1

	2669 ; CHECK-NEXT: ret <2 x i64> %3

	2670

	2671 define <2 x i64> @urem_binop_2xi64(<2 x i64>, <2 x i64>) {

	2672 %3 = urem <2 x i64> %0, %1

	2673 ret <2 x i64> %3

	2674 }

	2675 ; CHECK-LABEL: define <2 x i64> @urem_binop_2xi64(<2 x i64>, <2 x i64>)

	2676 ; CHECK-NEXT: %3 = urem <2 x i64> %0, %1

	2677 ; CHECK-NEXT: ret <2 x i64> %3

	2678

	2679 define <2 x i64> @srem_binop_2xi64(<2 x i64>, <2 x i64>) {

	2680 %3 = srem <2 x i64> %0, %1

	2681 ret <2 x i64> %3

	2682 }

	2683 ; CHECK-LABEL: define <2 x i64> @srem_binop_2xi64(<2 x i64>, <2 x i64>)

	2684 ; CHECK-NEXT: %3 = srem <2 x i64> %0, %1

	2685 ; CHECK-NEXT: ret <2 x i64> %3

	2686

	2687 define <4 x i8> @add_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {

	2688 %3 = add nuw <4 x i8> %0, %1

	2689 ret <4 x i8> %3

	2690 }

	2691 ; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nuw(<16 x i8>, <16 x i8>)

	2692 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	2693 ; CHECK-NEXT: ret <16 x i8> %3

	2694

	2695 define <4 x i8> @add_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {

	2696 %3 = add nsw <4 x i8> %0, %1

	2697 ret <4 x i8> %3

	2698 }

	2699 ; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nsw(<16 x i8>, <16 x i8>)

	2700 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	2701 ; CHECK-NEXT: ret <16 x i8> %3

	2702

	2703 define <4 x i8> @add_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {

	2704 %3 = add nuw nsw <4 x i8> %0, %1

	2705 ret <4 x i8> %3

	2706 }

	2707 ; CHECK-LABEL: define <16 x i8> @add_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	2708 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	2709 ; CHECK-NEXT: ret <16 x i8> %3

	2710

	2711 define <4 x i8> @sub_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {

	2712 %3 = sub nuw <4 x i8> %0, %1

	2713 ret <4 x i8> %3

	2714 }

	2715 ; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nuw(<16 x i8>, <16 x i8>)

	2716 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	2717 ; CHECK-NEXT: ret <16 x i8> %3

	2718

	2719 define <4 x i8> @sub_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {

	2720 %3 = sub nsw <4 x i8> %0, %1

	2721 ret <4 x i8> %3

	2722 }

	2723 ; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nsw(<16 x i8>, <16 x i8>)

	2724 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	2725 ; CHECK-NEXT: ret <16 x i8> %3

	2726

	2727 define <4 x i8> @sub_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {

	2728 %3 = sub nuw nsw <4 x i8> %0, %1

	2729 ret <4 x i8> %3

	2730 }

	2731 ; CHECK-LABEL: define <16 x i8> @sub_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	2732 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	2733 ; CHECK-NEXT: ret <16 x i8> %3

	2734

	2735 define <4 x i8> @mul_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {

	2736 %3 = mul nuw <4 x i8> %0, %1

	2737 ret <4 x i8> %3

	2738 }

	2739 ; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nuw(<16 x i8>, <16 x i8>)

	2740 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	2741 ; CHECK-NEXT: ret <16 x i8> %3

	2742

	2743 define <4 x i8> @mul_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {

	2744 %3 = mul nsw <4 x i8> %0, %1

	2745 ret <4 x i8> %3

	2746 }

	2747 ; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nsw(<16 x i8>, <16 x i8>)

	2748 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	2749 ; CHECK-NEXT: ret <16 x i8> %3

	2750

	2751 define <4 x i8> @mul_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {

	2752 %3 = mul nuw nsw <4 x i8> %0, %1

	2753 ret <4 x i8> %3

	2754 }

	2755 ; CHECK-LABEL: define <16 x i8> @mul_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	2756 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	2757 ; CHECK-NEXT: ret <16 x i8> %3

	2758

	2759 define <4 x i8> @shl_binop_4xi8_nuw(<4 x i8>, <4 x i8>) {

	2760 %3 = shl nuw <4 x i8> %0, %1

	2761 ret <4 x i8> %3

	2762 }

	2763 ; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nuw(<16 x i8>, <16 x i8>)

	2764 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	2765 ; CHECK-NEXT: ret <16 x i8> %3

	2766

	2767 define <4 x i8> @shl_binop_4xi8_nsw(<4 x i8>, <4 x i8>) {

	2768 %3 = shl nsw <4 x i8> %0, %1

	2769 ret <4 x i8> %3

	2770 }

	2771 ; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nsw(<16 x i8>, <16 x i8>)

	2772 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	2773 ; CHECK-NEXT: ret <16 x i8> %3

	2774

	2775 define <4 x i8> @shl_binop_4xi8_nuw_nsw(<4 x i8>, <4 x i8>) {

	2776 %3 = shl nuw nsw <4 x i8> %0, %1

	2777 ret <4 x i8> %3

	2778 }

	2779 ; CHECK-LABEL: define <16 x i8> @shl_binop_4xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	2780 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	2781 ; CHECK-NEXT: ret <16 x i8> %3

	2782

	2783 define <4 x i8> @udiv_binop_4xi8(<4 x i8>, <4 x i8>) {

	2784 %3 = udiv <4 x i8> %0, %1

	2785 ret <4 x i8> %3

	2786 }

	2787 ; CHECK-LABEL: define <16 x i8> @udiv_binop_4xi8(<16 x i8>, <16 x i8>)

	2788 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	2789 ; CHECK-NEXT: ret <16 x i8> %3

	2790

	2791 define <4 x i8> @udiv_binop_4xi8_exact(<4 x i8>, <4 x i8>) {

	2792 %3 = udiv exact <4 x i8> %0, %1

	2793 ret <4 x i8> %3

	2794 }

	2795 ; CHECK-LABEL: define <16 x i8> @udiv_binop_4xi8_exact(<16 x i8>, <16 x i8>)

	2796 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	2797 ; CHECK-NEXT: ret <16 x i8> %3

	2798

	2799 define <4 x i8> @sdiv_binop_4xi8(<4 x i8>, <4 x i8>) {

	2800 %3 = sdiv <4 x i8> %0, %1

	2801 ret <4 x i8> %3

	2802 }

	2803 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_4xi8(<16 x i8>, <16 x i8>)

	2804 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	2805 ; CHECK-NEXT: ret <16 x i8> %3

	2806

	2807 define <4 x i8> @sdiv_binop_4xi8_exact(<4 x i8>, <4 x i8>) {

	2808 %3 = sdiv exact <4 x i8> %0, %1

	2809 ret <4 x i8> %3

	2810 }

	2811 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_4xi8_exact(<16 x i8>, <16 x i8>)

	2812 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	2813 ; CHECK-NEXT: ret <16 x i8> %3

	2814

	2815 define <4 x i8> @lshr_binop_4xi8(<4 x i8>, <4 x i8>) {

	2816 %3 = lshr <4 x i8> %0, %1

	2817 ret <4 x i8> %3

	2818 }

	2819 ; CHECK-LABEL: define <16 x i8> @lshr_binop_4xi8(<16 x i8>, <16 x i8>)

	2820 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	2821 ; CHECK-NEXT: ret <16 x i8> %3

	2822

	2823 define <4 x i8> @lshr_binop_4xi8_exact(<4 x i8>, <4 x i8>) {

	2824 %3 = lshr exact <4 x i8> %0, %1

	2825 ret <4 x i8> %3

	2826 }

	2827 ; CHECK-LABEL: define <16 x i8> @lshr_binop_4xi8_exact(<16 x i8>, <16 x i8>)

	2828 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	2829 ; CHECK-NEXT: ret <16 x i8> %3

	2830

	2831 define <4 x i8> @ashr_binop_4xi8(<4 x i8>, <4 x i8>) {

	2832 %3 = ashr <4 x i8> %0, %1

	2833 ret <4 x i8> %3

	2834 }

	2835 ; CHECK-LABEL: define <16 x i8> @ashr_binop_4xi8(<16 x i8>, <16 x i8>)

	2836 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	2837 ; CHECK-NEXT: ret <16 x i8> %3

	2838

	2839 define <4 x i8> @ashr_binop_4xi8_exact(<4 x i8>, <4 x i8>) {

	2840 %3 = ashr exact <4 x i8> %0, %1

	2841 ret <4 x i8> %3

	2842 }

	2843 ; CHECK-LABEL: define <16 x i8> @ashr_binop_4xi8_exact(<16 x i8>, <16 x i8>)

	2844 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	2845 ; CHECK-NEXT: ret <16 x i8> %3

	2846

	2847 define <4 x i8> @and_binop_4xi8(<4 x i8>, <4 x i8>) {

	2848 %3 = and <4 x i8> %0, %1

	2849 ret <4 x i8> %3

	2850 }

	2851 ; CHECK-LABEL: define <16 x i8> @and_binop_4xi8(<16 x i8>, <16 x i8>)

	2852 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	2853 ; CHECK-NEXT: ret <16 x i8> %3

	2854

	2855 define <4 x i8> @xor_binop_4xi8(<4 x i8>, <4 x i8>) {

	2856 %3 = xor <4 x i8> %0, %1

	2857 ret <4 x i8> %3

	2858 }

	2859 ; CHECK-LABEL: define <16 x i8> @xor_binop_4xi8(<16 x i8>, <16 x i8>)

	2860 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	2861 ; CHECK-NEXT: ret <16 x i8> %3

	2862

	2863 define <4 x i8> @or_binop_4xi8(<4 x i8>, <4 x i8>) {

	2864 %3 = or <4 x i8> %0, %1

	2865 ret <4 x i8> %3

	2866 }

	2867 ; CHECK-LABEL: define <16 x i8> @or_binop_4xi8(<16 x i8>, <16 x i8>)

	2868 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	2869 ; CHECK-NEXT: ret <16 x i8> %3

	2870

	2871 define <4 x i8> @urem_binop_4xi8(<4 x i8>, <4 x i8>) {

	2872 %3 = urem <4 x i8> %0, %1

	2873 ret <4 x i8> %3

	2874 }

	2875 ; CHECK-LABEL: define <16 x i8> @urem_binop_4xi8(<16 x i8>, <16 x i8>)

	2876 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	2877 ; CHECK-NEXT: ret <16 x i8> %3

	2878

	2879 define <4 x i8> @srem_binop_4xi8(<4 x i8>, <4 x i8>) {

	2880 %3 = srem <4 x i8> %0, %1

	2881 ret <4 x i8> %3

	2882 }

	2883 ; CHECK-LABEL: define <16 x i8> @srem_binop_4xi8(<16 x i8>, <16 x i8>)

	2884 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	2885 ; CHECK-NEXT: ret <16 x i8> %3

	2886

	2887 define <4 x i16> @add_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {

	2888 %3 = add nuw <4 x i16> %0, %1

	2889 ret <4 x i16> %3

	2890 }

	2891 ; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nuw(<8 x i16>, <8 x i16>)

	2892 ; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1

	2893 ; CHECK-NEXT: ret <8 x i16> %3

	2894

	2895 define <4 x i16> @add_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {

	2896 %3 = add nsw <4 x i16> %0, %1

	2897 ret <4 x i16> %3

	2898 }

	2899 ; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nsw(<8 x i16>, <8 x i16>)

	2900 ; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1

	2901 ; CHECK-NEXT: ret <8 x i16> %3

	2902

	2903 define <4 x i16> @add_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {

	2904 %3 = add nuw nsw <4 x i16> %0, %1

	2905 ret <4 x i16> %3

	2906 }

	2907 ; CHECK-LABEL: define <8 x i16> @add_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2908 ; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1

	2909 ; CHECK-NEXT: ret <8 x i16> %3

	2910

	2911 define <4 x i16> @sub_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {

	2912 %3 = sub nuw <4 x i16> %0, %1

	2913 ret <4 x i16> %3

	2914 }

	2915 ; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nuw(<8 x i16>, <8 x i16>)

	2916 ; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1

	2917 ; CHECK-NEXT: ret <8 x i16> %3

	2918

	2919 define <4 x i16> @sub_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {

	2920 %3 = sub nsw <4 x i16> %0, %1

	2921 ret <4 x i16> %3

	2922 }

	2923 ; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nsw(<8 x i16>, <8 x i16>)

	2924 ; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1

	2925 ; CHECK-NEXT: ret <8 x i16> %3

	2926

	2927 define <4 x i16> @sub_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {

	2928 %3 = sub nuw nsw <4 x i16> %0, %1

	2929 ret <4 x i16> %3

	2930 }

	2931 ; CHECK-LABEL: define <8 x i16> @sub_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2932 ; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1

	2933 ; CHECK-NEXT: ret <8 x i16> %3

	2934

	2935 define <4 x i16> @mul_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {

	2936 %3 = mul nuw <4 x i16> %0, %1

	2937 ret <4 x i16> %3

	2938 }

	2939 ; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nuw(<8 x i16>, <8 x i16>)

	2940 ; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1

	2941 ; CHECK-NEXT: ret <8 x i16> %3

	2942

	2943 define <4 x i16> @mul_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {

	2944 %3 = mul nsw <4 x i16> %0, %1

	2945 ret <4 x i16> %3

	2946 }

	2947 ; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nsw(<8 x i16>, <8 x i16>)

	2948 ; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1

	2949 ; CHECK-NEXT: ret <8 x i16> %3

	2950

	2951 define <4 x i16> @mul_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {

	2952 %3 = mul nuw nsw <4 x i16> %0, %1

	2953 ret <4 x i16> %3

	2954 }

	2955 ; CHECK-LABEL: define <8 x i16> @mul_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2956 ; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1

	2957 ; CHECK-NEXT: ret <8 x i16> %3

	2958

	2959 define <4 x i16> @shl_binop_4xi16_nuw(<4 x i16>, <4 x i16>) {

	2960 %3 = shl nuw <4 x i16> %0, %1

	2961 ret <4 x i16> %3

	2962 }

	2963 ; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nuw(<8 x i16>, <8 x i16>)

	2964 ; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1

	2965 ; CHECK-NEXT: ret <8 x i16> %3

	2966

	2967 define <4 x i16> @shl_binop_4xi16_nsw(<4 x i16>, <4 x i16>) {

	2968 %3 = shl nsw <4 x i16> %0, %1

	2969 ret <4 x i16> %3

	2970 }

	2971 ; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nsw(<8 x i16>, <8 x i16>)

	2972 ; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1

	2973 ; CHECK-NEXT: ret <8 x i16> %3

	2974

	2975 define <4 x i16> @shl_binop_4xi16_nuw_nsw(<4 x i16>, <4 x i16>) {

	2976 %3 = shl nuw nsw <4 x i16> %0, %1

	2977 ret <4 x i16> %3

	2978 }

	2979 ; CHECK-LABEL: define <8 x i16> @shl_binop_4xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	2980 ; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1

	2981 ; CHECK-NEXT: ret <8 x i16> %3

	2982

	2983 define <4 x i16> @udiv_binop_4xi16(<4 x i16>, <4 x i16>) {

	2984 %3 = udiv <4 x i16> %0, %1

	2985 ret <4 x i16> %3

	2986 }

	2987 ; CHECK-LABEL: define <8 x i16> @udiv_binop_4xi16(<8 x i16>, <8 x i16>)

	2988 ; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1

	2989 ; CHECK-NEXT: ret <8 x i16> %3

	2990

	2991 define <4 x i16> @udiv_binop_4xi16_exact(<4 x i16>, <4 x i16>) {

	2992 %3 = udiv exact <4 x i16> %0, %1

	2993 ret <4 x i16> %3

	2994 }

	2995 ; CHECK-LABEL: define <8 x i16> @udiv_binop_4xi16_exact(<8 x i16>, <8 x i16>)

	2996 ; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1

	2997 ; CHECK-NEXT: ret <8 x i16> %3

	2998

	2999 define <4 x i16> @sdiv_binop_4xi16(<4 x i16>, <4 x i16>) {

	3000 %3 = sdiv <4 x i16> %0, %1

	3001 ret <4 x i16> %3

	3002 }

	3003 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_4xi16(<8 x i16>, <8 x i16>)

	3004 ; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1

	3005 ; CHECK-NEXT: ret <8 x i16> %3

	3006

	3007 define <4 x i16> @sdiv_binop_4xi16_exact(<4 x i16>, <4 x i16>) {

	3008 %3 = sdiv exact <4 x i16> %0, %1

	3009 ret <4 x i16> %3

	3010 }

	3011 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_4xi16_exact(<8 x i16>, <8 x i16>)

	3012 ; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1

	3013 ; CHECK-NEXT: ret <8 x i16> %3

	3014

	3015 define <4 x i16> @lshr_binop_4xi16(<4 x i16>, <4 x i16>) {

	3016 %3 = lshr <4 x i16> %0, %1

	3017 ret <4 x i16> %3

	3018 }

	3019 ; CHECK-LABEL: define <8 x i16> @lshr_binop_4xi16(<8 x i16>, <8 x i16>)

	3020 ; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1

	3021 ; CHECK-NEXT: ret <8 x i16> %3

	3022

	3023 define <4 x i16> @lshr_binop_4xi16_exact(<4 x i16>, <4 x i16>) {

	3024 %3 = lshr exact <4 x i16> %0, %1

	3025 ret <4 x i16> %3

	3026 }

	3027 ; CHECK-LABEL: define <8 x i16> @lshr_binop_4xi16_exact(<8 x i16>, <8 x i16>)

	3028 ; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1

	3029 ; CHECK-NEXT: ret <8 x i16> %3

	3030

	3031 define <4 x i16> @ashr_binop_4xi16(<4 x i16>, <4 x i16>) {

	3032 %3 = ashr <4 x i16> %0, %1

	3033 ret <4 x i16> %3

	3034 }

	3035 ; CHECK-LABEL: define <8 x i16> @ashr_binop_4xi16(<8 x i16>, <8 x i16>)

	3036 ; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1

	3037 ; CHECK-NEXT: ret <8 x i16> %3

	3038

	3039 define <4 x i16> @ashr_binop_4xi16_exact(<4 x i16>, <4 x i16>) {

	3040 %3 = ashr exact <4 x i16> %0, %1

	3041 ret <4 x i16> %3

	3042 }

	3043 ; CHECK-LABEL: define <8 x i16> @ashr_binop_4xi16_exact(<8 x i16>, <8 x i16>)

	3044 ; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1

	3045 ; CHECK-NEXT: ret <8 x i16> %3

	3046

	3047 define <4 x i16> @and_binop_4xi16(<4 x i16>, <4 x i16>) {

	3048 %3 = and <4 x i16> %0, %1

	3049 ret <4 x i16> %3

	3050 }

	3051 ; CHECK-LABEL: define <8 x i16> @and_binop_4xi16(<8 x i16>, <8 x i16>)

	3052 ; CHECK-NEXT: %3 = and <8 x i16> %0, %1

	3053 ; CHECK-NEXT: ret <8 x i16> %3

	3054

	3055 define <4 x i16> @xor_binop_4xi16(<4 x i16>, <4 x i16>) {

	3056 %3 = xor <4 x i16> %0, %1

	3057 ret <4 x i16> %3

	3058 }

	3059 ; CHECK-LABEL: define <8 x i16> @xor_binop_4xi16(<8 x i16>, <8 x i16>)

	3060 ; CHECK-NEXT: %3 = xor <8 x i16> %0, %1

	3061 ; CHECK-NEXT: ret <8 x i16> %3

	3062

	3063 define <4 x i16> @or_binop_4xi16(<4 x i16>, <4 x i16>) {

	3064 %3 = or <4 x i16> %0, %1

	3065 ret <4 x i16> %3

	3066 }

	3067 ; CHECK-LABEL: define <8 x i16> @or_binop_4xi16(<8 x i16>, <8 x i16>)

	3068 ; CHECK-NEXT: %3 = or <8 x i16> %0, %1

	3069 ; CHECK-NEXT: ret <8 x i16> %3

	3070

	3071 define <4 x i16> @urem_binop_4xi16(<4 x i16>, <4 x i16>) {

	3072 %3 = urem <4 x i16> %0, %1

	3073 ret <4 x i16> %3

	3074 }

	3075 ; CHECK-LABEL: define <8 x i16> @urem_binop_4xi16(<8 x i16>, <8 x i16>)

	3076 ; CHECK-NEXT: %3 = urem <8 x i16> %0, %1

	3077 ; CHECK-NEXT: ret <8 x i16> %3

	3078

	3079 define <4 x i16> @srem_binop_4xi16(<4 x i16>, <4 x i16>) {

	3080 %3 = srem <4 x i16> %0, %1

	3081 ret <4 x i16> %3

	3082 }

	3083 ; CHECK-LABEL: define <8 x i16> @srem_binop_4xi16(<8 x i16>, <8 x i16>)

	3084 ; CHECK-NEXT: %3 = srem <8 x i16> %0, %1

	3085 ; CHECK-NEXT: ret <8 x i16> %3

	3086

	3087 define <4 x i32> @add_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {

	3088 %3 = add nuw <4 x i32> %0, %1

	3089 ret <4 x i32> %3

	3090 }

	3091 ; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nuw(<4 x i32>, <4 x i32>)

	3092 ; CHECK-NEXT: %3 = add nuw <4 x i32> %0, %1

	3093 ; CHECK-NEXT: ret <4 x i32> %3

	3094

	3095 define <4 x i32> @add_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {

	3096 %3 = add nsw <4 x i32> %0, %1

	3097 ret <4 x i32> %3

	3098 }

	3099 ; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nsw(<4 x i32>, <4 x i32>)

	3100 ; CHECK-NEXT: %3 = add nsw <4 x i32> %0, %1

	3101 ; CHECK-NEXT: ret <4 x i32> %3

	3102

	3103 define <4 x i32> @add_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {

	3104 %3 = add nuw nsw <4 x i32> %0, %1

	3105 ret <4 x i32> %3

	3106 }

	3107 ; CHECK-LABEL: define <4 x i32> @add_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	3108 ; CHECK-NEXT: %3 = add nuw nsw <4 x i32> %0, %1

	3109 ; CHECK-NEXT: ret <4 x i32> %3

	3110

	3111 define <4 x i32> @sub_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {

	3112 %3 = sub nuw <4 x i32> %0, %1

	3113 ret <4 x i32> %3

	3114 }

	3115 ; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nuw(<4 x i32>, <4 x i32>)

	3116 ; CHECK-NEXT: %3 = sub nuw <4 x i32> %0, %1

	3117 ; CHECK-NEXT: ret <4 x i32> %3

	3118

	3119 define <4 x i32> @sub_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {

	3120 %3 = sub nsw <4 x i32> %0, %1

	3121 ret <4 x i32> %3

	3122 }

	3123 ; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nsw(<4 x i32>, <4 x i32>)

	3124 ; CHECK-NEXT: %3 = sub nsw <4 x i32> %0, %1

	3125 ; CHECK-NEXT: ret <4 x i32> %3

	3126

	3127 define <4 x i32> @sub_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {

	3128 %3 = sub nuw nsw <4 x i32> %0, %1

	3129 ret <4 x i32> %3

	3130 }

	3131 ; CHECK-LABEL: define <4 x i32> @sub_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	3132 ; CHECK-NEXT: %3 = sub nuw nsw <4 x i32> %0, %1

	3133 ; CHECK-NEXT: ret <4 x i32> %3

	3134

	3135 define <4 x i32> @mul_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {

	3136 %3 = mul nuw <4 x i32> %0, %1

	3137 ret <4 x i32> %3

	3138 }

	3139 ; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nuw(<4 x i32>, <4 x i32>)

	3140 ; CHECK-NEXT: %3 = mul nuw <4 x i32> %0, %1

	3141 ; CHECK-NEXT: ret <4 x i32> %3

	3142

	3143 define <4 x i32> @mul_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {

	3144 %3 = mul nsw <4 x i32> %0, %1

	3145 ret <4 x i32> %3

	3146 }

	3147 ; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nsw(<4 x i32>, <4 x i32>)

	3148 ; CHECK-NEXT: %3 = mul nsw <4 x i32> %0, %1

	3149 ; CHECK-NEXT: ret <4 x i32> %3

	3150

	3151 define <4 x i32> @mul_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {

	3152 %3 = mul nuw nsw <4 x i32> %0, %1

	3153 ret <4 x i32> %3

	3154 }

	3155 ; CHECK-LABEL: define <4 x i32> @mul_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	3156 ; CHECK-NEXT: %3 = mul nuw nsw <4 x i32> %0, %1

	3157 ; CHECK-NEXT: ret <4 x i32> %3

	3158

	3159 define <4 x i32> @shl_binop_4xi32_nuw(<4 x i32>, <4 x i32>) {

	3160 %3 = shl nuw <4 x i32> %0, %1

	3161 ret <4 x i32> %3

	3162 }

	3163 ; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nuw(<4 x i32>, <4 x i32>)

	3164 ; CHECK-NEXT: %3 = shl nuw <4 x i32> %0, %1

	3165 ; CHECK-NEXT: ret <4 x i32> %3

	3166

	3167 define <4 x i32> @shl_binop_4xi32_nsw(<4 x i32>, <4 x i32>) {

	3168 %3 = shl nsw <4 x i32> %0, %1

	3169 ret <4 x i32> %3

	3170 }

	3171 ; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nsw(<4 x i32>, <4 x i32>)

	3172 ; CHECK-NEXT: %3 = shl nsw <4 x i32> %0, %1

	3173 ; CHECK-NEXT: ret <4 x i32> %3

	3174

	3175 define <4 x i32> @shl_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>) {

	3176 %3 = shl nuw nsw <4 x i32> %0, %1

	3177 ret <4 x i32> %3

	3178 }

	3179 ; CHECK-LABEL: define <4 x i32> @shl_binop_4xi32_nuw_nsw(<4 x i32>, <4 x i32>)

	3180 ; CHECK-NEXT: %3 = shl nuw nsw <4 x i32> %0, %1

	3181 ; CHECK-NEXT: ret <4 x i32> %3

	3182

	3183 define <4 x i32> @udiv_binop_4xi32(<4 x i32>, <4 x i32>) {

	3184 %3 = udiv <4 x i32> %0, %1

	3185 ret <4 x i32> %3

	3186 }

	3187 ; CHECK-LABEL: define <4 x i32> @udiv_binop_4xi32(<4 x i32>, <4 x i32>)

	3188 ; CHECK-NEXT: %3 = udiv <4 x i32> %0, %1

	3189 ; CHECK-NEXT: ret <4 x i32> %3

	3190

	3191 define <4 x i32> @udiv_binop_4xi32_exact(<4 x i32>, <4 x i32>) {

	3192 %3 = udiv exact <4 x i32> %0, %1

	3193 ret <4 x i32> %3

	3194 }

	3195 ; CHECK-LABEL: define <4 x i32> @udiv_binop_4xi32_exact(<4 x i32>, <4 x i32>)

	3196 ; CHECK-NEXT: %3 = udiv exact <4 x i32> %0, %1

	3197 ; CHECK-NEXT: ret <4 x i32> %3

	3198

	3199 define <4 x i32> @sdiv_binop_4xi32(<4 x i32>, <4 x i32>) {

	3200 %3 = sdiv <4 x i32> %0, %1

	3201 ret <4 x i32> %3

	3202 }

	3203 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_4xi32(<4 x i32>, <4 x i32>)

	3204 ; CHECK-NEXT: %3 = sdiv <4 x i32> %0, %1

	3205 ; CHECK-NEXT: ret <4 x i32> %3

	3206

	3207 define <4 x i32> @sdiv_binop_4xi32_exact(<4 x i32>, <4 x i32>) {

	3208 %3 = sdiv exact <4 x i32> %0, %1

	3209 ret <4 x i32> %3

	3210 }

	3211 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_4xi32_exact(<4 x i32>, <4 x i32>)

	3212 ; CHECK-NEXT: %3 = sdiv exact <4 x i32> %0, %1

	3213 ; CHECK-NEXT: ret <4 x i32> %3

	3214

	3215 define <4 x i32> @lshr_binop_4xi32(<4 x i32>, <4 x i32>) {

	3216 %3 = lshr <4 x i32> %0, %1

	3217 ret <4 x i32> %3

	3218 }

	3219 ; CHECK-LABEL: define <4 x i32> @lshr_binop_4xi32(<4 x i32>, <4 x i32>)

	3220 ; CHECK-NEXT: %3 = lshr <4 x i32> %0, %1

	3221 ; CHECK-NEXT: ret <4 x i32> %3

	3222

	3223 define <4 x i32> @lshr_binop_4xi32_exact(<4 x i32>, <4 x i32>) {

	3224 %3 = lshr exact <4 x i32> %0, %1

	3225 ret <4 x i32> %3

	3226 }

	3227 ; CHECK-LABEL: define <4 x i32> @lshr_binop_4xi32_exact(<4 x i32>, <4 x i32>)

	3228 ; CHECK-NEXT: %3 = lshr exact <4 x i32> %0, %1

	3229 ; CHECK-NEXT: ret <4 x i32> %3

	3230

	3231 define <4 x i32> @ashr_binop_4xi32(<4 x i32>, <4 x i32>) {

	3232 %3 = ashr <4 x i32> %0, %1

	3233 ret <4 x i32> %3

	3234 }

	3235 ; CHECK-LABEL: define <4 x i32> @ashr_binop_4xi32(<4 x i32>, <4 x i32>)

	3236 ; CHECK-NEXT: %3 = ashr <4 x i32> %0, %1

	3237 ; CHECK-NEXT: ret <4 x i32> %3

	3238

	3239 define <4 x i32> @ashr_binop_4xi32_exact(<4 x i32>, <4 x i32>) {

	3240 %3 = ashr exact <4 x i32> %0, %1

	3241 ret <4 x i32> %3

	3242 }

	3243 ; CHECK-LABEL: define <4 x i32> @ashr_binop_4xi32_exact(<4 x i32>, <4 x i32>)

	3244 ; CHECK-NEXT: %3 = ashr exact <4 x i32> %0, %1

	3245 ; CHECK-NEXT: ret <4 x i32> %3

	3246

	3247 define <4 x i32> @and_binop_4xi32(<4 x i32>, <4 x i32>) {

	3248 %3 = and <4 x i32> %0, %1

	3249 ret <4 x i32> %3

	3250 }

	3251 ; CHECK-LABEL: define <4 x i32> @and_binop_4xi32(<4 x i32>, <4 x i32>)

	3252 ; CHECK-NEXT: %3 = and <4 x i32> %0, %1

	3253 ; CHECK-NEXT: ret <4 x i32> %3

	3254

	3255 define <4 x i32> @xor_binop_4xi32(<4 x i32>, <4 x i32>) {

	3256 %3 = xor <4 x i32> %0, %1

	3257 ret <4 x i32> %3

	3258 }

	3259 ; CHECK-LABEL: define <4 x i32> @xor_binop_4xi32(<4 x i32>, <4 x i32>)

	3260 ; CHECK-NEXT: %3 = xor <4 x i32> %0, %1

	3261 ; CHECK-NEXT: ret <4 x i32> %3

	3262

	3263 define <4 x i32> @or_binop_4xi32(<4 x i32>, <4 x i32>) {

	3264 %3 = or <4 x i32> %0, %1

	3265 ret <4 x i32> %3

	3266 }

	3267 ; CHECK-LABEL: define <4 x i32> @or_binop_4xi32(<4 x i32>, <4 x i32>)

	3268 ; CHECK-NEXT: %3 = or <4 x i32> %0, %1

	3269 ; CHECK-NEXT: ret <4 x i32> %3

	3270

	3271 define <4 x i32> @urem_binop_4xi32(<4 x i32>, <4 x i32>) {

	3272 %3 = urem <4 x i32> %0, %1

	3273 ret <4 x i32> %3

	3274 }

	3275 ; CHECK-LABEL: define <4 x i32> @urem_binop_4xi32(<4 x i32>, <4 x i32>)

	3276 ; CHECK-NEXT: %3 = urem <4 x i32> %0, %1

	3277 ; CHECK-NEXT: ret <4 x i32> %3

	3278

	3279 define <4 x i32> @srem_binop_4xi32(<4 x i32>, <4 x i32>) {

	3280 %3 = srem <4 x i32> %0, %1

	3281 ret <4 x i32> %3

	3282 }

	3283 ; CHECK-LABEL: define <4 x i32> @srem_binop_4xi32(<4 x i32>, <4 x i32>)

	3284 ; CHECK-NEXT: %3 = srem <4 x i32> %0, %1

	3285 ; CHECK-NEXT: ret <4 x i32> %3

	3286

	3287 define <4 x i64> @add_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {

	3288 %3 = add nuw <4 x i64> %0, %1

	3289 ret <4 x i64> %3

	3290 }

	3291 ; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3292 ; CHECK-NEXT: %6 = add nuw <2 x i64> %1, %3

	3293 ; CHECK-NEXT: %7 = add nuw <2 x i64> %2, %4

	3294 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3295 ; CHECK-NEXT: ret <2 x i64> %6

	3296

	3297 define <4 x i64> @add_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {

	3298 %3 = add nsw <4 x i64> %0, %1

	3299 ret <4 x i64> %3

	3300 }

	3301 ; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3302 ; CHECK-NEXT: %6 = add nsw <2 x i64> %1, %3

	3303 ; CHECK-NEXT: %7 = add nsw <2 x i64> %2, %4

	3304 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3305 ; CHECK-NEXT: ret <2 x i64> %6

	3306

	3307 define <4 x i64> @add_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {

	3308 %3 = add nuw nsw <4 x i64> %0, %1

	3309 ret <4 x i64> %3

	3310 }

	3311 ; CHECK-LABEL: define <2 x i64> @add_binop_4xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3312 ; CHECK-NEXT: %6 = add nuw nsw <2 x i64> %1, %3

	3313 ; CHECK-NEXT: %7 = add nuw nsw <2 x i64> %2, %4

	3314 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3315 ; CHECK-NEXT: ret <2 x i64> %6

	3316

	3317 define <4 x i64> @sub_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {

	3318 %3 = sub nuw <4 x i64> %0, %1

	3319 ret <4 x i64> %3

	3320 }

	3321 ; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3322 ; CHECK-NEXT: %6 = sub nuw <2 x i64> %1, %3

	3323 ; CHECK-NEXT: %7 = sub nuw <2 x i64> %2, %4

	3324 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3325 ; CHECK-NEXT: ret <2 x i64> %6

	3326

	3327 define <4 x i64> @sub_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {

	3328 %3 = sub nsw <4 x i64> %0, %1

	3329 ret <4 x i64> %3

	3330 }

	3331 ; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3332 ; CHECK-NEXT: %6 = sub nsw <2 x i64> %1, %3

	3333 ; CHECK-NEXT: %7 = sub nsw <2 x i64> %2, %4

	3334 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3335 ; CHECK-NEXT: ret <2 x i64> %6

	3336

	3337 define <4 x i64> @sub_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {

	3338 %3 = sub nuw nsw <4 x i64> %0, %1

	3339 ret <4 x i64> %3

	3340 }

	3341 ; CHECK-LABEL: define <2 x i64> @sub_binop_4xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3342 ; CHECK-NEXT: %6 = sub nuw nsw <2 x i64> %1, %3

	3343 ; CHECK-NEXT: %7 = sub nuw nsw <2 x i64> %2, %4

	3344 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3345 ; CHECK-NEXT: ret <2 x i64> %6

	3346

	3347 define <4 x i64> @mul_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {

	3348 %3 = mul nuw <4 x i64> %0, %1

	3349 ret <4 x i64> %3

	3350 }

	3351 ; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3352 ; CHECK-NEXT: %6 = mul nuw <2 x i64> %1, %3

	3353 ; CHECK-NEXT: %7 = mul nuw <2 x i64> %2, %4

	3354 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3355 ; CHECK-NEXT: ret <2 x i64> %6

	3356

	3357 define <4 x i64> @mul_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {

	3358 %3 = mul nsw <4 x i64> %0, %1

	3359 ret <4 x i64> %3

	3360 }

	3361 ; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3362 ; CHECK-NEXT: %6 = mul nsw <2 x i64> %1, %3

	3363 ; CHECK-NEXT: %7 = mul nsw <2 x i64> %2, %4

	3364 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3365 ; CHECK-NEXT: ret <2 x i64> %6

	3366

	3367 define <4 x i64> @mul_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {

	3368 %3 = mul nuw nsw <4 x i64> %0, %1

	3369 ret <4 x i64> %3

	3370 }

	3371 ; CHECK-LABEL: define <2 x i64> @mul_binop_4xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3372 ; CHECK-NEXT: %6 = mul nuw nsw <2 x i64> %1, %3

	3373 ; CHECK-NEXT: %7 = mul nuw nsw <2 x i64> %2, %4

	3374 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3375 ; CHECK-NEXT: ret <2 x i64> %6

	3376

	3377 define <4 x i64> @shl_binop_4xi64_nuw(<4 x i64>, <4 x i64>) {

	3378 %3 = shl nuw <4 x i64> %0, %1

	3379 ret <4 x i64> %3

	3380 }

	3381 ; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3382 ; CHECK-NEXT: %6 = shl nuw <2 x i64> %1, %3

	3383 ; CHECK-NEXT: %7 = shl nuw <2 x i64> %2, %4

	3384 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3385 ; CHECK-NEXT: ret <2 x i64> %6

	3386

	3387 define <4 x i64> @shl_binop_4xi64_nsw(<4 x i64>, <4 x i64>) {

	3388 %3 = shl nsw <4 x i64> %0, %1

	3389 ret <4 x i64> %3

	3390 }

	3391 ; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3392 ; CHECK-NEXT: %6 = shl nsw <2 x i64> %1, %3

	3393 ; CHECK-NEXT: %7 = shl nsw <2 x i64> %2, %4

	3394 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3395 ; CHECK-NEXT: ret <2 x i64> %6

	3396

	3397 define <4 x i64> @shl_binop_4xi64_nuw_nsw(<4 x i64>, <4 x i64>) {

	3398 %3 = shl nuw nsw <4 x i64> %0, %1

	3399 ret <4 x i64> %3

	3400 }

	3401 ; CHECK-LABEL: define <2 x i64> @shl_binop_4xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3402 ; CHECK-NEXT: %6 = shl nuw nsw <2 x i64> %1, %3

	3403 ; CHECK-NEXT: %7 = shl nuw nsw <2 x i64> %2, %4

	3404 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3405 ; CHECK-NEXT: ret <2 x i64> %6

	3406

	3407 define <4 x i64> @udiv_binop_4xi64(<4 x i64>, <4 x i64>) {

	3408 %3 = udiv <4 x i64> %0, %1

	3409 ret <4 x i64> %3

	3410 }

	3411 ; CHECK-LABEL: define <2 x i64> @udiv_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3412 ; CHECK-NEXT: %6 = udiv <2 x i64> %1, %3

	3413 ; CHECK-NEXT: %7 = udiv <2 x i64> %2, %4

	3414 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3415 ; CHECK-NEXT: ret <2 x i64> %6

	3416

	3417 define <4 x i64> @udiv_binop_4xi64_exact(<4 x i64>, <4 x i64>) {

	3418 %3 = udiv exact <4 x i64> %0, %1

	3419 ret <4 x i64> %3

	3420 }

	3421 ; CHECK-LABEL: define <2 x i64> @udiv_binop_4xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3422 ; CHECK-NEXT: %6 = udiv exact <2 x i64> %1, %3

	3423 ; CHECK-NEXT: %7 = udiv exact <2 x i64> %2, %4

	3424 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3425 ; CHECK-NEXT: ret <2 x i64> %6

	3426

	3427 define <4 x i64> @sdiv_binop_4xi64(<4 x i64>, <4 x i64>) {

	3428 %3 = sdiv <4 x i64> %0, %1

	3429 ret <4 x i64> %3

	3430 }

	3431 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3432 ; CHECK-NEXT: %6 = sdiv <2 x i64> %1, %3

	3433 ; CHECK-NEXT: %7 = sdiv <2 x i64> %2, %4

	3434 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3435 ; CHECK-NEXT: ret <2 x i64> %6

	3436

	3437 define <4 x i64> @sdiv_binop_4xi64_exact(<4 x i64>, <4 x i64>) {

	3438 %3 = sdiv exact <4 x i64> %0, %1

	3439 ret <4 x i64> %3

	3440 }

	3441 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_4xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3442 ; CHECK-NEXT: %6 = sdiv exact <2 x i64> %1, %3

	3443 ; CHECK-NEXT: %7 = sdiv exact <2 x i64> %2, %4

	3444 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3445 ; CHECK-NEXT: ret <2 x i64> %6

	3446

	3447 define <4 x i64> @lshr_binop_4xi64(<4 x i64>, <4 x i64>) {

	3448 %3 = lshr <4 x i64> %0, %1

	3449 ret <4 x i64> %3

	3450 }

	3451 ; CHECK-LABEL: define <2 x i64> @lshr_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3452 ; CHECK-NEXT: %6 = lshr <2 x i64> %1, %3

	3453 ; CHECK-NEXT: %7 = lshr <2 x i64> %2, %4

	3454 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3455 ; CHECK-NEXT: ret <2 x i64> %6

	3456

	3457 define <4 x i64> @lshr_binop_4xi64_exact(<4 x i64>, <4 x i64>) {

	3458 %3 = lshr exact <4 x i64> %0, %1

	3459 ret <4 x i64> %3

	3460 }

	3461 ; CHECK-LABEL: define <2 x i64> @lshr_binop_4xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3462 ; CHECK-NEXT: %6 = lshr exact <2 x i64> %1, %3

	3463 ; CHECK-NEXT: %7 = lshr exact <2 x i64> %2, %4

	3464 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3465 ; CHECK-NEXT: ret <2 x i64> %6

	3466

	3467 define <4 x i64> @ashr_binop_4xi64(<4 x i64>, <4 x i64>) {

	3468 %3 = ashr <4 x i64> %0, %1

	3469 ret <4 x i64> %3

	3470 }

	3471 ; CHECK-LABEL: define <2 x i64> @ashr_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3472 ; CHECK-NEXT: %6 = ashr <2 x i64> %1, %3

	3473 ; CHECK-NEXT: %7 = ashr <2 x i64> %2, %4

	3474 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3475 ; CHECK-NEXT: ret <2 x i64> %6

	3476

	3477 define <4 x i64> @ashr_binop_4xi64_exact(<4 x i64>, <4 x i64>) {

	3478 %3 = ashr exact <4 x i64> %0, %1

	3479 ret <4 x i64> %3

	3480 }

	3481 ; CHECK-LABEL: define <2 x i64> @ashr_binop_4xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3482 ; CHECK-NEXT: %6 = ashr exact <2 x i64> %1, %3

	3483 ; CHECK-NEXT: %7 = ashr exact <2 x i64> %2, %4

	3484 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3485 ; CHECK-NEXT: ret <2 x i64> %6

	3486

	3487 define <4 x i64> @and_binop_4xi64(<4 x i64>, <4 x i64>) {

	3488 %3 = and <4 x i64> %0, %1

	3489 ret <4 x i64> %3

	3490 }

	3491 ; CHECK-LABEL: define <2 x i64> @and_binop_4xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3492 ; CHECK-NEXT: %6 = and <2 x i64> %1, %3

	3493 ; CHECK-NEXT: %7 = and <2 x i64> %2, %4

	3494 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3495 ; CHECK-NEXT: ret <2 x i64> %6

	3496

	3497 define <4 x i64> @xor_binop_4xi64(<4 x i64>, <4 x i64>) {

	3498 %3 = xor <4 x i64> %0, %1

	3499 ret <4 x i64> %3

	3500 }

	3501 ; CHECK-LABEL: define <2 x i64> @xor_binop_4xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3502 ; CHECK-NEXT: %6 = xor <2 x i64> %1, %3

	3503 ; CHECK-NEXT: %7 = xor <2 x i64> %2, %4

	3504 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3505 ; CHECK-NEXT: ret <2 x i64> %6

	3506

	3507 define <4 x i64> @or_binop_4xi64(<4 x i64>, <4 x i64>) {

	3508 %3 = or <4 x i64> %0, %1

	3509 ret <4 x i64> %3

	3510 }

	3511 ; CHECK-LABEL: define <2 x i64> @or_binop_4xi64(<2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3512 ; CHECK-NEXT: %6 = or <2 x i64> %1, %3

	3513 ; CHECK-NEXT: %7 = or <2 x i64> %2, %4

	3514 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3515 ; CHECK-NEXT: ret <2 x i64> %6

	3516

	3517 define <4 x i64> @urem_binop_4xi64(<4 x i64>, <4 x i64>) {

	3518 %3 = urem <4 x i64> %0, %1

	3519 ret <4 x i64> %3

	3520 }

	3521 ; CHECK-LABEL: define <2 x i64> @urem_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3522 ; CHECK-NEXT: %6 = urem <2 x i64> %1, %3

	3523 ; CHECK-NEXT: %7 = urem <2 x i64> %2, %4

	3524 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3525 ; CHECK-NEXT: ret <2 x i64> %6

	3526

	3527 define <4 x i64> @srem_binop_4xi64(<4 x i64>, <4 x i64>) {

	3528 %3 = srem <4 x i64> %0, %1

	3529 ret <4 x i64> %3

	3530 }

	3531 ; CHECK-LABEL: define <2 x i64> @srem_binop_4xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	3532 ; CHECK-NEXT: %6 = srem <2 x i64> %1, %3

	3533 ; CHECK-NEXT: %7 = srem <2 x i64> %2, %4

	3534 ; CHECK-NEXT: store <2 x i64> %7, <2 x i64>* %0, align 16

	3535 ; CHECK-NEXT: ret <2 x i64> %6

	3536

	3537 define <6 x i8> @add_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {

	3538 %3 = add nuw <6 x i8> %0, %1

	3539 ret <6 x i8> %3

	3540 }

	3541 ; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nuw(<16 x i8>, <16 x i8>)

	3542 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	3543 ; CHECK-NEXT: ret <16 x i8> %3

	3544

	3545 define <6 x i8> @add_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {

	3546 %3 = add nsw <6 x i8> %0, %1

	3547 ret <6 x i8> %3

	3548 }

	3549 ; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nsw(<16 x i8>, <16 x i8>)

	3550 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	3551 ; CHECK-NEXT: ret <16 x i8> %3

	3552

	3553 define <6 x i8> @add_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {

	3554 %3 = add nuw nsw <6 x i8> %0, %1

	3555 ret <6 x i8> %3

	3556 }

	3557 ; CHECK-LABEL: define <16 x i8> @add_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	3558 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	3559 ; CHECK-NEXT: ret <16 x i8> %3

	3560

	3561 define <6 x i8> @sub_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {

	3562 %3 = sub nuw <6 x i8> %0, %1

	3563 ret <6 x i8> %3

	3564 }

	3565 ; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nuw(<16 x i8>, <16 x i8>)

	3566 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	3567 ; CHECK-NEXT: ret <16 x i8> %3

	3568

	3569 define <6 x i8> @sub_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {

	3570 %3 = sub nsw <6 x i8> %0, %1

	3571 ret <6 x i8> %3

	3572 }

	3573 ; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nsw(<16 x i8>, <16 x i8>)

	3574 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	3575 ; CHECK-NEXT: ret <16 x i8> %3

	3576

	3577 define <6 x i8> @sub_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {

	3578 %3 = sub nuw nsw <6 x i8> %0, %1

	3579 ret <6 x i8> %3

	3580 }

	3581 ; CHECK-LABEL: define <16 x i8> @sub_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	3582 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	3583 ; CHECK-NEXT: ret <16 x i8> %3

	3584

	3585 define <6 x i8> @mul_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {

	3586 %3 = mul nuw <6 x i8> %0, %1

	3587 ret <6 x i8> %3

	3588 }

	3589 ; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nuw(<16 x i8>, <16 x i8>)

	3590 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	3591 ; CHECK-NEXT: ret <16 x i8> %3

	3592

	3593 define <6 x i8> @mul_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {

	3594 %3 = mul nsw <6 x i8> %0, %1

	3595 ret <6 x i8> %3

	3596 }

	3597 ; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nsw(<16 x i8>, <16 x i8>)

	3598 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	3599 ; CHECK-NEXT: ret <16 x i8> %3

	3600

	3601 define <6 x i8> @mul_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {

	3602 %3 = mul nuw nsw <6 x i8> %0, %1

	3603 ret <6 x i8> %3

	3604 }

	3605 ; CHECK-LABEL: define <16 x i8> @mul_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	3606 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	3607 ; CHECK-NEXT: ret <16 x i8> %3

	3608

	3609 define <6 x i8> @shl_binop_6xi8_nuw(<6 x i8>, <6 x i8>) {

	3610 %3 = shl nuw <6 x i8> %0, %1

	3611 ret <6 x i8> %3

	3612 }

	3613 ; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nuw(<16 x i8>, <16 x i8>)

	3614 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	3615 ; CHECK-NEXT: ret <16 x i8> %3

	3616

	3617 define <6 x i8> @shl_binop_6xi8_nsw(<6 x i8>, <6 x i8>) {

	3618 %3 = shl nsw <6 x i8> %0, %1

	3619 ret <6 x i8> %3

	3620 }

	3621 ; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nsw(<16 x i8>, <16 x i8>)

	3622 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	3623 ; CHECK-NEXT: ret <16 x i8> %3

	3624

	3625 define <6 x i8> @shl_binop_6xi8_nuw_nsw(<6 x i8>, <6 x i8>) {

	3626 %3 = shl nuw nsw <6 x i8> %0, %1

	3627 ret <6 x i8> %3

	3628 }

	3629 ; CHECK-LABEL: define <16 x i8> @shl_binop_6xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	3630 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	3631 ; CHECK-NEXT: ret <16 x i8> %3

	3632

	3633 define <6 x i8> @udiv_binop_6xi8(<6 x i8>, <6 x i8>) {

	3634 %3 = udiv <6 x i8> %0, %1

	3635 ret <6 x i8> %3

	3636 }

	3637 ; CHECK-LABEL: define <16 x i8> @udiv_binop_6xi8(<16 x i8>, <16 x i8>)

	3638 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	3639 ; CHECK-NEXT: ret <16 x i8> %3

	3640

	3641 define <6 x i8> @udiv_binop_6xi8_exact(<6 x i8>, <6 x i8>) {

	3642 %3 = udiv exact <6 x i8> %0, %1

	3643 ret <6 x i8> %3

	3644 }

	3645 ; CHECK-LABEL: define <16 x i8> @udiv_binop_6xi8_exact(<16 x i8>, <16 x i8>)

	3646 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	3647 ; CHECK-NEXT: ret <16 x i8> %3

	3648

	3649 define <6 x i8> @sdiv_binop_6xi8(<6 x i8>, <6 x i8>) {

	3650 %3 = sdiv <6 x i8> %0, %1

	3651 ret <6 x i8> %3

	3652 }

	3653 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_6xi8(<16 x i8>, <16 x i8>)

	3654 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	3655 ; CHECK-NEXT: ret <16 x i8> %3

	3656

	3657 define <6 x i8> @sdiv_binop_6xi8_exact(<6 x i8>, <6 x i8>) {

	3658 %3 = sdiv exact <6 x i8> %0, %1

	3659 ret <6 x i8> %3

	3660 }

	3661 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_6xi8_exact(<16 x i8>, <16 x i8>)

	3662 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	3663 ; CHECK-NEXT: ret <16 x i8> %3

	3664

	3665 define <6 x i8> @lshr_binop_6xi8(<6 x i8>, <6 x i8>) {

	3666 %3 = lshr <6 x i8> %0, %1

	3667 ret <6 x i8> %3

	3668 }

	3669 ; CHECK-LABEL: define <16 x i8> @lshr_binop_6xi8(<16 x i8>, <16 x i8>)

	3670 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	3671 ; CHECK-NEXT: ret <16 x i8> %3

	3672

	3673 define <6 x i8> @lshr_binop_6xi8_exact(<6 x i8>, <6 x i8>) {

	3674 %3 = lshr exact <6 x i8> %0, %1

	3675 ret <6 x i8> %3

	3676 }

	3677 ; CHECK-LABEL: define <16 x i8> @lshr_binop_6xi8_exact(<16 x i8>, <16 x i8>)

	3678 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	3679 ; CHECK-NEXT: ret <16 x i8> %3

	3680

	3681 define <6 x i8> @ashr_binop_6xi8(<6 x i8>, <6 x i8>) {

	3682 %3 = ashr <6 x i8> %0, %1

	3683 ret <6 x i8> %3

	3684 }

	3685 ; CHECK-LABEL: define <16 x i8> @ashr_binop_6xi8(<16 x i8>, <16 x i8>)

	3686 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	3687 ; CHECK-NEXT: ret <16 x i8> %3

	3688

	3689 define <6 x i8> @ashr_binop_6xi8_exact(<6 x i8>, <6 x i8>) {

	3690 %3 = ashr exact <6 x i8> %0, %1

	3691 ret <6 x i8> %3

	3692 }

	3693 ; CHECK-LABEL: define <16 x i8> @ashr_binop_6xi8_exact(<16 x i8>, <16 x i8>)

	3694 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	3695 ; CHECK-NEXT: ret <16 x i8> %3

	3696

	3697 define <6 x i8> @and_binop_6xi8(<6 x i8>, <6 x i8>) {

	3698 %3 = and <6 x i8> %0, %1

	3699 ret <6 x i8> %3

	3700 }

	3701 ; CHECK-LABEL: define <16 x i8> @and_binop_6xi8(<16 x i8>, <16 x i8>)

	3702 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	3703 ; CHECK-NEXT: ret <16 x i8> %3

	3704

	3705 define <6 x i8> @xor_binop_6xi8(<6 x i8>, <6 x i8>) {

	3706 %3 = xor <6 x i8> %0, %1

	3707 ret <6 x i8> %3

	3708 }

	3709 ; CHECK-LABEL: define <16 x i8> @xor_binop_6xi8(<16 x i8>, <16 x i8>)

	3710 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	3711 ; CHECK-NEXT: ret <16 x i8> %3

	3712

	3713 define <6 x i8> @or_binop_6xi8(<6 x i8>, <6 x i8>) {

	3714 %3 = or <6 x i8> %0, %1

	3715 ret <6 x i8> %3

	3716 }

	3717 ; CHECK-LABEL: define <16 x i8> @or_binop_6xi8(<16 x i8>, <16 x i8>)

	3718 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	3719 ; CHECK-NEXT: ret <16 x i8> %3

	3720

	3721 define <6 x i8> @urem_binop_6xi8(<6 x i8>, <6 x i8>) {

	3722 %3 = urem <6 x i8> %0, %1

	3723 ret <6 x i8> %3

	3724 }

	3725 ; CHECK-LABEL: define <16 x i8> @urem_binop_6xi8(<16 x i8>, <16 x i8>)

	3726 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	3727 ; CHECK-NEXT: ret <16 x i8> %3

	3728

	3729 define <6 x i8> @srem_binop_6xi8(<6 x i8>, <6 x i8>) {

	3730 %3 = srem <6 x i8> %0, %1

	3731 ret <6 x i8> %3

	3732 }

	3733 ; CHECK-LABEL: define <16 x i8> @srem_binop_6xi8(<16 x i8>, <16 x i8>)

	3734 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	3735 ; CHECK-NEXT: ret <16 x i8> %3

	3736

	3737 define <6 x i16> @add_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {

	3738 %3 = add nuw <6 x i16> %0, %1

	3739 ret <6 x i16> %3

	3740 }

	3741 ; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nuw(<8 x i16>, <8 x i16>)

	3742 ; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1

	3743 ; CHECK-NEXT: ret <8 x i16> %3

	3744

	3745 define <6 x i16> @add_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {

	3746 %3 = add nsw <6 x i16> %0, %1

	3747 ret <6 x i16> %3

	3748 }

	3749 ; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nsw(<8 x i16>, <8 x i16>)

	3750 ; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1

	3751 ; CHECK-NEXT: ret <8 x i16> %3

	3752

	3753 define <6 x i16> @add_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {

	3754 %3 = add nuw nsw <6 x i16> %0, %1

	3755 ret <6 x i16> %3

	3756 }

	3757 ; CHECK-LABEL: define <8 x i16> @add_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	3758 ; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1

	3759 ; CHECK-NEXT: ret <8 x i16> %3

	3760

	3761 define <6 x i16> @sub_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {

	3762 %3 = sub nuw <6 x i16> %0, %1

	3763 ret <6 x i16> %3

	3764 }

	3765 ; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nuw(<8 x i16>, <8 x i16>)

	3766 ; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1

	3767 ; CHECK-NEXT: ret <8 x i16> %3

	3768

	3769 define <6 x i16> @sub_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {

	3770 %3 = sub nsw <6 x i16> %0, %1

	3771 ret <6 x i16> %3

	3772 }

	3773 ; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nsw(<8 x i16>, <8 x i16>)

	3774 ; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1

	3775 ; CHECK-NEXT: ret <8 x i16> %3

	3776

	3777 define <6 x i16> @sub_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {

	3778 %3 = sub nuw nsw <6 x i16> %0, %1

	3779 ret <6 x i16> %3

	3780 }

	3781 ; CHECK-LABEL: define <8 x i16> @sub_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	3782 ; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1

	3783 ; CHECK-NEXT: ret <8 x i16> %3

	3784

	3785 define <6 x i16> @mul_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {

	3786 %3 = mul nuw <6 x i16> %0, %1

	3787 ret <6 x i16> %3

	3788 }

	3789 ; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nuw(<8 x i16>, <8 x i16>)

	3790 ; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1

	3791 ; CHECK-NEXT: ret <8 x i16> %3

	3792

	3793 define <6 x i16> @mul_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {

	3794 %3 = mul nsw <6 x i16> %0, %1

	3795 ret <6 x i16> %3

	3796 }

	3797 ; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nsw(<8 x i16>, <8 x i16>)

	3798 ; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1

	3799 ; CHECK-NEXT: ret <8 x i16> %3

	3800

	3801 define <6 x i16> @mul_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {

	3802 %3 = mul nuw nsw <6 x i16> %0, %1

	3803 ret <6 x i16> %3

	3804 }

	3805 ; CHECK-LABEL: define <8 x i16> @mul_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	3806 ; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1

	3807 ; CHECK-NEXT: ret <8 x i16> %3

	3808

	3809 define <6 x i16> @shl_binop_6xi16_nuw(<6 x i16>, <6 x i16>) {

	3810 %3 = shl nuw <6 x i16> %0, %1

	3811 ret <6 x i16> %3

	3812 }

	3813 ; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nuw(<8 x i16>, <8 x i16>)

	3814 ; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1

	3815 ; CHECK-NEXT: ret <8 x i16> %3

	3816

	3817 define <6 x i16> @shl_binop_6xi16_nsw(<6 x i16>, <6 x i16>) {

	3818 %3 = shl nsw <6 x i16> %0, %1

	3819 ret <6 x i16> %3

	3820 }

	3821 ; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nsw(<8 x i16>, <8 x i16>)

	3822 ; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1

	3823 ; CHECK-NEXT: ret <8 x i16> %3

	3824

	3825 define <6 x i16> @shl_binop_6xi16_nuw_nsw(<6 x i16>, <6 x i16>) {

	3826 %3 = shl nuw nsw <6 x i16> %0, %1

	3827 ret <6 x i16> %3

	3828 }

	3829 ; CHECK-LABEL: define <8 x i16> @shl_binop_6xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	3830 ; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1

	3831 ; CHECK-NEXT: ret <8 x i16> %3

	3832

	3833 define <6 x i16> @udiv_binop_6xi16(<6 x i16>, <6 x i16>) {

	3834 %3 = udiv <6 x i16> %0, %1

	3835 ret <6 x i16> %3

	3836 }

	3837 ; CHECK-LABEL: define <8 x i16> @udiv_binop_6xi16(<8 x i16>, <8 x i16>)

	3838 ; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1

	3839 ; CHECK-NEXT: ret <8 x i16> %3

	3840

	3841 define <6 x i16> @udiv_binop_6xi16_exact(<6 x i16>, <6 x i16>) {

	3842 %3 = udiv exact <6 x i16> %0, %1

	3843 ret <6 x i16> %3

	3844 }

	3845 ; CHECK-LABEL: define <8 x i16> @udiv_binop_6xi16_exact(<8 x i16>, <8 x i16>)

	3846 ; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1

	3847 ; CHECK-NEXT: ret <8 x i16> %3

	3848

	3849 define <6 x i16> @sdiv_binop_6xi16(<6 x i16>, <6 x i16>) {

	3850 %3 = sdiv <6 x i16> %0, %1

	3851 ret <6 x i16> %3

	3852 }

	3853 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_6xi16(<8 x i16>, <8 x i16>)

	3854 ; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1

	3855 ; CHECK-NEXT: ret <8 x i16> %3

	3856

	3857 define <6 x i16> @sdiv_binop_6xi16_exact(<6 x i16>, <6 x i16>) {

	3858 %3 = sdiv exact <6 x i16> %0, %1

	3859 ret <6 x i16> %3

	3860 }

	3861 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_6xi16_exact(<8 x i16>, <8 x i16>)

	3862 ; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1

	3863 ; CHECK-NEXT: ret <8 x i16> %3

	3864

	3865 define <6 x i16> @lshr_binop_6xi16(<6 x i16>, <6 x i16>) {

	3866 %3 = lshr <6 x i16> %0, %1

	3867 ret <6 x i16> %3

	3868 }

	3869 ; CHECK-LABEL: define <8 x i16> @lshr_binop_6xi16(<8 x i16>, <8 x i16>)

	3870 ; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1

	3871 ; CHECK-NEXT: ret <8 x i16> %3

	3872

	3873 define <6 x i16> @lshr_binop_6xi16_exact(<6 x i16>, <6 x i16>) {

	3874 %3 = lshr exact <6 x i16> %0, %1

	3875 ret <6 x i16> %3

	3876 }

	3877 ; CHECK-LABEL: define <8 x i16> @lshr_binop_6xi16_exact(<8 x i16>, <8 x i16>)

	3878 ; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1

	3879 ; CHECK-NEXT: ret <8 x i16> %3

	3880

	3881 define <6 x i16> @ashr_binop_6xi16(<6 x i16>, <6 x i16>) {

	3882 %3 = ashr <6 x i16> %0, %1

	3883 ret <6 x i16> %3

	3884 }

	3885 ; CHECK-LABEL: define <8 x i16> @ashr_binop_6xi16(<8 x i16>, <8 x i16>)

	3886 ; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1

	3887 ; CHECK-NEXT: ret <8 x i16> %3

	3888

	3889 define <6 x i16> @ashr_binop_6xi16_exact(<6 x i16>, <6 x i16>) {

	3890 %3 = ashr exact <6 x i16> %0, %1

	3891 ret <6 x i16> %3

	3892 }

	3893 ; CHECK-LABEL: define <8 x i16> @ashr_binop_6xi16_exact(<8 x i16>, <8 x i16>)

	3894 ; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1

	3895 ; CHECK-NEXT: ret <8 x i16> %3

	3896

	3897 define <6 x i16> @and_binop_6xi16(<6 x i16>, <6 x i16>) {

	3898 %3 = and <6 x i16> %0, %1

	3899 ret <6 x i16> %3

	3900 }

	3901 ; CHECK-LABEL: define <8 x i16> @and_binop_6xi16(<8 x i16>, <8 x i16>)

	3902 ; CHECK-NEXT: %3 = and <8 x i16> %0, %1

	3903 ; CHECK-NEXT: ret <8 x i16> %3

	3904

	3905 define <6 x i16> @xor_binop_6xi16(<6 x i16>, <6 x i16>) {

	3906 %3 = xor <6 x i16> %0, %1

	3907 ret <6 x i16> %3

	3908 }

	3909 ; CHECK-LABEL: define <8 x i16> @xor_binop_6xi16(<8 x i16>, <8 x i16>)

	3910 ; CHECK-NEXT: %3 = xor <8 x i16> %0, %1

	3911 ; CHECK-NEXT: ret <8 x i16> %3

	3912

	3913 define <6 x i16> @or_binop_6xi16(<6 x i16>, <6 x i16>) {

	3914 %3 = or <6 x i16> %0, %1

	3915 ret <6 x i16> %3

	3916 }

	3917 ; CHECK-LABEL: define <8 x i16> @or_binop_6xi16(<8 x i16>, <8 x i16>)

	3918 ; CHECK-NEXT: %3 = or <8 x i16> %0, %1

	3919 ; CHECK-NEXT: ret <8 x i16> %3

	3920

	3921 define <6 x i16> @urem_binop_6xi16(<6 x i16>, <6 x i16>) {

	3922 %3 = urem <6 x i16> %0, %1

	3923 ret <6 x i16> %3

	3924 }

	3925 ; CHECK-LABEL: define <8 x i16> @urem_binop_6xi16(<8 x i16>, <8 x i16>)

	3926 ; CHECK-NEXT: %3 = urem <8 x i16> %0, %1

	3927 ; CHECK-NEXT: ret <8 x i16> %3

	3928

	3929 define <6 x i16> @srem_binop_6xi16(<6 x i16>, <6 x i16>) {

	3930 %3 = srem <6 x i16> %0, %1

	3931 ret <6 x i16> %3

	3932 }

	3933 ; CHECK-LABEL: define <8 x i16> @srem_binop_6xi16(<8 x i16>, <8 x i16>)

	3934 ; CHECK-NEXT: %3 = srem <8 x i16> %0, %1

	3935 ; CHECK-NEXT: ret <8 x i16> %3

	3936

	3937 define <6 x i32> @add_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {

	3938 %3 = add nuw <6 x i32> %0, %1

	3939 ret <6 x i32> %3

	3940 }

	3941 ; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3942 ; CHECK-NEXT: %6 = add nuw <4 x i32> %1, %3

	3943 ; CHECK-NEXT: %7 = add nuw <4 x i32> %2, %4

	3944 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3945 ; CHECK-NEXT: ret <4 x i32> %6

	3946

	3947 define <6 x i32> @add_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {

	3948 %3 = add nsw <6 x i32> %0, %1

	3949 ret <6 x i32> %3

	3950 }

	3951 ; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3952 ; CHECK-NEXT: %6 = add nsw <4 x i32> %1, %3

	3953 ; CHECK-NEXT: %7 = add nsw <4 x i32> %2, %4

	3954 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3955 ; CHECK-NEXT: ret <4 x i32> %6

	3956

	3957 define <6 x i32> @add_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {

	3958 %3 = add nuw nsw <6 x i32> %0, %1

	3959 ret <6 x i32> %3

	3960 }

	3961 ; CHECK-LABEL: define <4 x i32> @add_binop_6xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3962 ; CHECK-NEXT: %6 = add nuw nsw <4 x i32> %1, %3

	3963 ; CHECK-NEXT: %7 = add nuw nsw <4 x i32> %2, %4

	3964 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3965 ; CHECK-NEXT: ret <4 x i32> %6

	3966

	3967 define <6 x i32> @sub_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {

	3968 %3 = sub nuw <6 x i32> %0, %1

	3969 ret <6 x i32> %3

	3970 }

	3971 ; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3972 ; CHECK-NEXT: %6 = sub nuw <4 x i32> %1, %3

	3973 ; CHECK-NEXT: %7 = sub nuw <4 x i32> %2, %4

	3974 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3975 ; CHECK-NEXT: ret <4 x i32> %6

	3976

	3977 define <6 x i32> @sub_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {

	3978 %3 = sub nsw <6 x i32> %0, %1

	3979 ret <6 x i32> %3

	3980 }

	3981 ; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3982 ; CHECK-NEXT: %6 = sub nsw <4 x i32> %1, %3

	3983 ; CHECK-NEXT: %7 = sub nsw <4 x i32> %2, %4

	3984 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3985 ; CHECK-NEXT: ret <4 x i32> %6

	3986

	3987 define <6 x i32> @sub_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {

	3988 %3 = sub nuw nsw <6 x i32> %0, %1

	3989 ret <6 x i32> %3

	3990 }

	3991 ; CHECK-LABEL: define <4 x i32> @sub_binop_6xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	3992 ; CHECK-NEXT: %6 = sub nuw nsw <4 x i32> %1, %3

	3993 ; CHECK-NEXT: %7 = sub nuw nsw <4 x i32> %2, %4

	3994 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	3995 ; CHECK-NEXT: ret <4 x i32> %6

	3996

	3997 define <6 x i32> @mul_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {

	3998 %3 = mul nuw <6 x i32> %0, %1

	3999 ret <6 x i32> %3

	4000 }

	4001 ; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4002 ; CHECK-NEXT: %6 = mul nuw <4 x i32> %1, %3

	4003 ; CHECK-NEXT: %7 = mul nuw <4 x i32> %2, %4

	4004 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4005 ; CHECK-NEXT: ret <4 x i32> %6

	4006

	4007 define <6 x i32> @mul_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {

	4008 %3 = mul nsw <6 x i32> %0, %1

	4009 ret <6 x i32> %3

	4010 }

	4011 ; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4012 ; CHECK-NEXT: %6 = mul nsw <4 x i32> %1, %3

	4013 ; CHECK-NEXT: %7 = mul nsw <4 x i32> %2, %4

	4014 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4015 ; CHECK-NEXT: ret <4 x i32> %6

	4016

	4017 define <6 x i32> @mul_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {

	4018 %3 = mul nuw nsw <6 x i32> %0, %1

	4019 ret <6 x i32> %3

	4020 }

	4021 ; CHECK-LABEL: define <4 x i32> @mul_binop_6xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4022 ; CHECK-NEXT: %6 = mul nuw nsw <4 x i32> %1, %3

	4023 ; CHECK-NEXT: %7 = mul nuw nsw <4 x i32> %2, %4

	4024 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4025 ; CHECK-NEXT: ret <4 x i32> %6

	4026

	4027 define <6 x i32> @shl_binop_6xi32_nuw(<6 x i32>, <6 x i32>) {

	4028 %3 = shl nuw <6 x i32> %0, %1

	4029 ret <6 x i32> %3

	4030 }

	4031 ; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4032 ; CHECK-NEXT: %6 = shl nuw <4 x i32> %1, %3

	4033 ; CHECK-NEXT: %7 = shl nuw <4 x i32> %2, %4

	4034 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4035 ; CHECK-NEXT: ret <4 x i32> %6

	4036

	4037 define <6 x i32> @shl_binop_6xi32_nsw(<6 x i32>, <6 x i32>) {

	4038 %3 = shl nsw <6 x i32> %0, %1

	4039 ret <6 x i32> %3

	4040 }

	4041 ; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4042 ; CHECK-NEXT: %6 = shl nsw <4 x i32> %1, %3

	4043 ; CHECK-NEXT: %7 = shl nsw <4 x i32> %2, %4

	4044 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4045 ; CHECK-NEXT: ret <4 x i32> %6

	4046

	4047 define <6 x i32> @shl_binop_6xi32_nuw_nsw(<6 x i32>, <6 x i32>) {

	4048 %3 = shl nuw nsw <6 x i32> %0, %1

	4049 ret <6 x i32> %3

	4050 }

	4051 ; CHECK-LABEL: define <4 x i32> @shl_binop_6xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4052 ; CHECK-NEXT: %6 = shl nuw nsw <4 x i32> %1, %3

	4053 ; CHECK-NEXT: %7 = shl nuw nsw <4 x i32> %2, %4

	4054 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4055 ; CHECK-NEXT: ret <4 x i32> %6

	4056

	4057 define <6 x i32> @udiv_binop_6xi32(<6 x i32>, <6 x i32>) {

	4058 %3 = udiv <6 x i32> %0, %1

	4059 ret <6 x i32> %3

	4060 }

	4061 ; CHECK-LABEL: define <4 x i32> @udiv_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4062 ; CHECK-NEXT: %6 = udiv <4 x i32> %1, %3

	4063 ; CHECK-NEXT: %7 = udiv <4 x i32> %2, %4

	4064 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4065 ; CHECK-NEXT: ret <4 x i32> %6

	4066

	4067 define <6 x i32> @udiv_binop_6xi32_exact(<6 x i32>, <6 x i32>) {

	4068 %3 = udiv exact <6 x i32> %0, %1

	4069 ret <6 x i32> %3

	4070 }

	4071 ; CHECK-LABEL: define <4 x i32> @udiv_binop_6xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4072 ; CHECK-NEXT: %6 = udiv exact <4 x i32> %1, %3

	4073 ; CHECK-NEXT: %7 = udiv exact <4 x i32> %2, %4

	4074 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4075 ; CHECK-NEXT: ret <4 x i32> %6

	4076

	4077 define <6 x i32> @sdiv_binop_6xi32(<6 x i32>, <6 x i32>) {

	4078 %3 = sdiv <6 x i32> %0, %1

	4079 ret <6 x i32> %3

	4080 }

	4081 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4082 ; CHECK-NEXT: %6 = sdiv <4 x i32> %1, %3

	4083 ; CHECK-NEXT: %7 = sdiv <4 x i32> %2, %4

	4084 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4085 ; CHECK-NEXT: ret <4 x i32> %6

	4086

	4087 define <6 x i32> @sdiv_binop_6xi32_exact(<6 x i32>, <6 x i32>) {

	4088 %3 = sdiv exact <6 x i32> %0, %1

	4089 ret <6 x i32> %3

	4090 }

	4091 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_6xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4092 ; CHECK-NEXT: %6 = sdiv exact <4 x i32> %1, %3

	4093 ; CHECK-NEXT: %7 = sdiv exact <4 x i32> %2, %4

	4094 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4095 ; CHECK-NEXT: ret <4 x i32> %6

	4096

	4097 define <6 x i32> @lshr_binop_6xi32(<6 x i32>, <6 x i32>) {

	4098 %3 = lshr <6 x i32> %0, %1

	4099 ret <6 x i32> %3

	4100 }

	4101 ; CHECK-LABEL: define <4 x i32> @lshr_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4102 ; CHECK-NEXT: %6 = lshr <4 x i32> %1, %3

	4103 ; CHECK-NEXT: %7 = lshr <4 x i32> %2, %4

	4104 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4105 ; CHECK-NEXT: ret <4 x i32> %6

	4106

	4107 define <6 x i32> @lshr_binop_6xi32_exact(<6 x i32>, <6 x i32>) {

	4108 %3 = lshr exact <6 x i32> %0, %1

	4109 ret <6 x i32> %3

	4110 }

	4111 ; CHECK-LABEL: define <4 x i32> @lshr_binop_6xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4112 ; CHECK-NEXT: %6 = lshr exact <4 x i32> %1, %3

	4113 ; CHECK-NEXT: %7 = lshr exact <4 x i32> %2, %4

	4114 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4115 ; CHECK-NEXT: ret <4 x i32> %6

	4116

	4117 define <6 x i32> @ashr_binop_6xi32(<6 x i32>, <6 x i32>) {

	4118 %3 = ashr <6 x i32> %0, %1

	4119 ret <6 x i32> %3

	4120 }

	4121 ; CHECK-LABEL: define <4 x i32> @ashr_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4122 ; CHECK-NEXT: %6 = ashr <4 x i32> %1, %3

	4123 ; CHECK-NEXT: %7 = ashr <4 x i32> %2, %4

	4124 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4125 ; CHECK-NEXT: ret <4 x i32> %6

	4126

	4127 define <6 x i32> @ashr_binop_6xi32_exact(<6 x i32>, <6 x i32>) {

	4128 %3 = ashr exact <6 x i32> %0, %1

	4129 ret <6 x i32> %3

	4130 }

	4131 ; CHECK-LABEL: define <4 x i32> @ashr_binop_6xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4132 ; CHECK-NEXT: %6 = ashr exact <4 x i32> %1, %3

	4133 ; CHECK-NEXT: %7 = ashr exact <4 x i32> %2, %4

	4134 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4135 ; CHECK-NEXT: ret <4 x i32> %6

	4136

	4137 define <6 x i32> @and_binop_6xi32(<6 x i32>, <6 x i32>) {

	4138 %3 = and <6 x i32> %0, %1

	4139 ret <6 x i32> %3

	4140 }

	4141 ; CHECK-LABEL: define <4 x i32> @and_binop_6xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4142 ; CHECK-NEXT: %6 = and <4 x i32> %1, %3

	4143 ; CHECK-NEXT: %7 = and <4 x i32> %2, %4

	4144 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4145 ; CHECK-NEXT: ret <4 x i32> %6

	4146

	4147 define <6 x i32> @xor_binop_6xi32(<6 x i32>, <6 x i32>) {

	4148 %3 = xor <6 x i32> %0, %1

	4149 ret <6 x i32> %3

	4150 }

	4151 ; CHECK-LABEL: define <4 x i32> @xor_binop_6xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4152 ; CHECK-NEXT: %6 = xor <4 x i32> %1, %3

	4153 ; CHECK-NEXT: %7 = xor <4 x i32> %2, %4

	4154 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4155 ; CHECK-NEXT: ret <4 x i32> %6

	4156

	4157 define <6 x i32> @or_binop_6xi32(<6 x i32>, <6 x i32>) {

	4158 %3 = or <6 x i32> %0, %1

	4159 ret <6 x i32> %3

	4160 }

	4161 ; CHECK-LABEL: define <4 x i32> @or_binop_6xi32(<4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4162 ; CHECK-NEXT: %6 = or <4 x i32> %1, %3

	4163 ; CHECK-NEXT: %7 = or <4 x i32> %2, %4

	4164 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4165 ; CHECK-NEXT: ret <4 x i32> %6

	4166

	4167 define <6 x i32> @urem_binop_6xi32(<6 x i32>, <6 x i32>) {

	4168 %3 = urem <6 x i32> %0, %1

	4169 ret <6 x i32> %3

	4170 }

	4171 ; CHECK-LABEL: define <4 x i32> @urem_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4172 ; CHECK-NEXT: %6 = urem <4 x i32> %1, %3

	4173 ; CHECK-NEXT: %7 = urem <4 x i32> %2, %4

	4174 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4175 ; CHECK-NEXT: ret <4 x i32> %6

	4176

	4177 define <6 x i32> @srem_binop_6xi32(<6 x i32>, <6 x i32>) {

	4178 %3 = srem <6 x i32> %0, %1

	4179 ret <6 x i32> %3

	4180 }

	4181 ; CHECK-LABEL: define <4 x i32> @srem_binop_6xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4182 ; CHECK-NEXT: %6 = srem <4 x i32> %1, %3

	4183 ; CHECK-NEXT: %7 = srem <4 x i32> %2, %4

	4184 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4185 ; CHECK-NEXT: ret <4 x i32> %6

	4186

	4187 define <6 x i64> @add_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {

	4188 %3 = add nuw <6 x i64> %0, %1

	4189 ret <6 x i64> %3

	4190 }

	4191 ; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4192 ; CHECK-NEXT: %9 = add nuw <2 x i64> %2, %5

	4193 ; CHECK-NEXT: %10 = add nuw <2 x i64> %3, %6

	4194 ; CHECK-NEXT: %11 = add nuw <2 x i64> %4, %7

	4195 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4196 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4197 ; CHECK-NEXT: ret <2 x i64> %9

	4198

	4199 define <6 x i64> @add_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {

	4200 %3 = add nsw <6 x i64> %0, %1

	4201 ret <6 x i64> %3

	4202 }

	4203 ; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4204 ; CHECK-NEXT: %9 = add nsw <2 x i64> %2, %5

	4205 ; CHECK-NEXT: %10 = add nsw <2 x i64> %3, %6

	4206 ; CHECK-NEXT: %11 = add nsw <2 x i64> %4, %7

	4207 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4208 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4209 ; CHECK-NEXT: ret <2 x i64> %9

	4210

	4211 define <6 x i64> @add_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {

	4212 %3 = add nuw nsw <6 x i64> %0, %1

	4213 ret <6 x i64> %3

	4214 }

	4215 ; CHECK-LABEL: define <2 x i64> @add_binop_6xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4216 ; CHECK-NEXT: %9 = add nuw nsw <2 x i64> %2, %5

	4217 ; CHECK-NEXT: %10 = add nuw nsw <2 x i64> %3, %6

	4218 ; CHECK-NEXT: %11 = add nuw nsw <2 x i64> %4, %7

	4219 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4220 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4221 ; CHECK-NEXT: ret <2 x i64> %9

	4222

	4223 define <6 x i64> @sub_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {

	4224 %3 = sub nuw <6 x i64> %0, %1

	4225 ret <6 x i64> %3

	4226 }

	4227 ; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4228 ; CHECK-NEXT: %9 = sub nuw <2 x i64> %2, %5

	4229 ; CHECK-NEXT: %10 = sub nuw <2 x i64> %3, %6

	4230 ; CHECK-NEXT: %11 = sub nuw <2 x i64> %4, %7

	4231 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4232 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4233 ; CHECK-NEXT: ret <2 x i64> %9

	4234

	4235 define <6 x i64> @sub_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {

	4236 %3 = sub nsw <6 x i64> %0, %1

	4237 ret <6 x i64> %3

	4238 }

	4239 ; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4240 ; CHECK-NEXT: %9 = sub nsw <2 x i64> %2, %5

	4241 ; CHECK-NEXT: %10 = sub nsw <2 x i64> %3, %6

	4242 ; CHECK-NEXT: %11 = sub nsw <2 x i64> %4, %7

	4243 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4244 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4245 ; CHECK-NEXT: ret <2 x i64> %9

	4246

	4247 define <6 x i64> @sub_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {

	4248 %3 = sub nuw nsw <6 x i64> %0, %1

	4249 ret <6 x i64> %3

	4250 }

	4251 ; CHECK-LABEL: define <2 x i64> @sub_binop_6xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4252 ; CHECK-NEXT: %9 = sub nuw nsw <2 x i64> %2, %5

	4253 ; CHECK-NEXT: %10 = sub nuw nsw <2 x i64> %3, %6

	4254 ; CHECK-NEXT: %11 = sub nuw nsw <2 x i64> %4, %7

	4255 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4256 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4257 ; CHECK-NEXT: ret <2 x i64> %9

	4258

	4259 define <6 x i64> @mul_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {

	4260 %3 = mul nuw <6 x i64> %0, %1

	4261 ret <6 x i64> %3

	4262 }

	4263 ; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4264 ; CHECK-NEXT: %9 = mul nuw <2 x i64> %2, %5

	4265 ; CHECK-NEXT: %10 = mul nuw <2 x i64> %3, %6

	4266 ; CHECK-NEXT: %11 = mul nuw <2 x i64> %4, %7

	4267 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4268 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4269 ; CHECK-NEXT: ret <2 x i64> %9

	4270

	4271 define <6 x i64> @mul_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {

	4272 %3 = mul nsw <6 x i64> %0, %1

	4273 ret <6 x i64> %3

	4274 }

	4275 ; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4276 ; CHECK-NEXT: %9 = mul nsw <2 x i64> %2, %5

	4277 ; CHECK-NEXT: %10 = mul nsw <2 x i64> %3, %6

	4278 ; CHECK-NEXT: %11 = mul nsw <2 x i64> %4, %7

	4279 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4280 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4281 ; CHECK-NEXT: ret <2 x i64> %9

	4282

	4283 define <6 x i64> @mul_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {

	4284 %3 = mul nuw nsw <6 x i64> %0, %1

	4285 ret <6 x i64> %3

	4286 }

	4287 ; CHECK-LABEL: define <2 x i64> @mul_binop_6xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4288 ; CHECK-NEXT: %9 = mul nuw nsw <2 x i64> %2, %5

	4289 ; CHECK-NEXT: %10 = mul nuw nsw <2 x i64> %3, %6

	4290 ; CHECK-NEXT: %11 = mul nuw nsw <2 x i64> %4, %7

	4291 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4292 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4293 ; CHECK-NEXT: ret <2 x i64> %9

	4294

	4295 define <6 x i64> @shl_binop_6xi64_nuw(<6 x i64>, <6 x i64>) {

	4296 %3 = shl nuw <6 x i64> %0, %1

	4297 ret <6 x i64> %3

	4298 }

	4299 ; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4300 ; CHECK-NEXT: %9 = shl nuw <2 x i64> %2, %5

	4301 ; CHECK-NEXT: %10 = shl nuw <2 x i64> %3, %6

	4302 ; CHECK-NEXT: %11 = shl nuw <2 x i64> %4, %7

	4303 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4304 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4305 ; CHECK-NEXT: ret <2 x i64> %9

	4306

	4307 define <6 x i64> @shl_binop_6xi64_nsw(<6 x i64>, <6 x i64>) {

	4308 %3 = shl nsw <6 x i64> %0, %1

	4309 ret <6 x i64> %3

	4310 }

	4311 ; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4312 ; CHECK-NEXT: %9 = shl nsw <2 x i64> %2, %5

	4313 ; CHECK-NEXT: %10 = shl nsw <2 x i64> %3, %6

	4314 ; CHECK-NEXT: %11 = shl nsw <2 x i64> %4, %7

	4315 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4316 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4317 ; CHECK-NEXT: ret <2 x i64> %9

	4318

	4319 define <6 x i64> @shl_binop_6xi64_nuw_nsw(<6 x i64>, <6 x i64>) {

	4320 %3 = shl nuw nsw <6 x i64> %0, %1

	4321 ret <6 x i64> %3

	4322 }

	4323 ; CHECK-LABEL: define <2 x i64> @shl_binop_6xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4324 ; CHECK-NEXT: %9 = shl nuw nsw <2 x i64> %2, %5

	4325 ; CHECK-NEXT: %10 = shl nuw nsw <2 x i64> %3, %6

	4326 ; CHECK-NEXT: %11 = shl nuw nsw <2 x i64> %4, %7

	4327 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4328 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4329 ; CHECK-NEXT: ret <2 x i64> %9

	4330

	4331 define <6 x i64> @udiv_binop_6xi64(<6 x i64>, <6 x i64>) {

	4332 %3 = udiv <6 x i64> %0, %1

	4333 ret <6 x i64> %3

	4334 }

	4335 ; CHECK-LABEL: define <2 x i64> @udiv_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4336 ; CHECK-NEXT: %9 = udiv <2 x i64> %2, %5

	4337 ; CHECK-NEXT: %10 = udiv <2 x i64> %3, %6

	4338 ; CHECK-NEXT: %11 = udiv <2 x i64> %4, %7

	4339 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4340 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4341 ; CHECK-NEXT: ret <2 x i64> %9

	4342

	4343 define <6 x i64> @udiv_binop_6xi64_exact(<6 x i64>, <6 x i64>) {

	4344 %3 = udiv exact <6 x i64> %0, %1

	4345 ret <6 x i64> %3

	4346 }

	4347 ; CHECK-LABEL: define <2 x i64> @udiv_binop_6xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4348 ; CHECK-NEXT: %9 = udiv exact <2 x i64> %2, %5

	4349 ; CHECK-NEXT: %10 = udiv exact <2 x i64> %3, %6

	4350 ; CHECK-NEXT: %11 = udiv exact <2 x i64> %4, %7

	4351 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4352 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4353 ; CHECK-NEXT: ret <2 x i64> %9

	4354

	4355 define <6 x i64> @sdiv_binop_6xi64(<6 x i64>, <6 x i64>) {

	4356 %3 = sdiv <6 x i64> %0, %1

	4357 ret <6 x i64> %3

	4358 }

	4359 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4360 ; CHECK-NEXT: %9 = sdiv <2 x i64> %2, %5

	4361 ; CHECK-NEXT: %10 = sdiv <2 x i64> %3, %6

	4362 ; CHECK-NEXT: %11 = sdiv <2 x i64> %4, %7

	4363 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4364 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4365 ; CHECK-NEXT: ret <2 x i64> %9

	4366

	4367 define <6 x i64> @sdiv_binop_6xi64_exact(<6 x i64>, <6 x i64>) {

	4368 %3 = sdiv exact <6 x i64> %0, %1

	4369 ret <6 x i64> %3

	4370 }

	4371 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_6xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4372 ; CHECK-NEXT: %9 = sdiv exact <2 x i64> %2, %5

	4373 ; CHECK-NEXT: %10 = sdiv exact <2 x i64> %3, %6

	4374 ; CHECK-NEXT: %11 = sdiv exact <2 x i64> %4, %7

	4375 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4376 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4377 ; CHECK-NEXT: ret <2 x i64> %9

	4378

	4379 define <6 x i64> @lshr_binop_6xi64(<6 x i64>, <6 x i64>) {

	4380 %3 = lshr <6 x i64> %0, %1

	4381 ret <6 x i64> %3

	4382 }

	4383 ; CHECK-LABEL: define <2 x i64> @lshr_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4384 ; CHECK-NEXT: %9 = lshr <2 x i64> %2, %5

	4385 ; CHECK-NEXT: %10 = lshr <2 x i64> %3, %6

	4386 ; CHECK-NEXT: %11 = lshr <2 x i64> %4, %7

	4387 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4388 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4389 ; CHECK-NEXT: ret <2 x i64> %9

	4390

	4391 define <6 x i64> @lshr_binop_6xi64_exact(<6 x i64>, <6 x i64>) {

	4392 %3 = lshr exact <6 x i64> %0, %1

	4393 ret <6 x i64> %3

	4394 }

	4395 ; CHECK-LABEL: define <2 x i64> @lshr_binop_6xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4396 ; CHECK-NEXT: %9 = lshr exact <2 x i64> %2, %5

	4397 ; CHECK-NEXT: %10 = lshr exact <2 x i64> %3, %6

	4398 ; CHECK-NEXT: %11 = lshr exact <2 x i64> %4, %7

	4399 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4400 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4401 ; CHECK-NEXT: ret <2 x i64> %9

	4402

	4403 define <6 x i64> @ashr_binop_6xi64(<6 x i64>, <6 x i64>) {

	4404 %3 = ashr <6 x i64> %0, %1

	4405 ret <6 x i64> %3

	4406 }

	4407 ; CHECK-LABEL: define <2 x i64> @ashr_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4408 ; CHECK-NEXT: %9 = ashr <2 x i64> %2, %5

	4409 ; CHECK-NEXT: %10 = ashr <2 x i64> %3, %6

	4410 ; CHECK-NEXT: %11 = ashr <2 x i64> %4, %7

	4411 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4412 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4413 ; CHECK-NEXT: ret <2 x i64> %9

	4414

	4415 define <6 x i64> @ashr_binop_6xi64_exact(<6 x i64>, <6 x i64>) {

	4416 %3 = ashr exact <6 x i64> %0, %1

	4417 ret <6 x i64> %3

	4418 }

	4419 ; CHECK-LABEL: define <2 x i64> @ashr_binop_6xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4420 ; CHECK-NEXT: %9 = ashr exact <2 x i64> %2, %5

	4421 ; CHECK-NEXT: %10 = ashr exact <2 x i64> %3, %6

	4422 ; CHECK-NEXT: %11 = ashr exact <2 x i64> %4, %7

	4423 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4424 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4425 ; CHECK-NEXT: ret <2 x i64> %9

	4426

	4427 define <6 x i64> @and_binop_6xi64(<6 x i64>, <6 x i64>) {

	4428 %3 = and <6 x i64> %0, %1

	4429 ret <6 x i64> %3

	4430 }

	4431 ; CHECK-LABEL: define <2 x i64> @and_binop_6xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4432 ; CHECK-NEXT: %9 = and <2 x i64> %2, %5

	4433 ; CHECK-NEXT: %10 = and <2 x i64> %3, %6

	4434 ; CHECK-NEXT: %11 = and <2 x i64> %4, %7

	4435 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4436 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4437 ; CHECK-NEXT: ret <2 x i64> %9

	4438

	4439 define <6 x i64> @xor_binop_6xi64(<6 x i64>, <6 x i64>) {

	4440 %3 = xor <6 x i64> %0, %1

	4441 ret <6 x i64> %3

	4442 }

	4443 ; CHECK-LABEL: define <2 x i64> @xor_binop_6xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4444 ; CHECK-NEXT: %9 = xor <2 x i64> %2, %5

	4445 ; CHECK-NEXT: %10 = xor <2 x i64> %3, %6

	4446 ; CHECK-NEXT: %11 = xor <2 x i64> %4, %7

	4447 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4448 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4449 ; CHECK-NEXT: ret <2 x i64> %9

	4450

	4451 define <6 x i64> @or_binop_6xi64(<6 x i64>, <6 x i64>) {

	4452 %3 = or <6 x i64> %0, %1

	4453 ret <6 x i64> %3

	4454 }

	4455 ; CHECK-LABEL: define <2 x i64> @or_binop_6xi64(<2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4456 ; CHECK-NEXT: %9 = or <2 x i64> %2, %5

	4457 ; CHECK-NEXT: %10 = or <2 x i64> %3, %6

	4458 ; CHECK-NEXT: %11 = or <2 x i64> %4, %7

	4459 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4460 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4461 ; CHECK-NEXT: ret <2 x i64> %9

	4462

	4463 define <6 x i64> @urem_binop_6xi64(<6 x i64>, <6 x i64>) {

	4464 %3 = urem <6 x i64> %0, %1

	4465 ret <6 x i64> %3

	4466 }

	4467 ; CHECK-LABEL: define <2 x i64> @urem_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4468 ; CHECK-NEXT: %9 = urem <2 x i64> %2, %5

	4469 ; CHECK-NEXT: %10 = urem <2 x i64> %3, %6

	4470 ; CHECK-NEXT: %11 = urem <2 x i64> %4, %7

	4471 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4472 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4473 ; CHECK-NEXT: ret <2 x i64> %9

	4474

	4475 define <6 x i64> @srem_binop_6xi64(<6 x i64>, <6 x i64>) {

	4476 %3 = srem <6 x i64> %0, %1

	4477 ret <6 x i64> %3

	4478 }

	4479 ; CHECK-LABEL: define <2 x i64> @srem_binop_6xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	4480 ; CHECK-NEXT: %9 = srem <2 x i64> %2, %5

	4481 ; CHECK-NEXT: %10 = srem <2 x i64> %3, %6

	4482 ; CHECK-NEXT: %11 = srem <2 x i64> %4, %7

	4483 ; CHECK-NEXT: store <2 x i64> %10, <2 x i64>* %0, align 16

	4484 ; CHECK-NEXT: store <2 x i64> %11, <2 x i64>* %1, align 16

	4485 ; CHECK-NEXT: ret <2 x i64> %9

	4486

	4487 define <8 x i8> @add_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {

	4488 %3 = add nuw <8 x i8> %0, %1

	4489 ret <8 x i8> %3

	4490 }

	4491 ; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nuw(<16 x i8>, <16 x i8>)

	4492 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	4493 ; CHECK-NEXT: ret <16 x i8> %3

	4494

	4495 define <8 x i8> @add_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {

	4496 %3 = add nsw <8 x i8> %0, %1

	4497 ret <8 x i8> %3

	4498 }

	4499 ; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nsw(<16 x i8>, <16 x i8>)

	4500 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	4501 ; CHECK-NEXT: ret <16 x i8> %3

	4502

	4503 define <8 x i8> @add_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {

	4504 %3 = add nuw nsw <8 x i8> %0, %1

	4505 ret <8 x i8> %3

	4506 }

	4507 ; CHECK-LABEL: define <16 x i8> @add_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	4508 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	4509 ; CHECK-NEXT: ret <16 x i8> %3

	4510

	4511 define <8 x i8> @sub_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {

	4512 %3 = sub nuw <8 x i8> %0, %1

	4513 ret <8 x i8> %3

	4514 }

	4515 ; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nuw(<16 x i8>, <16 x i8>)

	4516 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	4517 ; CHECK-NEXT: ret <16 x i8> %3

	4518

	4519 define <8 x i8> @sub_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {

	4520 %3 = sub nsw <8 x i8> %0, %1

	4521 ret <8 x i8> %3

	4522 }

	4523 ; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nsw(<16 x i8>, <16 x i8>)

	4524 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	4525 ; CHECK-NEXT: ret <16 x i8> %3

	4526

	4527 define <8 x i8> @sub_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {

	4528 %3 = sub nuw nsw <8 x i8> %0, %1

	4529 ret <8 x i8> %3

	4530 }

	4531 ; CHECK-LABEL: define <16 x i8> @sub_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	4532 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	4533 ; CHECK-NEXT: ret <16 x i8> %3

	4534

	4535 define <8 x i8> @mul_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {

	4536 %3 = mul nuw <8 x i8> %0, %1

	4537 ret <8 x i8> %3

	4538 }

	4539 ; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nuw(<16 x i8>, <16 x i8>)

	4540 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	4541 ; CHECK-NEXT: ret <16 x i8> %3

	4542

	4543 define <8 x i8> @mul_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {

	4544 %3 = mul nsw <8 x i8> %0, %1

	4545 ret <8 x i8> %3

	4546 }

	4547 ; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nsw(<16 x i8>, <16 x i8>)

	4548 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	4549 ; CHECK-NEXT: ret <16 x i8> %3

	4550

	4551 define <8 x i8> @mul_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {

	4552 %3 = mul nuw nsw <8 x i8> %0, %1

	4553 ret <8 x i8> %3

	4554 }

	4555 ; CHECK-LABEL: define <16 x i8> @mul_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	4556 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	4557 ; CHECK-NEXT: ret <16 x i8> %3

	4558

	4559 define <8 x i8> @shl_binop_8xi8_nuw(<8 x i8>, <8 x i8>) {

	4560 %3 = shl nuw <8 x i8> %0, %1

	4561 ret <8 x i8> %3

	4562 }

	4563 ; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nuw(<16 x i8>, <16 x i8>)

	4564 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	4565 ; CHECK-NEXT: ret <16 x i8> %3

	4566

	4567 define <8 x i8> @shl_binop_8xi8_nsw(<8 x i8>, <8 x i8>) {

	4568 %3 = shl nsw <8 x i8> %0, %1

	4569 ret <8 x i8> %3

	4570 }

	4571 ; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nsw(<16 x i8>, <16 x i8>)

	4572 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	4573 ; CHECK-NEXT: ret <16 x i8> %3

	4574

	4575 define <8 x i8> @shl_binop_8xi8_nuw_nsw(<8 x i8>, <8 x i8>) {

	4576 %3 = shl nuw nsw <8 x i8> %0, %1

	4577 ret <8 x i8> %3

	4578 }

	4579 ; CHECK-LABEL: define <16 x i8> @shl_binop_8xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	4580 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	4581 ; CHECK-NEXT: ret <16 x i8> %3

	4582

	4583 define <8 x i8> @udiv_binop_8xi8(<8 x i8>, <8 x i8>) {

	4584 %3 = udiv <8 x i8> %0, %1

	4585 ret <8 x i8> %3

	4586 }

	4587 ; CHECK-LABEL: define <16 x i8> @udiv_binop_8xi8(<16 x i8>, <16 x i8>)

	4588 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	4589 ; CHECK-NEXT: ret <16 x i8> %3

	4590

	4591 define <8 x i8> @udiv_binop_8xi8_exact(<8 x i8>, <8 x i8>) {

	4592 %3 = udiv exact <8 x i8> %0, %1

	4593 ret <8 x i8> %3

	4594 }

	4595 ; CHECK-LABEL: define <16 x i8> @udiv_binop_8xi8_exact(<16 x i8>, <16 x i8>)

	4596 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	4597 ; CHECK-NEXT: ret <16 x i8> %3

	4598

	4599 define <8 x i8> @sdiv_binop_8xi8(<8 x i8>, <8 x i8>) {

	4600 %3 = sdiv <8 x i8> %0, %1

	4601 ret <8 x i8> %3

	4602 }

	4603 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_8xi8(<16 x i8>, <16 x i8>)

	4604 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	4605 ; CHECK-NEXT: ret <16 x i8> %3

	4606

	4607 define <8 x i8> @sdiv_binop_8xi8_exact(<8 x i8>, <8 x i8>) {

	4608 %3 = sdiv exact <8 x i8> %0, %1

	4609 ret <8 x i8> %3

	4610 }

	4611 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_8xi8_exact(<16 x i8>, <16 x i8>)

	4612 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	4613 ; CHECK-NEXT: ret <16 x i8> %3

	4614

	4615 define <8 x i8> @lshr_binop_8xi8(<8 x i8>, <8 x i8>) {

	4616 %3 = lshr <8 x i8> %0, %1

	4617 ret <8 x i8> %3

	4618 }

	4619 ; CHECK-LABEL: define <16 x i8> @lshr_binop_8xi8(<16 x i8>, <16 x i8>)

	4620 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	4621 ; CHECK-NEXT: ret <16 x i8> %3

	4622

	4623 define <8 x i8> @lshr_binop_8xi8_exact(<8 x i8>, <8 x i8>) {

	4624 %3 = lshr exact <8 x i8> %0, %1

	4625 ret <8 x i8> %3

	4626 }

	4627 ; CHECK-LABEL: define <16 x i8> @lshr_binop_8xi8_exact(<16 x i8>, <16 x i8>)

	4628 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	4629 ; CHECK-NEXT: ret <16 x i8> %3

	4630

	4631 define <8 x i8> @ashr_binop_8xi8(<8 x i8>, <8 x i8>) {

	4632 %3 = ashr <8 x i8> %0, %1

	4633 ret <8 x i8> %3

	4634 }

	4635 ; CHECK-LABEL: define <16 x i8> @ashr_binop_8xi8(<16 x i8>, <16 x i8>)

	4636 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	4637 ; CHECK-NEXT: ret <16 x i8> %3

	4638

	4639 define <8 x i8> @ashr_binop_8xi8_exact(<8 x i8>, <8 x i8>) {

	4640 %3 = ashr exact <8 x i8> %0, %1

	4641 ret <8 x i8> %3

	4642 }

	4643 ; CHECK-LABEL: define <16 x i8> @ashr_binop_8xi8_exact(<16 x i8>, <16 x i8>)

	4644 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	4645 ; CHECK-NEXT: ret <16 x i8> %3

	4646

	4647 define <8 x i8> @and_binop_8xi8(<8 x i8>, <8 x i8>) {

	4648 %3 = and <8 x i8> %0, %1

	4649 ret <8 x i8> %3

	4650 }

	4651 ; CHECK-LABEL: define <16 x i8> @and_binop_8xi8(<16 x i8>, <16 x i8>)

	4652 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	4653 ; CHECK-NEXT: ret <16 x i8> %3

	4654

	4655 define <8 x i8> @xor_binop_8xi8(<8 x i8>, <8 x i8>) {

	4656 %3 = xor <8 x i8> %0, %1

	4657 ret <8 x i8> %3

	4658 }

	4659 ; CHECK-LABEL: define <16 x i8> @xor_binop_8xi8(<16 x i8>, <16 x i8>)

	4660 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	4661 ; CHECK-NEXT: ret <16 x i8> %3

	4662

	4663 define <8 x i8> @or_binop_8xi8(<8 x i8>, <8 x i8>) {

	4664 %3 = or <8 x i8> %0, %1

	4665 ret <8 x i8> %3

	4666 }

	4667 ; CHECK-LABEL: define <16 x i8> @or_binop_8xi8(<16 x i8>, <16 x i8>)

	4668 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	4669 ; CHECK-NEXT: ret <16 x i8> %3

	4670

	4671 define <8 x i8> @urem_binop_8xi8(<8 x i8>, <8 x i8>) {

	4672 %3 = urem <8 x i8> %0, %1

	4673 ret <8 x i8> %3

	4674 }

	4675 ; CHECK-LABEL: define <16 x i8> @urem_binop_8xi8(<16 x i8>, <16 x i8>)

	4676 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	4677 ; CHECK-NEXT: ret <16 x i8> %3

	4678

	4679 define <8 x i8> @srem_binop_8xi8(<8 x i8>, <8 x i8>) {

	4680 %3 = srem <8 x i8> %0, %1

	4681 ret <8 x i8> %3

	4682 }

	4683 ; CHECK-LABEL: define <16 x i8> @srem_binop_8xi8(<16 x i8>, <16 x i8>)

	4684 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	4685 ; CHECK-NEXT: ret <16 x i8> %3

	4686

	4687 define <8 x i16> @add_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {

	4688 %3 = add nuw <8 x i16> %0, %1

	4689 ret <8 x i16> %3

	4690 }

	4691 ; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nuw(<8 x i16>, <8 x i16>)

	4692 ; CHECK-NEXT: %3 = add nuw <8 x i16> %0, %1

	4693 ; CHECK-NEXT: ret <8 x i16> %3

	4694

	4695 define <8 x i16> @add_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {

	4696 %3 = add nsw <8 x i16> %0, %1

	4697 ret <8 x i16> %3

	4698 }

	4699 ; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nsw(<8 x i16>, <8 x i16>)

	4700 ; CHECK-NEXT: %3 = add nsw <8 x i16> %0, %1

	4701 ; CHECK-NEXT: ret <8 x i16> %3

	4702

	4703 define <8 x i16> @add_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {

	4704 %3 = add nuw nsw <8 x i16> %0, %1

	4705 ret <8 x i16> %3

	4706 }

	4707 ; CHECK-LABEL: define <8 x i16> @add_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	4708 ; CHECK-NEXT: %3 = add nuw nsw <8 x i16> %0, %1

	4709 ; CHECK-NEXT: ret <8 x i16> %3

	4710

	4711 define <8 x i16> @sub_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {

	4712 %3 = sub nuw <8 x i16> %0, %1

	4713 ret <8 x i16> %3

	4714 }

	4715 ; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nuw(<8 x i16>, <8 x i16>)

	4716 ; CHECK-NEXT: %3 = sub nuw <8 x i16> %0, %1

	4717 ; CHECK-NEXT: ret <8 x i16> %3

	4718

	4719 define <8 x i16> @sub_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {

	4720 %3 = sub nsw <8 x i16> %0, %1

	4721 ret <8 x i16> %3

	4722 }

	4723 ; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nsw(<8 x i16>, <8 x i16>)

	4724 ; CHECK-NEXT: %3 = sub nsw <8 x i16> %0, %1

	4725 ; CHECK-NEXT: ret <8 x i16> %3

	4726

	4727 define <8 x i16> @sub_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {

	4728 %3 = sub nuw nsw <8 x i16> %0, %1

	4729 ret <8 x i16> %3

	4730 }

	4731 ; CHECK-LABEL: define <8 x i16> @sub_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	4732 ; CHECK-NEXT: %3 = sub nuw nsw <8 x i16> %0, %1

	4733 ; CHECK-NEXT: ret <8 x i16> %3

	4734

	4735 define <8 x i16> @mul_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {

	4736 %3 = mul nuw <8 x i16> %0, %1

	4737 ret <8 x i16> %3

	4738 }

	4739 ; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nuw(<8 x i16>, <8 x i16>)

	4740 ; CHECK-NEXT: %3 = mul nuw <8 x i16> %0, %1

	4741 ; CHECK-NEXT: ret <8 x i16> %3

	4742

	4743 define <8 x i16> @mul_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {

	4744 %3 = mul nsw <8 x i16> %0, %1

	4745 ret <8 x i16> %3

	4746 }

	4747 ; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nsw(<8 x i16>, <8 x i16>)

	4748 ; CHECK-NEXT: %3 = mul nsw <8 x i16> %0, %1

	4749 ; CHECK-NEXT: ret <8 x i16> %3

	4750

	4751 define <8 x i16> @mul_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {

	4752 %3 = mul nuw nsw <8 x i16> %0, %1

	4753 ret <8 x i16> %3

	4754 }

	4755 ; CHECK-LABEL: define <8 x i16> @mul_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	4756 ; CHECK-NEXT: %3 = mul nuw nsw <8 x i16> %0, %1

	4757 ; CHECK-NEXT: ret <8 x i16> %3

	4758

	4759 define <8 x i16> @shl_binop_8xi16_nuw(<8 x i16>, <8 x i16>) {

	4760 %3 = shl nuw <8 x i16> %0, %1

	4761 ret <8 x i16> %3

	4762 }

	4763 ; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nuw(<8 x i16>, <8 x i16>)

	4764 ; CHECK-NEXT: %3 = shl nuw <8 x i16> %0, %1

	4765 ; CHECK-NEXT: ret <8 x i16> %3

	4766

	4767 define <8 x i16> @shl_binop_8xi16_nsw(<8 x i16>, <8 x i16>) {

	4768 %3 = shl nsw <8 x i16> %0, %1

	4769 ret <8 x i16> %3

	4770 }

	4771 ; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nsw(<8 x i16>, <8 x i16>)

	4772 ; CHECK-NEXT: %3 = shl nsw <8 x i16> %0, %1

	4773 ; CHECK-NEXT: ret <8 x i16> %3

	4774

	4775 define <8 x i16> @shl_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>) {

	4776 %3 = shl nuw nsw <8 x i16> %0, %1

	4777 ret <8 x i16> %3

	4778 }

	4779 ; CHECK-LABEL: define <8 x i16> @shl_binop_8xi16_nuw_nsw(<8 x i16>, <8 x i16>)

	4780 ; CHECK-NEXT: %3 = shl nuw nsw <8 x i16> %0, %1

	4781 ; CHECK-NEXT: ret <8 x i16> %3

	4782

	4783 define <8 x i16> @udiv_binop_8xi16(<8 x i16>, <8 x i16>) {

	4784 %3 = udiv <8 x i16> %0, %1

	4785 ret <8 x i16> %3

	4786 }

	4787 ; CHECK-LABEL: define <8 x i16> @udiv_binop_8xi16(<8 x i16>, <8 x i16>)

	4788 ; CHECK-NEXT: %3 = udiv <8 x i16> %0, %1

	4789 ; CHECK-NEXT: ret <8 x i16> %3

	4790

	4791 define <8 x i16> @udiv_binop_8xi16_exact(<8 x i16>, <8 x i16>) {

	4792 %3 = udiv exact <8 x i16> %0, %1

	4793 ret <8 x i16> %3

	4794 }

	4795 ; CHECK-LABEL: define <8 x i16> @udiv_binop_8xi16_exact(<8 x i16>, <8 x i16>)

	4796 ; CHECK-NEXT: %3 = udiv exact <8 x i16> %0, %1

	4797 ; CHECK-NEXT: ret <8 x i16> %3

	4798

	4799 define <8 x i16> @sdiv_binop_8xi16(<8 x i16>, <8 x i16>) {

	4800 %3 = sdiv <8 x i16> %0, %1

	4801 ret <8 x i16> %3

	4802 }

	4803 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_8xi16(<8 x i16>, <8 x i16>)

	4804 ; CHECK-NEXT: %3 = sdiv <8 x i16> %0, %1

	4805 ; CHECK-NEXT: ret <8 x i16> %3

	4806

	4807 define <8 x i16> @sdiv_binop_8xi16_exact(<8 x i16>, <8 x i16>) {

	4808 %3 = sdiv exact <8 x i16> %0, %1

	4809 ret <8 x i16> %3

	4810 }

	4811 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_8xi16_exact(<8 x i16>, <8 x i16>)

	4812 ; CHECK-NEXT: %3 = sdiv exact <8 x i16> %0, %1

	4813 ; CHECK-NEXT: ret <8 x i16> %3

	4814

	4815 define <8 x i16> @lshr_binop_8xi16(<8 x i16>, <8 x i16>) {

	4816 %3 = lshr <8 x i16> %0, %1

	4817 ret <8 x i16> %3

	4818 }

	4819 ; CHECK-LABEL: define <8 x i16> @lshr_binop_8xi16(<8 x i16>, <8 x i16>)

	4820 ; CHECK-NEXT: %3 = lshr <8 x i16> %0, %1

	4821 ; CHECK-NEXT: ret <8 x i16> %3

	4822

	4823 define <8 x i16> @lshr_binop_8xi16_exact(<8 x i16>, <8 x i16>) {

	4824 %3 = lshr exact <8 x i16> %0, %1

	4825 ret <8 x i16> %3

	4826 }

	4827 ; CHECK-LABEL: define <8 x i16> @lshr_binop_8xi16_exact(<8 x i16>, <8 x i16>)

	4828 ; CHECK-NEXT: %3 = lshr exact <8 x i16> %0, %1

	4829 ; CHECK-NEXT: ret <8 x i16> %3

	4830

	4831 define <8 x i16> @ashr_binop_8xi16(<8 x i16>, <8 x i16>) {

	4832 %3 = ashr <8 x i16> %0, %1

	4833 ret <8 x i16> %3

	4834 }

	4835 ; CHECK-LABEL: define <8 x i16> @ashr_binop_8xi16(<8 x i16>, <8 x i16>)

	4836 ; CHECK-NEXT: %3 = ashr <8 x i16> %0, %1

	4837 ; CHECK-NEXT: ret <8 x i16> %3

	4838

	4839 define <8 x i16> @ashr_binop_8xi16_exact(<8 x i16>, <8 x i16>) {

	4840 %3 = ashr exact <8 x i16> %0, %1

	4841 ret <8 x i16> %3

	4842 }

	4843 ; CHECK-LABEL: define <8 x i16> @ashr_binop_8xi16_exact(<8 x i16>, <8 x i16>)

	4844 ; CHECK-NEXT: %3 = ashr exact <8 x i16> %0, %1

	4845 ; CHECK-NEXT: ret <8 x i16> %3

	4846

	4847 define <8 x i16> @and_binop_8xi16(<8 x i16>, <8 x i16>) {

	4848 %3 = and <8 x i16> %0, %1

	4849 ret <8 x i16> %3

	4850 }

	4851 ; CHECK-LABEL: define <8 x i16> @and_binop_8xi16(<8 x i16>, <8 x i16>)

	4852 ; CHECK-NEXT: %3 = and <8 x i16> %0, %1

	4853 ; CHECK-NEXT: ret <8 x i16> %3

	4854

	4855 define <8 x i16> @xor_binop_8xi16(<8 x i16>, <8 x i16>) {

	4856 %3 = xor <8 x i16> %0, %1

	4857 ret <8 x i16> %3

	4858 }

	4859 ; CHECK-LABEL: define <8 x i16> @xor_binop_8xi16(<8 x i16>, <8 x i16>)

	4860 ; CHECK-NEXT: %3 = xor <8 x i16> %0, %1

	4861 ; CHECK-NEXT: ret <8 x i16> %3

	4862

	4863 define <8 x i16> @or_binop_8xi16(<8 x i16>, <8 x i16>) {

	4864 %3 = or <8 x i16> %0, %1

	4865 ret <8 x i16> %3

	4866 }

	4867 ; CHECK-LABEL: define <8 x i16> @or_binop_8xi16(<8 x i16>, <8 x i16>)

	4868 ; CHECK-NEXT: %3 = or <8 x i16> %0, %1

	4869 ; CHECK-NEXT: ret <8 x i16> %3

	4870

	4871 define <8 x i16> @urem_binop_8xi16(<8 x i16>, <8 x i16>) {

	4872 %3 = urem <8 x i16> %0, %1

	4873 ret <8 x i16> %3

	4874 }

	4875 ; CHECK-LABEL: define <8 x i16> @urem_binop_8xi16(<8 x i16>, <8 x i16>)

	4876 ; CHECK-NEXT: %3 = urem <8 x i16> %0, %1

	4877 ; CHECK-NEXT: ret <8 x i16> %3

	4878

	4879 define <8 x i16> @srem_binop_8xi16(<8 x i16>, <8 x i16>) {

	4880 %3 = srem <8 x i16> %0, %1

	4881 ret <8 x i16> %3

	4882 }

	4883 ; CHECK-LABEL: define <8 x i16> @srem_binop_8xi16(<8 x i16>, <8 x i16>)

	4884 ; CHECK-NEXT: %3 = srem <8 x i16> %0, %1

	4885 ; CHECK-NEXT: ret <8 x i16> %3

	4886

	4887 define <8 x i32> @add_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {

	4888 %3 = add nuw <8 x i32> %0, %1

	4889 ret <8 x i32> %3

	4890 }

	4891 ; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4892 ; CHECK-NEXT: %6 = add nuw <4 x i32> %1, %3

	4893 ; CHECK-NEXT: %7 = add nuw <4 x i32> %2, %4

	4894 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4895 ; CHECK-NEXT: ret <4 x i32> %6

	4896

	4897 define <8 x i32> @add_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {

	4898 %3 = add nsw <8 x i32> %0, %1

	4899 ret <8 x i32> %3

	4900 }

	4901 ; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4902 ; CHECK-NEXT: %6 = add nsw <4 x i32> %1, %3

	4903 ; CHECK-NEXT: %7 = add nsw <4 x i32> %2, %4

	4904 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4905 ; CHECK-NEXT: ret <4 x i32> %6

	4906

	4907 define <8 x i32> @add_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {

	4908 %3 = add nuw nsw <8 x i32> %0, %1

	4909 ret <8 x i32> %3

	4910 }

	4911 ; CHECK-LABEL: define <4 x i32> @add_binop_8xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4912 ; CHECK-NEXT: %6 = add nuw nsw <4 x i32> %1, %3

	4913 ; CHECK-NEXT: %7 = add nuw nsw <4 x i32> %2, %4

	4914 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4915 ; CHECK-NEXT: ret <4 x i32> %6

	4916

	4917 define <8 x i32> @sub_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {

	4918 %3 = sub nuw <8 x i32> %0, %1

	4919 ret <8 x i32> %3

	4920 }

	4921 ; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4922 ; CHECK-NEXT: %6 = sub nuw <4 x i32> %1, %3

	4923 ; CHECK-NEXT: %7 = sub nuw <4 x i32> %2, %4

	4924 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4925 ; CHECK-NEXT: ret <4 x i32> %6

	4926

	4927 define <8 x i32> @sub_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {

	4928 %3 = sub nsw <8 x i32> %0, %1

	4929 ret <8 x i32> %3

	4930 }

	4931 ; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4932 ; CHECK-NEXT: %6 = sub nsw <4 x i32> %1, %3

	4933 ; CHECK-NEXT: %7 = sub nsw <4 x i32> %2, %4

	4934 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4935 ; CHECK-NEXT: ret <4 x i32> %6

	4936

	4937 define <8 x i32> @sub_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {

	4938 %3 = sub nuw nsw <8 x i32> %0, %1

	4939 ret <8 x i32> %3

	4940 }

	4941 ; CHECK-LABEL: define <4 x i32> @sub_binop_8xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4942 ; CHECK-NEXT: %6 = sub nuw nsw <4 x i32> %1, %3

	4943 ; CHECK-NEXT: %7 = sub nuw nsw <4 x i32> %2, %4

	4944 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4945 ; CHECK-NEXT: ret <4 x i32> %6

	4946

	4947 define <8 x i32> @mul_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {

	4948 %3 = mul nuw <8 x i32> %0, %1

	4949 ret <8 x i32> %3

	4950 }

	4951 ; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4952 ; CHECK-NEXT: %6 = mul nuw <4 x i32> %1, %3

	4953 ; CHECK-NEXT: %7 = mul nuw <4 x i32> %2, %4

	4954 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4955 ; CHECK-NEXT: ret <4 x i32> %6

	4956

	4957 define <8 x i32> @mul_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {

	4958 %3 = mul nsw <8 x i32> %0, %1

	4959 ret <8 x i32> %3

	4960 }

	4961 ; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4962 ; CHECK-NEXT: %6 = mul nsw <4 x i32> %1, %3

	4963 ; CHECK-NEXT: %7 = mul nsw <4 x i32> %2, %4

	4964 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4965 ; CHECK-NEXT: ret <4 x i32> %6

	4966

	4967 define <8 x i32> @mul_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {

	4968 %3 = mul nuw nsw <8 x i32> %0, %1

	4969 ret <8 x i32> %3

	4970 }

	4971 ; CHECK-LABEL: define <4 x i32> @mul_binop_8xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4972 ; CHECK-NEXT: %6 = mul nuw nsw <4 x i32> %1, %3

	4973 ; CHECK-NEXT: %7 = mul nuw nsw <4 x i32> %2, %4

	4974 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4975 ; CHECK-NEXT: ret <4 x i32> %6

	4976

	4977 define <8 x i32> @shl_binop_8xi32_nuw(<8 x i32>, <8 x i32>) {

	4978 %3 = shl nuw <8 x i32> %0, %1

	4979 ret <8 x i32> %3

	4980 }

	4981 ; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nuw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4982 ; CHECK-NEXT: %6 = shl nuw <4 x i32> %1, %3

	4983 ; CHECK-NEXT: %7 = shl nuw <4 x i32> %2, %4

	4984 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4985 ; CHECK-NEXT: ret <4 x i32> %6

	4986

	4987 define <8 x i32> @shl_binop_8xi32_nsw(<8 x i32>, <8 x i32>) {

	4988 %3 = shl nsw <8 x i32> %0, %1

	4989 ret <8 x i32> %3

	4990 }

	4991 ; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nsw(<4 x i32>* nocapture nonnul l dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	4992 ; CHECK-NEXT: %6 = shl nsw <4 x i32> %1, %3

	4993 ; CHECK-NEXT: %7 = shl nsw <4 x i32> %2, %4

	4994 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	4995 ; CHECK-NEXT: ret <4 x i32> %6

	4996

	4997 define <8 x i32> @shl_binop_8xi32_nuw_nsw(<8 x i32>, <8 x i32>) {

	4998 %3 = shl nuw nsw <8 x i32> %0, %1

	4999 ret <8 x i32> %3

	5000 }

	5001 ; CHECK-LABEL: define <4 x i32> @shl_binop_8xi32_nuw_nsw(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5002 ; CHECK-NEXT: %6 = shl nuw nsw <4 x i32> %1, %3

	5003 ; CHECK-NEXT: %7 = shl nuw nsw <4 x i32> %2, %4

	5004 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5005 ; CHECK-NEXT: ret <4 x i32> %6

	5006

	5007 define <8 x i32> @udiv_binop_8xi32(<8 x i32>, <8 x i32>) {

	5008 %3 = udiv <8 x i32> %0, %1

	5009 ret <8 x i32> %3

	5010 }

	5011 ; CHECK-LABEL: define <4 x i32> @udiv_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5012 ; CHECK-NEXT: %6 = udiv <4 x i32> %1, %3

	5013 ; CHECK-NEXT: %7 = udiv <4 x i32> %2, %4

	5014 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5015 ; CHECK-NEXT: ret <4 x i32> %6

	5016

	5017 define <8 x i32> @udiv_binop_8xi32_exact(<8 x i32>, <8 x i32>) {

	5018 %3 = udiv exact <8 x i32> %0, %1

	5019 ret <8 x i32> %3

	5020 }

	5021 ; CHECK-LABEL: define <4 x i32> @udiv_binop_8xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5022 ; CHECK-NEXT: %6 = udiv exact <4 x i32> %1, %3

	5023 ; CHECK-NEXT: %7 = udiv exact <4 x i32> %2, %4

	5024 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5025 ; CHECK-NEXT: ret <4 x i32> %6

	5026

	5027 define <8 x i32> @sdiv_binop_8xi32(<8 x i32>, <8 x i32>) {

	5028 %3 = sdiv <8 x i32> %0, %1

	5029 ret <8 x i32> %3

	5030 }

	5031 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5032 ; CHECK-NEXT: %6 = sdiv <4 x i32> %1, %3

	5033 ; CHECK-NEXT: %7 = sdiv <4 x i32> %2, %4

	5034 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5035 ; CHECK-NEXT: ret <4 x i32> %6

	5036

	5037 define <8 x i32> @sdiv_binop_8xi32_exact(<8 x i32>, <8 x i32>) {

	5038 %3 = sdiv exact <8 x i32> %0, %1

	5039 ret <8 x i32> %3

	5040 }

	5041 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_8xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5042 ; CHECK-NEXT: %6 = sdiv exact <4 x i32> %1, %3

	5043 ; CHECK-NEXT: %7 = sdiv exact <4 x i32> %2, %4

	5044 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5045 ; CHECK-NEXT: ret <4 x i32> %6

	5046

	5047 define <8 x i32> @lshr_binop_8xi32(<8 x i32>, <8 x i32>) {

	5048 %3 = lshr <8 x i32> %0, %1

	5049 ret <8 x i32> %3

	5050 }

	5051 ; CHECK-LABEL: define <4 x i32> @lshr_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5052 ; CHECK-NEXT: %6 = lshr <4 x i32> %1, %3

	5053 ; CHECK-NEXT: %7 = lshr <4 x i32> %2, %4

	5054 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5055 ; CHECK-NEXT: ret <4 x i32> %6

	5056

	5057 define <8 x i32> @lshr_binop_8xi32_exact(<8 x i32>, <8 x i32>) {

	5058 %3 = lshr exact <8 x i32> %0, %1

	5059 ret <8 x i32> %3

	5060 }

	5061 ; CHECK-LABEL: define <4 x i32> @lshr_binop_8xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5062 ; CHECK-NEXT: %6 = lshr exact <4 x i32> %1, %3

	5063 ; CHECK-NEXT: %7 = lshr exact <4 x i32> %2, %4

	5064 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5065 ; CHECK-NEXT: ret <4 x i32> %6

	5066

	5067 define <8 x i32> @ashr_binop_8xi32(<8 x i32>, <8 x i32>) {

	5068 %3 = ashr <8 x i32> %0, %1

	5069 ret <8 x i32> %3

	5070 }

	5071 ; CHECK-LABEL: define <4 x i32> @ashr_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5072 ; CHECK-NEXT: %6 = ashr <4 x i32> %1, %3

	5073 ; CHECK-NEXT: %7 = ashr <4 x i32> %2, %4

	5074 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5075 ; CHECK-NEXT: ret <4 x i32> %6

	5076

	5077 define <8 x i32> @ashr_binop_8xi32_exact(<8 x i32>, <8 x i32>) {

	5078 %3 = ashr exact <8 x i32> %0, %1

	5079 ret <8 x i32> %3

	5080 }

	5081 ; CHECK-LABEL: define <4 x i32> @ashr_binop_8xi32_exact(<4 x i32>* nocapture non null dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5082 ; CHECK-NEXT: %6 = ashr exact <4 x i32> %1, %3

	5083 ; CHECK-NEXT: %7 = ashr exact <4 x i32> %2, %4

	5084 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5085 ; CHECK-NEXT: ret <4 x i32> %6

	5086

	5087 define <8 x i32> @and_binop_8xi32(<8 x i32>, <8 x i32>) {

	5088 %3 = and <8 x i32> %0, %1

	5089 ret <8 x i32> %3

	5090 }

	5091 ; CHECK-LABEL: define <4 x i32> @and_binop_8xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5092 ; CHECK-NEXT: %6 = and <4 x i32> %1, %3

	5093 ; CHECK-NEXT: %7 = and <4 x i32> %2, %4

	5094 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5095 ; CHECK-NEXT: ret <4 x i32> %6

	5096

	5097 define <8 x i32> @xor_binop_8xi32(<8 x i32>, <8 x i32>) {

	5098 %3 = xor <8 x i32> %0, %1

	5099 ret <8 x i32> %3

	5100 }

	5101 ; CHECK-LABEL: define <4 x i32> @xor_binop_8xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5102 ; CHECK-NEXT: %6 = xor <4 x i32> %1, %3

	5103 ; CHECK-NEXT: %7 = xor <4 x i32> %2, %4

	5104 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5105 ; CHECK-NEXT: ret <4 x i32> %6

	5106

	5107 define <8 x i32> @or_binop_8xi32(<8 x i32>, <8 x i32>) {

	5108 %3 = or <8 x i32> %0, %1

	5109 ret <8 x i32> %3

	5110 }

	5111 ; CHECK-LABEL: define <4 x i32> @or_binop_8xi32(<4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5112 ; CHECK-NEXT: %6 = or <4 x i32> %1, %3

	5113 ; CHECK-NEXT: %7 = or <4 x i32> %2, %4

	5114 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5115 ; CHECK-NEXT: ret <4 x i32> %6

	5116

	5117 define <8 x i32> @urem_binop_8xi32(<8 x i32>, <8 x i32>) {

	5118 %3 = urem <8 x i32> %0, %1

	5119 ret <8 x i32> %3

	5120 }

	5121 ; CHECK-LABEL: define <4 x i32> @urem_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5122 ; CHECK-NEXT: %6 = urem <4 x i32> %1, %3

	5123 ; CHECK-NEXT: %7 = urem <4 x i32> %2, %4

	5124 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5125 ; CHECK-NEXT: ret <4 x i32> %6

	5126

	5127 define <8 x i32> @srem_binop_8xi32(<8 x i32>, <8 x i32>) {

	5128 %3 = srem <8 x i32> %0, %1

	5129 ret <8 x i32> %3

	5130 }

	5131 ; CHECK-LABEL: define <4 x i32> @srem_binop_8xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5132 ; CHECK-NEXT: %6 = srem <4 x i32> %1, %3

	5133 ; CHECK-NEXT: %7 = srem <4 x i32> %2, %4

	5134 ; CHECK-NEXT: store <4 x i32> %7, <4 x i32>* %0, align 16

	5135 ; CHECK-NEXT: ret <4 x i32> %6

	5136

	5137 define <8 x i64> @add_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {

	5138 %3 = add nuw <8 x i64> %0, %1

	5139 ret <8 x i64> %3

	5140 }

	5141 ; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5142 ; CHECK-NEXT: %12 = add nuw <2 x i64> %3, %7

	5143 ; CHECK-NEXT: %13 = add nuw <2 x i64> %4, %8

	5144 ; CHECK-NEXT: %14 = add nuw <2 x i64> %5, %9

	5145 ; CHECK-NEXT: %15 = add nuw <2 x i64> %6, %10

	5146 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5147 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5148 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5149 ; CHECK-NEXT: ret <2 x i64> %12

	5150

	5151 define <8 x i64> @add_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {

	5152 %3 = add nsw <8 x i64> %0, %1

	5153 ret <8 x i64> %3

	5154 }

	5155 ; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5156 ; CHECK-NEXT: %12 = add nsw <2 x i64> %3, %7

	5157 ; CHECK-NEXT: %13 = add nsw <2 x i64> %4, %8

	5158 ; CHECK-NEXT: %14 = add nsw <2 x i64> %5, %9

	5159 ; CHECK-NEXT: %15 = add nsw <2 x i64> %6, %10

	5160 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5161 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5162 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5163 ; CHECK-NEXT: ret <2 x i64> %12

	5164

	5165 define <8 x i64> @add_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {

	5166 %3 = add nuw nsw <8 x i64> %0, %1

	5167 ret <8 x i64> %3

	5168 }

	5169 ; CHECK-LABEL: define <2 x i64> @add_binop_8xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5170 ; CHECK-NEXT: %12 = add nuw nsw <2 x i64> %3, %7

	5171 ; CHECK-NEXT: %13 = add nuw nsw <2 x i64> %4, %8

	5172 ; CHECK-NEXT: %14 = add nuw nsw <2 x i64> %5, %9

	5173 ; CHECK-NEXT: %15 = add nuw nsw <2 x i64> %6, %10

	5174 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5175 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5176 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5177 ; CHECK-NEXT: ret <2 x i64> %12

	5178

	5179 define <8 x i64> @sub_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {

	5180 %3 = sub nuw <8 x i64> %0, %1

	5181 ret <8 x i64> %3

	5182 }

	5183 ; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5184 ; CHECK-NEXT: %12 = sub nuw <2 x i64> %3, %7

	5185 ; CHECK-NEXT: %13 = sub nuw <2 x i64> %4, %8

	5186 ; CHECK-NEXT: %14 = sub nuw <2 x i64> %5, %9

	5187 ; CHECK-NEXT: %15 = sub nuw <2 x i64> %6, %10

	5188 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5189 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5190 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5191 ; CHECK-NEXT: ret <2 x i64> %12

	5192

	5193 define <8 x i64> @sub_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {

	5194 %3 = sub nsw <8 x i64> %0, %1

	5195 ret <8 x i64> %3

	5196 }

	5197 ; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5198 ; CHECK-NEXT: %12 = sub nsw <2 x i64> %3, %7

	5199 ; CHECK-NEXT: %13 = sub nsw <2 x i64> %4, %8

	5200 ; CHECK-NEXT: %14 = sub nsw <2 x i64> %5, %9

	5201 ; CHECK-NEXT: %15 = sub nsw <2 x i64> %6, %10

	5202 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5203 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5204 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5205 ; CHECK-NEXT: ret <2 x i64> %12

	5206

	5207 define <8 x i64> @sub_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {

	5208 %3 = sub nuw nsw <8 x i64> %0, %1

	5209 ret <8 x i64> %3

	5210 }

	5211 ; CHECK-LABEL: define <2 x i64> @sub_binop_8xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5212 ; CHECK-NEXT: %12 = sub nuw nsw <2 x i64> %3, %7

	5213 ; CHECK-NEXT: %13 = sub nuw nsw <2 x i64> %4, %8

	5214 ; CHECK-NEXT: %14 = sub nuw nsw <2 x i64> %5, %9

	5215 ; CHECK-NEXT: %15 = sub nuw nsw <2 x i64> %6, %10

	5216 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5217 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5218 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5219 ; CHECK-NEXT: ret <2 x i64> %12

	5220

	5221 define <8 x i64> @mul_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {

	5222 %3 = mul nuw <8 x i64> %0, %1

	5223 ret <8 x i64> %3

	5224 }

	5225 ; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5226 ; CHECK-NEXT: %12 = mul nuw <2 x i64> %3, %7

	5227 ; CHECK-NEXT: %13 = mul nuw <2 x i64> %4, %8

	5228 ; CHECK-NEXT: %14 = mul nuw <2 x i64> %5, %9

	5229 ; CHECK-NEXT: %15 = mul nuw <2 x i64> %6, %10

	5230 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5231 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5232 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5233 ; CHECK-NEXT: ret <2 x i64> %12

	5234

	5235 define <8 x i64> @mul_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {

	5236 %3 = mul nsw <8 x i64> %0, %1

	5237 ret <8 x i64> %3

	5238 }

	5239 ; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5240 ; CHECK-NEXT: %12 = mul nsw <2 x i64> %3, %7

	5241 ; CHECK-NEXT: %13 = mul nsw <2 x i64> %4, %8

	5242 ; CHECK-NEXT: %14 = mul nsw <2 x i64> %5, %9

	5243 ; CHECK-NEXT: %15 = mul nsw <2 x i64> %6, %10

	5244 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5245 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5246 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5247 ; CHECK-NEXT: ret <2 x i64> %12

	5248

	5249 define <8 x i64> @mul_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {

	5250 %3 = mul nuw nsw <8 x i64> %0, %1

	5251 ret <8 x i64> %3

	5252 }

	5253 ; CHECK-LABEL: define <2 x i64> @mul_binop_8xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5254 ; CHECK-NEXT: %12 = mul nuw nsw <2 x i64> %3, %7

	5255 ; CHECK-NEXT: %13 = mul nuw nsw <2 x i64> %4, %8

	5256 ; CHECK-NEXT: %14 = mul nuw nsw <2 x i64> %5, %9

	5257 ; CHECK-NEXT: %15 = mul nuw nsw <2 x i64> %6, %10

	5258 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5259 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5260 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5261 ; CHECK-NEXT: ret <2 x i64> %12

	5262

	5263 define <8 x i64> @shl_binop_8xi64_nuw(<8 x i64>, <8 x i64>) {

	5264 %3 = shl nuw <8 x i64> %0, %1

	5265 ret <8 x i64> %3

	5266 }

	5267 ; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nuw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5268 ; CHECK-NEXT: %12 = shl nuw <2 x i64> %3, %7

	5269 ; CHECK-NEXT: %13 = shl nuw <2 x i64> %4, %8

	5270 ; CHECK-NEXT: %14 = shl nuw <2 x i64> %5, %9

	5271 ; CHECK-NEXT: %15 = shl nuw <2 x i64> %6, %10

	5272 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5273 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5274 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5275 ; CHECK-NEXT: ret <2 x i64> %12

	5276

	5277 define <8 x i64> @shl_binop_8xi64_nsw(<8 x i64>, <8 x i64>) {

	5278 %3 = shl nsw <8 x i64> %0, %1

	5279 ret <8 x i64> %3

	5280 }

	5281 ; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nsw(<2 x i64>* nocapture nonnul l dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i6 4>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5282 ; CHECK-NEXT: %12 = shl nsw <2 x i64> %3, %7

	5283 ; CHECK-NEXT: %13 = shl nsw <2 x i64> %4, %8

	5284 ; CHECK-NEXT: %14 = shl nsw <2 x i64> %5, %9

	5285 ; CHECK-NEXT: %15 = shl nsw <2 x i64> %6, %10

	5286 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5287 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5288 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5289 ; CHECK-NEXT: ret <2 x i64> %12

	5290

	5291 define <8 x i64> @shl_binop_8xi64_nuw_nsw(<8 x i64>, <8 x i64>) {

	5292 %3 = shl nuw nsw <8 x i64> %0, %1

	5293 ret <8 x i64> %3

	5294 }

	5295 ; CHECK-LABEL: define <2 x i64> @shl_binop_8xi64_nuw_nsw(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5296 ; CHECK-NEXT: %12 = shl nuw nsw <2 x i64> %3, %7

	5297 ; CHECK-NEXT: %13 = shl nuw nsw <2 x i64> %4, %8

	5298 ; CHECK-NEXT: %14 = shl nuw nsw <2 x i64> %5, %9

	5299 ; CHECK-NEXT: %15 = shl nuw nsw <2 x i64> %6, %10

	5300 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5301 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5302 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5303 ; CHECK-NEXT: ret <2 x i64> %12

	5304

	5305 define <8 x i64> @udiv_binop_8xi64(<8 x i64>, <8 x i64>) {

	5306 %3 = udiv <8 x i64> %0, %1

	5307 ret <8 x i64> %3

	5308 }

	5309 ; CHECK-LABEL: define <2 x i64> @udiv_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5310 ; CHECK-NEXT: %12 = udiv <2 x i64> %3, %7

	5311 ; CHECK-NEXT: %13 = udiv <2 x i64> %4, %8

	5312 ; CHECK-NEXT: %14 = udiv <2 x i64> %5, %9

	5313 ; CHECK-NEXT: %15 = udiv <2 x i64> %6, %10

	5314 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5315 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5316 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5317 ; CHECK-NEXT: ret <2 x i64> %12

	5318

	5319 define <8 x i64> @udiv_binop_8xi64_exact(<8 x i64>, <8 x i64>) {

	5320 %3 = udiv exact <8 x i64> %0, %1

	5321 ret <8 x i64> %3

	5322 }

	5323 ; CHECK-LABEL: define <2 x i64> @udiv_binop_8xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5324 ; CHECK-NEXT: %12 = udiv exact <2 x i64> %3, %7

	5325 ; CHECK-NEXT: %13 = udiv exact <2 x i64> %4, %8

	5326 ; CHECK-NEXT: %14 = udiv exact <2 x i64> %5, %9

	5327 ; CHECK-NEXT: %15 = udiv exact <2 x i64> %6, %10

	5328 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5329 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5330 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5331 ; CHECK-NEXT: ret <2 x i64> %12

	5332

	5333 define <8 x i64> @sdiv_binop_8xi64(<8 x i64>, <8 x i64>) {

	5334 %3 = sdiv <8 x i64> %0, %1

	5335 ret <8 x i64> %3

	5336 }

	5337 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5338 ; CHECK-NEXT: %12 = sdiv <2 x i64> %3, %7

	5339 ; CHECK-NEXT: %13 = sdiv <2 x i64> %4, %8

	5340 ; CHECK-NEXT: %14 = sdiv <2 x i64> %5, %9

	5341 ; CHECK-NEXT: %15 = sdiv <2 x i64> %6, %10

	5342 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5343 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5344 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5345 ; CHECK-NEXT: ret <2 x i64> %12

	5346

	5347 define <8 x i64> @sdiv_binop_8xi64_exact(<8 x i64>, <8 x i64>) {

	5348 %3 = sdiv exact <8 x i64> %0, %1

	5349 ret <8 x i64> %3

	5350 }

	5351 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_8xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5352 ; CHECK-NEXT: %12 = sdiv exact <2 x i64> %3, %7

	5353 ; CHECK-NEXT: %13 = sdiv exact <2 x i64> %4, %8

	5354 ; CHECK-NEXT: %14 = sdiv exact <2 x i64> %5, %9

	5355 ; CHECK-NEXT: %15 = sdiv exact <2 x i64> %6, %10

	5356 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5357 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5358 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5359 ; CHECK-NEXT: ret <2 x i64> %12

	5360

	5361 define <8 x i64> @lshr_binop_8xi64(<8 x i64>, <8 x i64>) {

	5362 %3 = lshr <8 x i64> %0, %1

	5363 ret <8 x i64> %3

	5364 }

	5365 ; CHECK-LABEL: define <2 x i64> @lshr_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5366 ; CHECK-NEXT: %12 = lshr <2 x i64> %3, %7

	5367 ; CHECK-NEXT: %13 = lshr <2 x i64> %4, %8

	5368 ; CHECK-NEXT: %14 = lshr <2 x i64> %5, %9

	5369 ; CHECK-NEXT: %15 = lshr <2 x i64> %6, %10

	5370 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5371 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5372 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5373 ; CHECK-NEXT: ret <2 x i64> %12

	5374

	5375 define <8 x i64> @lshr_binop_8xi64_exact(<8 x i64>, <8 x i64>) {

	5376 %3 = lshr exact <8 x i64> %0, %1

	5377 ret <8 x i64> %3

	5378 }

	5379 ; CHECK-LABEL: define <2 x i64> @lshr_binop_8xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5380 ; CHECK-NEXT: %12 = lshr exact <2 x i64> %3, %7

	5381 ; CHECK-NEXT: %13 = lshr exact <2 x i64> %4, %8

	5382 ; CHECK-NEXT: %14 = lshr exact <2 x i64> %5, %9

	5383 ; CHECK-NEXT: %15 = lshr exact <2 x i64> %6, %10

	5384 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5385 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5386 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5387 ; CHECK-NEXT: ret <2 x i64> %12

	5388

	5389 define <8 x i64> @ashr_binop_8xi64(<8 x i64>, <8 x i64>) {

	5390 %3 = ashr <8 x i64> %0, %1

	5391 ret <8 x i64> %3

	5392 }

	5393 ; CHECK-LABEL: define <2 x i64> @ashr_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5394 ; CHECK-NEXT: %12 = ashr <2 x i64> %3, %7

	5395 ; CHECK-NEXT: %13 = ashr <2 x i64> %4, %8

	5396 ; CHECK-NEXT: %14 = ashr <2 x i64> %5, %9

	5397 ; CHECK-NEXT: %15 = ashr <2 x i64> %6, %10

	5398 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5399 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5400 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5401 ; CHECK-NEXT: ret <2 x i64> %12

	5402

	5403 define <8 x i64> @ashr_binop_8xi64_exact(<8 x i64>, <8 x i64>) {

	5404 %3 = ashr exact <8 x i64> %0, %1

	5405 ret <8 x i64> %3

	5406 }

	5407 ; CHECK-LABEL: define <2 x i64> @ashr_binop_8xi64_exact(<2 x i64>* nocapture non null dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5408 ; CHECK-NEXT: %12 = ashr exact <2 x i64> %3, %7

	5409 ; CHECK-NEXT: %13 = ashr exact <2 x i64> %4, %8

	5410 ; CHECK-NEXT: %14 = ashr exact <2 x i64> %5, %9

	5411 ; CHECK-NEXT: %15 = ashr exact <2 x i64> %6, %10

	5412 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5413 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5414 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5415 ; CHECK-NEXT: ret <2 x i64> %12

	5416

	5417 define <8 x i64> @and_binop_8xi64(<8 x i64>, <8 x i64>) {

	5418 %3 = and <8 x i64> %0, %1

	5419 ret <8 x i64> %3

	5420 }

	5421 ; CHECK-LABEL: define <2 x i64> @and_binop_8xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5422 ; CHECK-NEXT: %12 = and <2 x i64> %3, %7

	5423 ; CHECK-NEXT: %13 = and <2 x i64> %4, %8

	5424 ; CHECK-NEXT: %14 = and <2 x i64> %5, %9

	5425 ; CHECK-NEXT: %15 = and <2 x i64> %6, %10

	5426 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5427 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5428 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5429 ; CHECK-NEXT: ret <2 x i64> %12

	5430

	5431 define <8 x i64> @xor_binop_8xi64(<8 x i64>, <8 x i64>) {

	5432 %3 = xor <8 x i64> %0, %1

	5433 ret <8 x i64> %3

	5434 }

	5435 ; CHECK-LABEL: define <2 x i64> @xor_binop_8xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5436 ; CHECK-NEXT: %12 = xor <2 x i64> %3, %7

	5437 ; CHECK-NEXT: %13 = xor <2 x i64> %4, %8

	5438 ; CHECK-NEXT: %14 = xor <2 x i64> %5, %9

	5439 ; CHECK-NEXT: %15 = xor <2 x i64> %6, %10

	5440 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5441 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5442 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5443 ; CHECK-NEXT: ret <2 x i64> %12

	5444

	5445 define <8 x i64> @or_binop_8xi64(<8 x i64>, <8 x i64>) {

	5446 %3 = or <8 x i64> %0, %1

	5447 ret <8 x i64> %3

	5448 }

	5449 ; CHECK-LABEL: define <2 x i64> @or_binop_8xi64(<2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5450 ; CHECK-NEXT: %12 = or <2 x i64> %3, %7

	5451 ; CHECK-NEXT: %13 = or <2 x i64> %4, %8

	5452 ; CHECK-NEXT: %14 = or <2 x i64> %5, %9

	5453 ; CHECK-NEXT: %15 = or <2 x i64> %6, %10

	5454 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5455 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5456 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5457 ; CHECK-NEXT: ret <2 x i64> %12

	5458

	5459 define <8 x i64> @urem_binop_8xi64(<8 x i64>, <8 x i64>) {

	5460 %3 = urem <8 x i64> %0, %1

	5461 ret <8 x i64> %3

	5462 }

	5463 ; CHECK-LABEL: define <2 x i64> @urem_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5464 ; CHECK-NEXT: %12 = urem <2 x i64> %3, %7

	5465 ; CHECK-NEXT: %13 = urem <2 x i64> %4, %8

	5466 ; CHECK-NEXT: %14 = urem <2 x i64> %5, %9

	5467 ; CHECK-NEXT: %15 = urem <2 x i64> %6, %10

	5468 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5469 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5470 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5471 ; CHECK-NEXT: ret <2 x i64> %12

	5472

	5473 define <8 x i64> @srem_binop_8xi64(<8 x i64>, <8 x i64>) {

	5474 %3 = srem <8 x i64> %0, %1

	5475 ret <8 x i64> %3

	5476 }

	5477 ; CHECK-LABEL: define <2 x i64> @srem_binop_8xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	5478 ; CHECK-NEXT: %12 = srem <2 x i64> %3, %7

	5479 ; CHECK-NEXT: %13 = srem <2 x i64> %4, %8

	5480 ; CHECK-NEXT: %14 = srem <2 x i64> %5, %9

	5481 ; CHECK-NEXT: %15 = srem <2 x i64> %6, %10

	5482 ; CHECK-NEXT: store <2 x i64> %13, <2 x i64>* %0, align 16

	5483 ; CHECK-NEXT: store <2 x i64> %14, <2 x i64>* %1, align 16

	5484 ; CHECK-NEXT: store <2 x i64> %15, <2 x i64>* %2, align 16

	5485 ; CHECK-NEXT: ret <2 x i64> %12

	5486

	5487 define <12 x i8> @add_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {

	5488 %3 = add nuw <12 x i8> %0, %1

	5489 ret <12 x i8> %3

	5490 }

	5491 ; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nuw(<16 x i8>, <16 x i8>)

	5492 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	5493 ; CHECK-NEXT: ret <16 x i8> %3

	5494

	5495 define <12 x i8> @add_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {

	5496 %3 = add nsw <12 x i8> %0, %1

	5497 ret <12 x i8> %3

	5498 }

	5499 ; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nsw(<16 x i8>, <16 x i8>)

	5500 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	5501 ; CHECK-NEXT: ret <16 x i8> %3

	5502

	5503 define <12 x i8> @add_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {

	5504 %3 = add nuw nsw <12 x i8> %0, %1

	5505 ret <12 x i8> %3

	5506 }

	5507 ; CHECK-LABEL: define <16 x i8> @add_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	5508 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	5509 ; CHECK-NEXT: ret <16 x i8> %3

	5510

	5511 define <12 x i8> @sub_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {

	5512 %3 = sub nuw <12 x i8> %0, %1

	5513 ret <12 x i8> %3

	5514 }

	5515 ; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nuw(<16 x i8>, <16 x i8>)

	5516 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	5517 ; CHECK-NEXT: ret <16 x i8> %3

	5518

	5519 define <12 x i8> @sub_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {

	5520 %3 = sub nsw <12 x i8> %0, %1

	5521 ret <12 x i8> %3

	5522 }

	5523 ; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nsw(<16 x i8>, <16 x i8>)

	5524 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	5525 ; CHECK-NEXT: ret <16 x i8> %3

	5526

	5527 define <12 x i8> @sub_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {

	5528 %3 = sub nuw nsw <12 x i8> %0, %1

	5529 ret <12 x i8> %3

	5530 }

	5531 ; CHECK-LABEL: define <16 x i8> @sub_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	5532 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	5533 ; CHECK-NEXT: ret <16 x i8> %3

	5534

	5535 define <12 x i8> @mul_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {

	5536 %3 = mul nuw <12 x i8> %0, %1

	5537 ret <12 x i8> %3

	5538 }

	5539 ; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nuw(<16 x i8>, <16 x i8>)

	5540 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	5541 ; CHECK-NEXT: ret <16 x i8> %3

	5542

	5543 define <12 x i8> @mul_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {

	5544 %3 = mul nsw <12 x i8> %0, %1

	5545 ret <12 x i8> %3

	5546 }

	5547 ; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nsw(<16 x i8>, <16 x i8>)

	5548 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	5549 ; CHECK-NEXT: ret <16 x i8> %3

	5550

	5551 define <12 x i8> @mul_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {

	5552 %3 = mul nuw nsw <12 x i8> %0, %1

	5553 ret <12 x i8> %3

	5554 }

	5555 ; CHECK-LABEL: define <16 x i8> @mul_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	5556 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	5557 ; CHECK-NEXT: ret <16 x i8> %3

	5558

	5559 define <12 x i8> @shl_binop_12xi8_nuw(<12 x i8>, <12 x i8>) {

	5560 %3 = shl nuw <12 x i8> %0, %1

	5561 ret <12 x i8> %3

	5562 }

	5563 ; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nuw(<16 x i8>, <16 x i8>)

	5564 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	5565 ; CHECK-NEXT: ret <16 x i8> %3

	5566

	5567 define <12 x i8> @shl_binop_12xi8_nsw(<12 x i8>, <12 x i8>) {

	5568 %3 = shl nsw <12 x i8> %0, %1

	5569 ret <12 x i8> %3

	5570 }

	5571 ; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nsw(<16 x i8>, <16 x i8>)

	5572 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	5573 ; CHECK-NEXT: ret <16 x i8> %3

	5574

	5575 define <12 x i8> @shl_binop_12xi8_nuw_nsw(<12 x i8>, <12 x i8>) {

	5576 %3 = shl nuw nsw <12 x i8> %0, %1

	5577 ret <12 x i8> %3

	5578 }

	5579 ; CHECK-LABEL: define <16 x i8> @shl_binop_12xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	5580 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	5581 ; CHECK-NEXT: ret <16 x i8> %3

	5582

	5583 define <12 x i8> @udiv_binop_12xi8(<12 x i8>, <12 x i8>) {

	5584 %3 = udiv <12 x i8> %0, %1

	5585 ret <12 x i8> %3

	5586 }

	5587 ; CHECK-LABEL: define <16 x i8> @udiv_binop_12xi8(<16 x i8>, <16 x i8>)

	5588 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	5589 ; CHECK-NEXT: ret <16 x i8> %3

	5590

	5591 define <12 x i8> @udiv_binop_12xi8_exact(<12 x i8>, <12 x i8>) {

	5592 %3 = udiv exact <12 x i8> %0, %1

	5593 ret <12 x i8> %3

	5594 }

	5595 ; CHECK-LABEL: define <16 x i8> @udiv_binop_12xi8_exact(<16 x i8>, <16 x i8>)

	5596 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	5597 ; CHECK-NEXT: ret <16 x i8> %3

	5598

	5599 define <12 x i8> @sdiv_binop_12xi8(<12 x i8>, <12 x i8>) {

	5600 %3 = sdiv <12 x i8> %0, %1

	5601 ret <12 x i8> %3

	5602 }

	5603 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_12xi8(<16 x i8>, <16 x i8>)

	5604 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	5605 ; CHECK-NEXT: ret <16 x i8> %3

	5606

	5607 define <12 x i8> @sdiv_binop_12xi8_exact(<12 x i8>, <12 x i8>) {

	5608 %3 = sdiv exact <12 x i8> %0, %1

	5609 ret <12 x i8> %3

	5610 }

	5611 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_12xi8_exact(<16 x i8>, <16 x i8>)

	5612 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	5613 ; CHECK-NEXT: ret <16 x i8> %3

	5614

	5615 define <12 x i8> @lshr_binop_12xi8(<12 x i8>, <12 x i8>) {

	5616 %3 = lshr <12 x i8> %0, %1

	5617 ret <12 x i8> %3

	5618 }

	5619 ; CHECK-LABEL: define <16 x i8> @lshr_binop_12xi8(<16 x i8>, <16 x i8>)

	5620 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	5621 ; CHECK-NEXT: ret <16 x i8> %3

	5622

	5623 define <12 x i8> @lshr_binop_12xi8_exact(<12 x i8>, <12 x i8>) {

	5624 %3 = lshr exact <12 x i8> %0, %1

	5625 ret <12 x i8> %3

	5626 }

	5627 ; CHECK-LABEL: define <16 x i8> @lshr_binop_12xi8_exact(<16 x i8>, <16 x i8>)

	5628 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	5629 ; CHECK-NEXT: ret <16 x i8> %3

	5630

	5631 define <12 x i8> @ashr_binop_12xi8(<12 x i8>, <12 x i8>) {

	5632 %3 = ashr <12 x i8> %0, %1

	5633 ret <12 x i8> %3

	5634 }

	5635 ; CHECK-LABEL: define <16 x i8> @ashr_binop_12xi8(<16 x i8>, <16 x i8>)

	5636 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	5637 ; CHECK-NEXT: ret <16 x i8> %3

	5638

	5639 define <12 x i8> @ashr_binop_12xi8_exact(<12 x i8>, <12 x i8>) {

	5640 %3 = ashr exact <12 x i8> %0, %1

	5641 ret <12 x i8> %3

	5642 }

	5643 ; CHECK-LABEL: define <16 x i8> @ashr_binop_12xi8_exact(<16 x i8>, <16 x i8>)

	5644 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	5645 ; CHECK-NEXT: ret <16 x i8> %3

	5646

	5647 define <12 x i8> @and_binop_12xi8(<12 x i8>, <12 x i8>) {

	5648 %3 = and <12 x i8> %0, %1

	5649 ret <12 x i8> %3

	5650 }

	5651 ; CHECK-LABEL: define <16 x i8> @and_binop_12xi8(<16 x i8>, <16 x i8>)

	5652 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	5653 ; CHECK-NEXT: ret <16 x i8> %3

	5654

	5655 define <12 x i8> @xor_binop_12xi8(<12 x i8>, <12 x i8>) {

	5656 %3 = xor <12 x i8> %0, %1

	5657 ret <12 x i8> %3

	5658 }

	5659 ; CHECK-LABEL: define <16 x i8> @xor_binop_12xi8(<16 x i8>, <16 x i8>)

	5660 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	5661 ; CHECK-NEXT: ret <16 x i8> %3

	5662

	5663 define <12 x i8> @or_binop_12xi8(<12 x i8>, <12 x i8>) {

	5664 %3 = or <12 x i8> %0, %1

	5665 ret <12 x i8> %3

	5666 }

	5667 ; CHECK-LABEL: define <16 x i8> @or_binop_12xi8(<16 x i8>, <16 x i8>)

	5668 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	5669 ; CHECK-NEXT: ret <16 x i8> %3

	5670

	5671 define <12 x i8> @urem_binop_12xi8(<12 x i8>, <12 x i8>) {

	5672 %3 = urem <12 x i8> %0, %1

	5673 ret <12 x i8> %3

	5674 }

	5675 ; CHECK-LABEL: define <16 x i8> @urem_binop_12xi8(<16 x i8>, <16 x i8>)

	5676 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	5677 ; CHECK-NEXT: ret <16 x i8> %3

	5678

	5679 define <12 x i8> @srem_binop_12xi8(<12 x i8>, <12 x i8>) {

	5680 %3 = srem <12 x i8> %0, %1

	5681 ret <12 x i8> %3

	5682 }

	5683 ; CHECK-LABEL: define <16 x i8> @srem_binop_12xi8(<16 x i8>, <16 x i8>)

	5684 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	5685 ; CHECK-NEXT: ret <16 x i8> %3

	5686

	5687 define <12 x i16> @add_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {

	5688 %3 = add nuw <12 x i16> %0, %1

	5689 ret <12 x i16> %3

	5690 }

	5691 ; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5692 ; CHECK-NEXT: %6 = add nuw <8 x i16> %1, %3

	5693 ; CHECK-NEXT: %7 = add nuw <8 x i16> %2, %4

	5694 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5695 ; CHECK-NEXT: ret <8 x i16> %6

	5696

	5697 define <12 x i16> @add_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {

	5698 %3 = add nsw <12 x i16> %0, %1

	5699 ret <12 x i16> %3

	5700 }

	5701 ; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5702 ; CHECK-NEXT: %6 = add nsw <8 x i16> %1, %3

	5703 ; CHECK-NEXT: %7 = add nsw <8 x i16> %2, %4

	5704 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5705 ; CHECK-NEXT: ret <8 x i16> %6

	5706

	5707 define <12 x i16> @add_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {

	5708 %3 = add nuw nsw <12 x i16> %0, %1

	5709 ret <12 x i16> %3

	5710 }

	5711 ; CHECK-LABEL: define <8 x i16> @add_binop_12xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5712 ; CHECK-NEXT: %6 = add nuw nsw <8 x i16> %1, %3

	5713 ; CHECK-NEXT: %7 = add nuw nsw <8 x i16> %2, %4

	5714 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5715 ; CHECK-NEXT: ret <8 x i16> %6

	5716

	5717 define <12 x i16> @sub_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {

	5718 %3 = sub nuw <12 x i16> %0, %1

	5719 ret <12 x i16> %3

	5720 }

	5721 ; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5722 ; CHECK-NEXT: %6 = sub nuw <8 x i16> %1, %3

	5723 ; CHECK-NEXT: %7 = sub nuw <8 x i16> %2, %4

	5724 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5725 ; CHECK-NEXT: ret <8 x i16> %6

	5726

	5727 define <12 x i16> @sub_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {

	5728 %3 = sub nsw <12 x i16> %0, %1

	5729 ret <12 x i16> %3

	5730 }

	5731 ; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5732 ; CHECK-NEXT: %6 = sub nsw <8 x i16> %1, %3

	5733 ; CHECK-NEXT: %7 = sub nsw <8 x i16> %2, %4

	5734 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5735 ; CHECK-NEXT: ret <8 x i16> %6

	5736

	5737 define <12 x i16> @sub_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {

	5738 %3 = sub nuw nsw <12 x i16> %0, %1

	5739 ret <12 x i16> %3

	5740 }

	5741 ; CHECK-LABEL: define <8 x i16> @sub_binop_12xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5742 ; CHECK-NEXT: %6 = sub nuw nsw <8 x i16> %1, %3

	5743 ; CHECK-NEXT: %7 = sub nuw nsw <8 x i16> %2, %4

	5744 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5745 ; CHECK-NEXT: ret <8 x i16> %6

	5746

	5747 define <12 x i16> @mul_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {

	5748 %3 = mul nuw <12 x i16> %0, %1

	5749 ret <12 x i16> %3

	5750 }

	5751 ; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5752 ; CHECK-NEXT: %6 = mul nuw <8 x i16> %1, %3

	5753 ; CHECK-NEXT: %7 = mul nuw <8 x i16> %2, %4

	5754 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5755 ; CHECK-NEXT: ret <8 x i16> %6

	5756

	5757 define <12 x i16> @mul_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {

	5758 %3 = mul nsw <12 x i16> %0, %1

	5759 ret <12 x i16> %3

	5760 }

	5761 ; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5762 ; CHECK-NEXT: %6 = mul nsw <8 x i16> %1, %3

	5763 ; CHECK-NEXT: %7 = mul nsw <8 x i16> %2, %4

	5764 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5765 ; CHECK-NEXT: ret <8 x i16> %6

	5766

	5767 define <12 x i16> @mul_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {

	5768 %3 = mul nuw nsw <12 x i16> %0, %1

	5769 ret <12 x i16> %3

	5770 }

	5771 ; CHECK-LABEL: define <8 x i16> @mul_binop_12xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5772 ; CHECK-NEXT: %6 = mul nuw nsw <8 x i16> %1, %3

	5773 ; CHECK-NEXT: %7 = mul nuw nsw <8 x i16> %2, %4

	5774 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5775 ; CHECK-NEXT: ret <8 x i16> %6

	5776

	5777 define <12 x i16> @shl_binop_12xi16_nuw(<12 x i16>, <12 x i16>) {

	5778 %3 = shl nuw <12 x i16> %0, %1

	5779 ret <12 x i16> %3

	5780 }

	5781 ; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5782 ; CHECK-NEXT: %6 = shl nuw <8 x i16> %1, %3

	5783 ; CHECK-NEXT: %7 = shl nuw <8 x i16> %2, %4

	5784 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5785 ; CHECK-NEXT: ret <8 x i16> %6

	5786

	5787 define <12 x i16> @shl_binop_12xi16_nsw(<12 x i16>, <12 x i16>) {

	5788 %3 = shl nsw <12 x i16> %0, %1

	5789 ret <12 x i16> %3

	5790 }

	5791 ; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5792 ; CHECK-NEXT: %6 = shl nsw <8 x i16> %1, %3

	5793 ; CHECK-NEXT: %7 = shl nsw <8 x i16> %2, %4

	5794 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5795 ; CHECK-NEXT: ret <8 x i16> %6

	5796

	5797 define <12 x i16> @shl_binop_12xi16_nuw_nsw(<12 x i16>, <12 x i16>) {

	5798 %3 = shl nuw nsw <12 x i16> %0, %1

	5799 ret <12 x i16> %3

	5800 }

	5801 ; CHECK-LABEL: define <8 x i16> @shl_binop_12xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5802 ; CHECK-NEXT: %6 = shl nuw nsw <8 x i16> %1, %3

	5803 ; CHECK-NEXT: %7 = shl nuw nsw <8 x i16> %2, %4

	5804 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5805 ; CHECK-NEXT: ret <8 x i16> %6

	5806

	5807 define <12 x i16> @udiv_binop_12xi16(<12 x i16>, <12 x i16>) {

	5808 %3 = udiv <12 x i16> %0, %1

	5809 ret <12 x i16> %3

	5810 }

	5811 ; CHECK-LABEL: define <8 x i16> @udiv_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5812 ; CHECK-NEXT: %6 = udiv <8 x i16> %1, %3

	5813 ; CHECK-NEXT: %7 = udiv <8 x i16> %2, %4

	5814 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5815 ; CHECK-NEXT: ret <8 x i16> %6

	5816

	5817 define <12 x i16> @udiv_binop_12xi16_exact(<12 x i16>, <12 x i16>) {

	5818 %3 = udiv exact <12 x i16> %0, %1

	5819 ret <12 x i16> %3

	5820 }

	5821 ; CHECK-LABEL: define <8 x i16> @udiv_binop_12xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5822 ; CHECK-NEXT: %6 = udiv exact <8 x i16> %1, %3

	5823 ; CHECK-NEXT: %7 = udiv exact <8 x i16> %2, %4

	5824 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5825 ; CHECK-NEXT: ret <8 x i16> %6

	5826

	5827 define <12 x i16> @sdiv_binop_12xi16(<12 x i16>, <12 x i16>) {

	5828 %3 = sdiv <12 x i16> %0, %1

	5829 ret <12 x i16> %3

	5830 }

	5831 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5832 ; CHECK-NEXT: %6 = sdiv <8 x i16> %1, %3

	5833 ; CHECK-NEXT: %7 = sdiv <8 x i16> %2, %4

	5834 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5835 ; CHECK-NEXT: ret <8 x i16> %6

	5836

	5837 define <12 x i16> @sdiv_binop_12xi16_exact(<12 x i16>, <12 x i16>) {

	5838 %3 = sdiv exact <12 x i16> %0, %1

	5839 ret <12 x i16> %3

	5840 }

	5841 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_12xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5842 ; CHECK-NEXT: %6 = sdiv exact <8 x i16> %1, %3

	5843 ; CHECK-NEXT: %7 = sdiv exact <8 x i16> %2, %4

	5844 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5845 ; CHECK-NEXT: ret <8 x i16> %6

	5846

	5847 define <12 x i16> @lshr_binop_12xi16(<12 x i16>, <12 x i16>) {

	5848 %3 = lshr <12 x i16> %0, %1

	5849 ret <12 x i16> %3

	5850 }

	5851 ; CHECK-LABEL: define <8 x i16> @lshr_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5852 ; CHECK-NEXT: %6 = lshr <8 x i16> %1, %3

	5853 ; CHECK-NEXT: %7 = lshr <8 x i16> %2, %4

	5854 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5855 ; CHECK-NEXT: ret <8 x i16> %6

	5856

	5857 define <12 x i16> @lshr_binop_12xi16_exact(<12 x i16>, <12 x i16>) {

	5858 %3 = lshr exact <12 x i16> %0, %1

	5859 ret <12 x i16> %3

	5860 }

	5861 ; CHECK-LABEL: define <8 x i16> @lshr_binop_12xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5862 ; CHECK-NEXT: %6 = lshr exact <8 x i16> %1, %3

	5863 ; CHECK-NEXT: %7 = lshr exact <8 x i16> %2, %4

	5864 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5865 ; CHECK-NEXT: ret <8 x i16> %6

	5866

	5867 define <12 x i16> @ashr_binop_12xi16(<12 x i16>, <12 x i16>) {

	5868 %3 = ashr <12 x i16> %0, %1

	5869 ret <12 x i16> %3

	5870 }

	5871 ; CHECK-LABEL: define <8 x i16> @ashr_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5872 ; CHECK-NEXT: %6 = ashr <8 x i16> %1, %3

	5873 ; CHECK-NEXT: %7 = ashr <8 x i16> %2, %4

	5874 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5875 ; CHECK-NEXT: ret <8 x i16> %6

	5876

	5877 define <12 x i16> @ashr_binop_12xi16_exact(<12 x i16>, <12 x i16>) {

	5878 %3 = ashr exact <12 x i16> %0, %1

	5879 ret <12 x i16> %3

	5880 }

	5881 ; CHECK-LABEL: define <8 x i16> @ashr_binop_12xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5882 ; CHECK-NEXT: %6 = ashr exact <8 x i16> %1, %3

	5883 ; CHECK-NEXT: %7 = ashr exact <8 x i16> %2, %4

	5884 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5885 ; CHECK-NEXT: ret <8 x i16> %6

	5886

	5887 define <12 x i16> @and_binop_12xi16(<12 x i16>, <12 x i16>) {

	5888 %3 = and <12 x i16> %0, %1

	5889 ret <12 x i16> %3

	5890 }

	5891 ; CHECK-LABEL: define <8 x i16> @and_binop_12xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5892 ; CHECK-NEXT: %6 = and <8 x i16> %1, %3

	5893 ; CHECK-NEXT: %7 = and <8 x i16> %2, %4

	5894 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5895 ; CHECK-NEXT: ret <8 x i16> %6

	5896

	5897 define <12 x i16> @xor_binop_12xi16(<12 x i16>, <12 x i16>) {

	5898 %3 = xor <12 x i16> %0, %1

	5899 ret <12 x i16> %3

	5900 }

	5901 ; CHECK-LABEL: define <8 x i16> @xor_binop_12xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5902 ; CHECK-NEXT: %6 = xor <8 x i16> %1, %3

	5903 ; CHECK-NEXT: %7 = xor <8 x i16> %2, %4

	5904 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5905 ; CHECK-NEXT: ret <8 x i16> %6

	5906

	5907 define <12 x i16> @or_binop_12xi16(<12 x i16>, <12 x i16>) {

	5908 %3 = or <12 x i16> %0, %1

	5909 ret <12 x i16> %3

	5910 }

	5911 ; CHECK-LABEL: define <8 x i16> @or_binop_12xi16(<8 x i16>* nocapture nonnull de referenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5912 ; CHECK-NEXT: %6 = or <8 x i16> %1, %3

	5913 ; CHECK-NEXT: %7 = or <8 x i16> %2, %4

	5914 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5915 ; CHECK-NEXT: ret <8 x i16> %6

	5916

	5917 define <12 x i16> @urem_binop_12xi16(<12 x i16>, <12 x i16>) {

	5918 %3 = urem <12 x i16> %0, %1

	5919 ret <12 x i16> %3

	5920 }

	5921 ; CHECK-LABEL: define <8 x i16> @urem_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5922 ; CHECK-NEXT: %6 = urem <8 x i16> %1, %3

	5923 ; CHECK-NEXT: %7 = urem <8 x i16> %2, %4

	5924 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5925 ; CHECK-NEXT: ret <8 x i16> %6

	5926

	5927 define <12 x i16> @srem_binop_12xi16(<12 x i16>, <12 x i16>) {

	5928 %3 = srem <12 x i16> %0, %1

	5929 ret <12 x i16> %3

	5930 }

	5931 ; CHECK-LABEL: define <8 x i16> @srem_binop_12xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	5932 ; CHECK-NEXT: %6 = srem <8 x i16> %1, %3

	5933 ; CHECK-NEXT: %7 = srem <8 x i16> %2, %4

	5934 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	5935 ; CHECK-NEXT: ret <8 x i16> %6

	5936

	5937 define <12 x i32> @add_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {

	5938 %3 = add nuw <12 x i32> %0, %1

	5939 ret <12 x i32> %3

	5940 }

	5941 ; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5942 ; CHECK-NEXT: %9 = add nuw <4 x i32> %2, %5

	5943 ; CHECK-NEXT: %10 = add nuw <4 x i32> %3, %6

	5944 ; CHECK-NEXT: %11 = add nuw <4 x i32> %4, %7

	5945 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	5946 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	5947 ; CHECK-NEXT: ret <4 x i32> %9

	5948

	5949 define <12 x i32> @add_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {

	5950 %3 = add nsw <12 x i32> %0, %1

	5951 ret <12 x i32> %3

	5952 }

	5953 ; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5954 ; CHECK-NEXT: %9 = add nsw <4 x i32> %2, %5

	5955 ; CHECK-NEXT: %10 = add nsw <4 x i32> %3, %6

	5956 ; CHECK-NEXT: %11 = add nsw <4 x i32> %4, %7

	5957 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	5958 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	5959 ; CHECK-NEXT: ret <4 x i32> %9

	5960

	5961 define <12 x i32> @add_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {

	5962 %3 = add nuw nsw <12 x i32> %0, %1

	5963 ret <12 x i32> %3

	5964 }

	5965 ; CHECK-LABEL: define <4 x i32> @add_binop_12xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5966 ; CHECK-NEXT: %9 = add nuw nsw <4 x i32> %2, %5

	5967 ; CHECK-NEXT: %10 = add nuw nsw <4 x i32> %3, %6

	5968 ; CHECK-NEXT: %11 = add nuw nsw <4 x i32> %4, %7

	5969 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	5970 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	5971 ; CHECK-NEXT: ret <4 x i32> %9

	5972

	5973 define <12 x i32> @sub_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {

	5974 %3 = sub nuw <12 x i32> %0, %1

	5975 ret <12 x i32> %3

	5976 }

	5977 ; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5978 ; CHECK-NEXT: %9 = sub nuw <4 x i32> %2, %5

	5979 ; CHECK-NEXT: %10 = sub nuw <4 x i32> %3, %6

	5980 ; CHECK-NEXT: %11 = sub nuw <4 x i32> %4, %7

	5981 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	5982 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	5983 ; CHECK-NEXT: ret <4 x i32> %9

	5984

	5985 define <12 x i32> @sub_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {

	5986 %3 = sub nsw <12 x i32> %0, %1

	5987 ret <12 x i32> %3

	5988 }

	5989 ; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	5990 ; CHECK-NEXT: %9 = sub nsw <4 x i32> %2, %5

	5991 ; CHECK-NEXT: %10 = sub nsw <4 x i32> %3, %6

	5992 ; CHECK-NEXT: %11 = sub nsw <4 x i32> %4, %7

	5993 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	5994 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	5995 ; CHECK-NEXT: ret <4 x i32> %9

	5996

	5997 define <12 x i32> @sub_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {

	5998 %3 = sub nuw nsw <12 x i32> %0, %1

	5999 ret <12 x i32> %3

	6000 }

	6001 ; CHECK-LABEL: define <4 x i32> @sub_binop_12xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6002 ; CHECK-NEXT: %9 = sub nuw nsw <4 x i32> %2, %5

	6003 ; CHECK-NEXT: %10 = sub nuw nsw <4 x i32> %3, %6

	6004 ; CHECK-NEXT: %11 = sub nuw nsw <4 x i32> %4, %7

	6005 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6006 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6007 ; CHECK-NEXT: ret <4 x i32> %9

	6008

	6009 define <12 x i32> @mul_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {

	6010 %3 = mul nuw <12 x i32> %0, %1

	6011 ret <12 x i32> %3

	6012 }

	6013 ; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6014 ; CHECK-NEXT: %9 = mul nuw <4 x i32> %2, %5

	6015 ; CHECK-NEXT: %10 = mul nuw <4 x i32> %3, %6

	6016 ; CHECK-NEXT: %11 = mul nuw <4 x i32> %4, %7

	6017 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6018 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6019 ; CHECK-NEXT: ret <4 x i32> %9

	6020

	6021 define <12 x i32> @mul_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {

	6022 %3 = mul nsw <12 x i32> %0, %1

	6023 ret <12 x i32> %3

	6024 }

	6025 ; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6026 ; CHECK-NEXT: %9 = mul nsw <4 x i32> %2, %5

	6027 ; CHECK-NEXT: %10 = mul nsw <4 x i32> %3, %6

	6028 ; CHECK-NEXT: %11 = mul nsw <4 x i32> %4, %7

	6029 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6030 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6031 ; CHECK-NEXT: ret <4 x i32> %9

	6032

	6033 define <12 x i32> @mul_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {

	6034 %3 = mul nuw nsw <12 x i32> %0, %1

	6035 ret <12 x i32> %3

	6036 }

	6037 ; CHECK-LABEL: define <4 x i32> @mul_binop_12xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6038 ; CHECK-NEXT: %9 = mul nuw nsw <4 x i32> %2, %5

	6039 ; CHECK-NEXT: %10 = mul nuw nsw <4 x i32> %3, %6

	6040 ; CHECK-NEXT: %11 = mul nuw nsw <4 x i32> %4, %7

	6041 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6042 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6043 ; CHECK-NEXT: ret <4 x i32> %9

	6044

	6045 define <12 x i32> @shl_binop_12xi32_nuw(<12 x i32>, <12 x i32>) {

	6046 %3 = shl nuw <12 x i32> %0, %1

	6047 ret <12 x i32> %3

	6048 }

	6049 ; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6050 ; CHECK-NEXT: %9 = shl nuw <4 x i32> %2, %5

	6051 ; CHECK-NEXT: %10 = shl nuw <4 x i32> %3, %6

	6052 ; CHECK-NEXT: %11 = shl nuw <4 x i32> %4, %7

	6053 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6054 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6055 ; CHECK-NEXT: ret <4 x i32> %9

	6056

	6057 define <12 x i32> @shl_binop_12xi32_nsw(<12 x i32>, <12 x i32>) {

	6058 %3 = shl nsw <12 x i32> %0, %1

	6059 ret <12 x i32> %3

	6060 }

	6061 ; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6062 ; CHECK-NEXT: %9 = shl nsw <4 x i32> %2, %5

	6063 ; CHECK-NEXT: %10 = shl nsw <4 x i32> %3, %6

	6064 ; CHECK-NEXT: %11 = shl nsw <4 x i32> %4, %7

	6065 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6066 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6067 ; CHECK-NEXT: ret <4 x i32> %9

	6068

	6069 define <12 x i32> @shl_binop_12xi32_nuw_nsw(<12 x i32>, <12 x i32>) {

	6070 %3 = shl nuw nsw <12 x i32> %0, %1

	6071 ret <12 x i32> %3

	6072 }

	6073 ; CHECK-LABEL: define <4 x i32> @shl_binop_12xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6074 ; CHECK-NEXT: %9 = shl nuw nsw <4 x i32> %2, %5

	6075 ; CHECK-NEXT: %10 = shl nuw nsw <4 x i32> %3, %6

	6076 ; CHECK-NEXT: %11 = shl nuw nsw <4 x i32> %4, %7

	6077 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6078 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6079 ; CHECK-NEXT: ret <4 x i32> %9

	6080

	6081 define <12 x i32> @udiv_binop_12xi32(<12 x i32>, <12 x i32>) {

	6082 %3 = udiv <12 x i32> %0, %1

	6083 ret <12 x i32> %3

	6084 }

	6085 ; CHECK-LABEL: define <4 x i32> @udiv_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6086 ; CHECK-NEXT: %9 = udiv <4 x i32> %2, %5

	6087 ; CHECK-NEXT: %10 = udiv <4 x i32> %3, %6

	6088 ; CHECK-NEXT: %11 = udiv <4 x i32> %4, %7

	6089 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6090 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6091 ; CHECK-NEXT: ret <4 x i32> %9

	6092

	6093 define <12 x i32> @udiv_binop_12xi32_exact(<12 x i32>, <12 x i32>) {

	6094 %3 = udiv exact <12 x i32> %0, %1

	6095 ret <12 x i32> %3

	6096 }

	6097 ; CHECK-LABEL: define <4 x i32> @udiv_binop_12xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6098 ; CHECK-NEXT: %9 = udiv exact <4 x i32> %2, %5

	6099 ; CHECK-NEXT: %10 = udiv exact <4 x i32> %3, %6

	6100 ; CHECK-NEXT: %11 = udiv exact <4 x i32> %4, %7

	6101 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6102 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6103 ; CHECK-NEXT: ret <4 x i32> %9

	6104

	6105 define <12 x i32> @sdiv_binop_12xi32(<12 x i32>, <12 x i32>) {

	6106 %3 = sdiv <12 x i32> %0, %1

	6107 ret <12 x i32> %3

	6108 }

	6109 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6110 ; CHECK-NEXT: %9 = sdiv <4 x i32> %2, %5

	6111 ; CHECK-NEXT: %10 = sdiv <4 x i32> %3, %6

	6112 ; CHECK-NEXT: %11 = sdiv <4 x i32> %4, %7

	6113 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6114 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6115 ; CHECK-NEXT: ret <4 x i32> %9

	6116

	6117 define <12 x i32> @sdiv_binop_12xi32_exact(<12 x i32>, <12 x i32>) {

	6118 %3 = sdiv exact <12 x i32> %0, %1

	6119 ret <12 x i32> %3

	6120 }

	6121 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_12xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6122 ; CHECK-NEXT: %9 = sdiv exact <4 x i32> %2, %5

	6123 ; CHECK-NEXT: %10 = sdiv exact <4 x i32> %3, %6

	6124 ; CHECK-NEXT: %11 = sdiv exact <4 x i32> %4, %7

	6125 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6126 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6127 ; CHECK-NEXT: ret <4 x i32> %9

	6128

	6129 define <12 x i32> @lshr_binop_12xi32(<12 x i32>, <12 x i32>) {

	6130 %3 = lshr <12 x i32> %0, %1

	6131 ret <12 x i32> %3

	6132 }

	6133 ; CHECK-LABEL: define <4 x i32> @lshr_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6134 ; CHECK-NEXT: %9 = lshr <4 x i32> %2, %5

	6135 ; CHECK-NEXT: %10 = lshr <4 x i32> %3, %6

	6136 ; CHECK-NEXT: %11 = lshr <4 x i32> %4, %7

	6137 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6138 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6139 ; CHECK-NEXT: ret <4 x i32> %9

	6140

	6141 define <12 x i32> @lshr_binop_12xi32_exact(<12 x i32>, <12 x i32>) {

	6142 %3 = lshr exact <12 x i32> %0, %1

	6143 ret <12 x i32> %3

	6144 }

	6145 ; CHECK-LABEL: define <4 x i32> @lshr_binop_12xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6146 ; CHECK-NEXT: %9 = lshr exact <4 x i32> %2, %5

	6147 ; CHECK-NEXT: %10 = lshr exact <4 x i32> %3, %6

	6148 ; CHECK-NEXT: %11 = lshr exact <4 x i32> %4, %7

	6149 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6150 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6151 ; CHECK-NEXT: ret <4 x i32> %9

	6152

	6153 define <12 x i32> @ashr_binop_12xi32(<12 x i32>, <12 x i32>) {

	6154 %3 = ashr <12 x i32> %0, %1

	6155 ret <12 x i32> %3

	6156 }

	6157 ; CHECK-LABEL: define <4 x i32> @ashr_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6158 ; CHECK-NEXT: %9 = ashr <4 x i32> %2, %5

	6159 ; CHECK-NEXT: %10 = ashr <4 x i32> %3, %6

	6160 ; CHECK-NEXT: %11 = ashr <4 x i32> %4, %7

	6161 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6162 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6163 ; CHECK-NEXT: ret <4 x i32> %9

	6164

	6165 define <12 x i32> @ashr_binop_12xi32_exact(<12 x i32>, <12 x i32>) {

	6166 %3 = ashr exact <12 x i32> %0, %1

	6167 ret <12 x i32> %3

	6168 }

	6169 ; CHECK-LABEL: define <4 x i32> @ashr_binop_12xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6170 ; CHECK-NEXT: %9 = ashr exact <4 x i32> %2, %5

	6171 ; CHECK-NEXT: %10 = ashr exact <4 x i32> %3, %6

	6172 ; CHECK-NEXT: %11 = ashr exact <4 x i32> %4, %7

	6173 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6174 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6175 ; CHECK-NEXT: ret <4 x i32> %9

	6176

	6177 define <12 x i32> @and_binop_12xi32(<12 x i32>, <12 x i32>) {

	6178 %3 = and <12 x i32> %0, %1

	6179 ret <12 x i32> %3

	6180 }

	6181 ; CHECK-LABEL: define <4 x i32> @and_binop_12xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6182 ; CHECK-NEXT: %9 = and <4 x i32> %2, %5

	6183 ; CHECK-NEXT: %10 = and <4 x i32> %3, %6

	6184 ; CHECK-NEXT: %11 = and <4 x i32> %4, %7

	6185 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6186 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6187 ; CHECK-NEXT: ret <4 x i32> %9

	6188

	6189 define <12 x i32> @xor_binop_12xi32(<12 x i32>, <12 x i32>) {

	6190 %3 = xor <12 x i32> %0, %1

	6191 ret <12 x i32> %3

	6192 }

	6193 ; CHECK-LABEL: define <4 x i32> @xor_binop_12xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6194 ; CHECK-NEXT: %9 = xor <4 x i32> %2, %5

	6195 ; CHECK-NEXT: %10 = xor <4 x i32> %3, %6

	6196 ; CHECK-NEXT: %11 = xor <4 x i32> %4, %7

	6197 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6198 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6199 ; CHECK-NEXT: ret <4 x i32> %9

	6200

	6201 define <12 x i32> @or_binop_12xi32(<12 x i32>, <12 x i32>) {

	6202 %3 = or <12 x i32> %0, %1

	6203 ret <12 x i32> %3

	6204 }

	6205 ; CHECK-LABEL: define <4 x i32> @or_binop_12xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6206 ; CHECK-NEXT: %9 = or <4 x i32> %2, %5

	6207 ; CHECK-NEXT: %10 = or <4 x i32> %3, %6

	6208 ; CHECK-NEXT: %11 = or <4 x i32> %4, %7

	6209 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6210 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6211 ; CHECK-NEXT: ret <4 x i32> %9

	6212

	6213 define <12 x i32> @urem_binop_12xi32(<12 x i32>, <12 x i32>) {

	6214 %3 = urem <12 x i32> %0, %1

	6215 ret <12 x i32> %3

	6216 }

	6217 ; CHECK-LABEL: define <4 x i32> @urem_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6218 ; CHECK-NEXT: %9 = urem <4 x i32> %2, %5

	6219 ; CHECK-NEXT: %10 = urem <4 x i32> %3, %6

	6220 ; CHECK-NEXT: %11 = urem <4 x i32> %4, %7

	6221 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6222 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6223 ; CHECK-NEXT: ret <4 x i32> %9

	6224

	6225 define <12 x i32> @srem_binop_12xi32(<12 x i32>, <12 x i32>) {

	6226 %3 = srem <12 x i32> %0, %1

	6227 ret <12 x i32> %3

	6228 }

	6229 ; CHECK-LABEL: define <4 x i32> @srem_binop_12xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> , <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	6230 ; CHECK-NEXT: %9 = srem <4 x i32> %2, %5

	6231 ; CHECK-NEXT: %10 = srem <4 x i32> %3, %6

	6232 ; CHECK-NEXT: %11 = srem <4 x i32> %4, %7

	6233 ; CHECK-NEXT: store <4 x i32> %10, <4 x i32>* %0, align 16

	6234 ; CHECK-NEXT: store <4 x i32> %11, <4 x i32>* %1, align 16

	6235 ; CHECK-NEXT: ret <4 x i32> %9

	6236

	6237 define <12 x i64> @add_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {

	6238 %3 = add nuw <12 x i64> %0, %1

	6239 ret <12 x i64> %3

	6240 }

	6241 ; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6242 ; CHECK-NEXT: %18 = add nuw <2 x i64> %5, %11

	6243 ; CHECK-NEXT: %19 = add nuw <2 x i64> %6, %12

	6244 ; CHECK-NEXT: %20 = add nuw <2 x i64> %7, %13

	6245 ; CHECK-NEXT: %21 = add nuw <2 x i64> %8, %14

	6246 ; CHECK-NEXT: %22 = add nuw <2 x i64> %9, %15

	6247 ; CHECK-NEXT: %23 = add nuw <2 x i64> %10, %16

	6248 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6249 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6250 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6251 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6252 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6253 ; CHECK-NEXT: ret <2 x i64> %18

	6254

	6255 define <12 x i64> @add_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {

	6256 %3 = add nsw <12 x i64> %0, %1

	6257 ret <12 x i64> %3

	6258 }

	6259 ; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6260 ; CHECK-NEXT: %18 = add nsw <2 x i64> %5, %11

	6261 ; CHECK-NEXT: %19 = add nsw <2 x i64> %6, %12

	6262 ; CHECK-NEXT: %20 = add nsw <2 x i64> %7, %13

	6263 ; CHECK-NEXT: %21 = add nsw <2 x i64> %8, %14

	6264 ; CHECK-NEXT: %22 = add nsw <2 x i64> %9, %15

	6265 ; CHECK-NEXT: %23 = add nsw <2 x i64> %10, %16

	6266 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6267 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6268 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6269 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6270 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6271 ; CHECK-NEXT: ret <2 x i64> %18

	6272

	6273 define <12 x i64> @add_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {

	6274 %3 = add nuw nsw <12 x i64> %0, %1

	6275 ret <12 x i64> %3

	6276 }

	6277 ; CHECK-LABEL: define <2 x i64> @add_binop_12xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6278 ; CHECK-NEXT: %18 = add nuw nsw <2 x i64> %5, %11

	6279 ; CHECK-NEXT: %19 = add nuw nsw <2 x i64> %6, %12

	6280 ; CHECK-NEXT: %20 = add nuw nsw <2 x i64> %7, %13

	6281 ; CHECK-NEXT: %21 = add nuw nsw <2 x i64> %8, %14

	6282 ; CHECK-NEXT: %22 = add nuw nsw <2 x i64> %9, %15

	6283 ; CHECK-NEXT: %23 = add nuw nsw <2 x i64> %10, %16

	6284 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6285 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6286 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6287 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6288 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6289 ; CHECK-NEXT: ret <2 x i64> %18

	6290

	6291 define <12 x i64> @sub_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {

	6292 %3 = sub nuw <12 x i64> %0, %1

	6293 ret <12 x i64> %3

	6294 }

	6295 ; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6296 ; CHECK-NEXT: %18 = sub nuw <2 x i64> %5, %11

	6297 ; CHECK-NEXT: %19 = sub nuw <2 x i64> %6, %12

	6298 ; CHECK-NEXT: %20 = sub nuw <2 x i64> %7, %13

	6299 ; CHECK-NEXT: %21 = sub nuw <2 x i64> %8, %14

	6300 ; CHECK-NEXT: %22 = sub nuw <2 x i64> %9, %15

	6301 ; CHECK-NEXT: %23 = sub nuw <2 x i64> %10, %16

	6302 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6303 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6304 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6305 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6306 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6307 ; CHECK-NEXT: ret <2 x i64> %18

	6308

	6309 define <12 x i64> @sub_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {

	6310 %3 = sub nsw <12 x i64> %0, %1

	6311 ret <12 x i64> %3

	6312 }

	6313 ; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6314 ; CHECK-NEXT: %18 = sub nsw <2 x i64> %5, %11

	6315 ; CHECK-NEXT: %19 = sub nsw <2 x i64> %6, %12

	6316 ; CHECK-NEXT: %20 = sub nsw <2 x i64> %7, %13

	6317 ; CHECK-NEXT: %21 = sub nsw <2 x i64> %8, %14

	6318 ; CHECK-NEXT: %22 = sub nsw <2 x i64> %9, %15

	6319 ; CHECK-NEXT: %23 = sub nsw <2 x i64> %10, %16

	6320 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6321 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6322 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6323 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6324 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6325 ; CHECK-NEXT: ret <2 x i64> %18

	6326

	6327 define <12 x i64> @sub_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {

	6328 %3 = sub nuw nsw <12 x i64> %0, %1

	6329 ret <12 x i64> %3

	6330 }

	6331 ; CHECK-LABEL: define <2 x i64> @sub_binop_12xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6332 ; CHECK-NEXT: %18 = sub nuw nsw <2 x i64> %5, %11

	6333 ; CHECK-NEXT: %19 = sub nuw nsw <2 x i64> %6, %12

	6334 ; CHECK-NEXT: %20 = sub nuw nsw <2 x i64> %7, %13

	6335 ; CHECK-NEXT: %21 = sub nuw nsw <2 x i64> %8, %14

	6336 ; CHECK-NEXT: %22 = sub nuw nsw <2 x i64> %9, %15

	6337 ; CHECK-NEXT: %23 = sub nuw nsw <2 x i64> %10, %16

	6338 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6339 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6340 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6341 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6342 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6343 ; CHECK-NEXT: ret <2 x i64> %18

	6344

	6345 define <12 x i64> @mul_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {

	6346 %3 = mul nuw <12 x i64> %0, %1

	6347 ret <12 x i64> %3

	6348 }

	6349 ; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6350 ; CHECK-NEXT: %18 = mul nuw <2 x i64> %5, %11

	6351 ; CHECK-NEXT: %19 = mul nuw <2 x i64> %6, %12

	6352 ; CHECK-NEXT: %20 = mul nuw <2 x i64> %7, %13

	6353 ; CHECK-NEXT: %21 = mul nuw <2 x i64> %8, %14

	6354 ; CHECK-NEXT: %22 = mul nuw <2 x i64> %9, %15

	6355 ; CHECK-NEXT: %23 = mul nuw <2 x i64> %10, %16

	6356 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6357 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6358 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6359 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6360 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6361 ; CHECK-NEXT: ret <2 x i64> %18

	6362

	6363 define <12 x i64> @mul_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {

	6364 %3 = mul nsw <12 x i64> %0, %1

	6365 ret <12 x i64> %3

	6366 }

	6367 ; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6368 ; CHECK-NEXT: %18 = mul nsw <2 x i64> %5, %11

	6369 ; CHECK-NEXT: %19 = mul nsw <2 x i64> %6, %12

	6370 ; CHECK-NEXT: %20 = mul nsw <2 x i64> %7, %13

	6371 ; CHECK-NEXT: %21 = mul nsw <2 x i64> %8, %14

	6372 ; CHECK-NEXT: %22 = mul nsw <2 x i64> %9, %15

	6373 ; CHECK-NEXT: %23 = mul nsw <2 x i64> %10, %16

	6374 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6375 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6376 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6377 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6378 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6379 ; CHECK-NEXT: ret <2 x i64> %18

	6380

	6381 define <12 x i64> @mul_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {

	6382 %3 = mul nuw nsw <12 x i64> %0, %1

	6383 ret <12 x i64> %3

	6384 }

	6385 ; CHECK-LABEL: define <2 x i64> @mul_binop_12xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6386 ; CHECK-NEXT: %18 = mul nuw nsw <2 x i64> %5, %11

	6387 ; CHECK-NEXT: %19 = mul nuw nsw <2 x i64> %6, %12

	6388 ; CHECK-NEXT: %20 = mul nuw nsw <2 x i64> %7, %13

	6389 ; CHECK-NEXT: %21 = mul nuw nsw <2 x i64> %8, %14

	6390 ; CHECK-NEXT: %22 = mul nuw nsw <2 x i64> %9, %15

	6391 ; CHECK-NEXT: %23 = mul nuw nsw <2 x i64> %10, %16

	6392 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6393 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6394 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6395 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6396 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6397 ; CHECK-NEXT: ret <2 x i64> %18

	6398

	6399 define <12 x i64> @shl_binop_12xi64_nuw(<12 x i64>, <12 x i64>) {

	6400 %3 = shl nuw <12 x i64> %0, %1

	6401 ret <12 x i64> %3

	6402 }

	6403 ; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6404 ; CHECK-NEXT: %18 = shl nuw <2 x i64> %5, %11

	6405 ; CHECK-NEXT: %19 = shl nuw <2 x i64> %6, %12

	6406 ; CHECK-NEXT: %20 = shl nuw <2 x i64> %7, %13

	6407 ; CHECK-NEXT: %21 = shl nuw <2 x i64> %8, %14

	6408 ; CHECK-NEXT: %22 = shl nuw <2 x i64> %9, %15

	6409 ; CHECK-NEXT: %23 = shl nuw <2 x i64> %10, %16

	6410 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6411 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6412 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6413 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6414 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6415 ; CHECK-NEXT: ret <2 x i64> %18

	6416

	6417 define <12 x i64> @shl_binop_12xi64_nsw(<12 x i64>, <12 x i64>) {

	6418 %3 = shl nsw <12 x i64> %0, %1

	6419 ret <12 x i64> %3

	6420 }

	6421 ; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>)

	6422 ; CHECK-NEXT: %18 = shl nsw <2 x i64> %5, %11

	6423 ; CHECK-NEXT: %19 = shl nsw <2 x i64> %6, %12

	6424 ; CHECK-NEXT: %20 = shl nsw <2 x i64> %7, %13

	6425 ; CHECK-NEXT: %21 = shl nsw <2 x i64> %8, %14

	6426 ; CHECK-NEXT: %22 = shl nsw <2 x i64> %9, %15

	6427 ; CHECK-NEXT: %23 = shl nsw <2 x i64> %10, %16

	6428 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6429 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6430 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6431 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6432 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6433 ; CHECK-NEXT: ret <2 x i64> %18

	6434

	6435 define <12 x i64> @shl_binop_12xi64_nuw_nsw(<12 x i64>, <12 x i64>) {

	6436 %3 = shl nuw nsw <12 x i64> %0, %1

	6437 ret <12 x i64> %3

	6438 }

	6439 ; CHECK-LABEL: define <2 x i64> @shl_binop_12xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6440 ; CHECK-NEXT: %18 = shl nuw nsw <2 x i64> %5, %11

	6441 ; CHECK-NEXT: %19 = shl nuw nsw <2 x i64> %6, %12

	6442 ; CHECK-NEXT: %20 = shl nuw nsw <2 x i64> %7, %13

	6443 ; CHECK-NEXT: %21 = shl nuw nsw <2 x i64> %8, %14

	6444 ; CHECK-NEXT: %22 = shl nuw nsw <2 x i64> %9, %15

	6445 ; CHECK-NEXT: %23 = shl nuw nsw <2 x i64> %10, %16

	6446 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6447 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6448 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6449 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6450 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6451 ; CHECK-NEXT: ret <2 x i64> %18

	6452

	6453 define <12 x i64> @udiv_binop_12xi64(<12 x i64>, <12 x i64>) {

	6454 %3 = udiv <12 x i64> %0, %1

	6455 ret <12 x i64> %3

	6456 }

	6457 ; CHECK-LABEL: define <2 x i64> @udiv_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6458 ; CHECK-NEXT: %18 = udiv <2 x i64> %5, %11

	6459 ; CHECK-NEXT: %19 = udiv <2 x i64> %6, %12

	6460 ; CHECK-NEXT: %20 = udiv <2 x i64> %7, %13

	6461 ; CHECK-NEXT: %21 = udiv <2 x i64> %8, %14

	6462 ; CHECK-NEXT: %22 = udiv <2 x i64> %9, %15

	6463 ; CHECK-NEXT: %23 = udiv <2 x i64> %10, %16

	6464 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6465 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6466 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6467 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6468 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6469 ; CHECK-NEXT: ret <2 x i64> %18

	6470

	6471 define <12 x i64> @udiv_binop_12xi64_exact(<12 x i64>, <12 x i64>) {

	6472 %3 = udiv exact <12 x i64> %0, %1

	6473 ret <12 x i64> %3

	6474 }

	6475 ; CHECK-LABEL: define <2 x i64> @udiv_binop_12xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6476 ; CHECK-NEXT: %18 = udiv exact <2 x i64> %5, %11

	6477 ; CHECK-NEXT: %19 = udiv exact <2 x i64> %6, %12

	6478 ; CHECK-NEXT: %20 = udiv exact <2 x i64> %7, %13

	6479 ; CHECK-NEXT: %21 = udiv exact <2 x i64> %8, %14

	6480 ; CHECK-NEXT: %22 = udiv exact <2 x i64> %9, %15

	6481 ; CHECK-NEXT: %23 = udiv exact <2 x i64> %10, %16

	6482 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6483 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6484 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6485 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6486 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6487 ; CHECK-NEXT: ret <2 x i64> %18

	6488

	6489 define <12 x i64> @sdiv_binop_12xi64(<12 x i64>, <12 x i64>) {

	6490 %3 = sdiv <12 x i64> %0, %1

	6491 ret <12 x i64> %3

	6492 }

	6493 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6494 ; CHECK-NEXT: %18 = sdiv <2 x i64> %5, %11

	6495 ; CHECK-NEXT: %19 = sdiv <2 x i64> %6, %12

	6496 ; CHECK-NEXT: %20 = sdiv <2 x i64> %7, %13

	6497 ; CHECK-NEXT: %21 = sdiv <2 x i64> %8, %14

	6498 ; CHECK-NEXT: %22 = sdiv <2 x i64> %9, %15

	6499 ; CHECK-NEXT: %23 = sdiv <2 x i64> %10, %16

	6500 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6501 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6502 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6503 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6504 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6505 ; CHECK-NEXT: ret <2 x i64> %18

	6506

	6507 define <12 x i64> @sdiv_binop_12xi64_exact(<12 x i64>, <12 x i64>) {

	6508 %3 = sdiv exact <12 x i64> %0, %1

	6509 ret <12 x i64> %3

	6510 }

	6511 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_12xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6512 ; CHECK-NEXT: %18 = sdiv exact <2 x i64> %5, %11

	6513 ; CHECK-NEXT: %19 = sdiv exact <2 x i64> %6, %12

	6514 ; CHECK-NEXT: %20 = sdiv exact <2 x i64> %7, %13

	6515 ; CHECK-NEXT: %21 = sdiv exact <2 x i64> %8, %14

	6516 ; CHECK-NEXT: %22 = sdiv exact <2 x i64> %9, %15

	6517 ; CHECK-NEXT: %23 = sdiv exact <2 x i64> %10, %16

	6518 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6519 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6520 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6521 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6522 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6523 ; CHECK-NEXT: ret <2 x i64> %18

	6524

	6525 define <12 x i64> @lshr_binop_12xi64(<12 x i64>, <12 x i64>) {

	6526 %3 = lshr <12 x i64> %0, %1

	6527 ret <12 x i64> %3

	6528 }

	6529 ; CHECK-LABEL: define <2 x i64> @lshr_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6530 ; CHECK-NEXT: %18 = lshr <2 x i64> %5, %11

	6531 ; CHECK-NEXT: %19 = lshr <2 x i64> %6, %12

	6532 ; CHECK-NEXT: %20 = lshr <2 x i64> %7, %13

	6533 ; CHECK-NEXT: %21 = lshr <2 x i64> %8, %14

	6534 ; CHECK-NEXT: %22 = lshr <2 x i64> %9, %15

	6535 ; CHECK-NEXT: %23 = lshr <2 x i64> %10, %16

	6536 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6537 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6538 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6539 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6540 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6541 ; CHECK-NEXT: ret <2 x i64> %18

	6542

	6543 define <12 x i64> @lshr_binop_12xi64_exact(<12 x i64>, <12 x i64>) {

	6544 %3 = lshr exact <12 x i64> %0, %1

	6545 ret <12 x i64> %3

	6546 }

	6547 ; CHECK-LABEL: define <2 x i64> @lshr_binop_12xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6548 ; CHECK-NEXT: %18 = lshr exact <2 x i64> %5, %11

	6549 ; CHECK-NEXT: %19 = lshr exact <2 x i64> %6, %12

	6550 ; CHECK-NEXT: %20 = lshr exact <2 x i64> %7, %13

	6551 ; CHECK-NEXT: %21 = lshr exact <2 x i64> %8, %14

	6552 ; CHECK-NEXT: %22 = lshr exact <2 x i64> %9, %15

	6553 ; CHECK-NEXT: %23 = lshr exact <2 x i64> %10, %16

	6554 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6555 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6556 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6557 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6558 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6559 ; CHECK-NEXT: ret <2 x i64> %18

	6560

	6561 define <12 x i64> @ashr_binop_12xi64(<12 x i64>, <12 x i64>) {

	6562 %3 = ashr <12 x i64> %0, %1

	6563 ret <12 x i64> %3

	6564 }

	6565 ; CHECK-LABEL: define <2 x i64> @ashr_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6566 ; CHECK-NEXT: %18 = ashr <2 x i64> %5, %11

	6567 ; CHECK-NEXT: %19 = ashr <2 x i64> %6, %12

	6568 ; CHECK-NEXT: %20 = ashr <2 x i64> %7, %13

	6569 ; CHECK-NEXT: %21 = ashr <2 x i64> %8, %14

	6570 ; CHECK-NEXT: %22 = ashr <2 x i64> %9, %15

	6571 ; CHECK-NEXT: %23 = ashr <2 x i64> %10, %16

	6572 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6573 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6574 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6575 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6576 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6577 ; CHECK-NEXT: ret <2 x i64> %18

	6578

	6579 define <12 x i64> @ashr_binop_12xi64_exact(<12 x i64>, <12 x i64>) {

	6580 %3 = ashr exact <12 x i64> %0, %1

	6581 ret <12 x i64> %3

	6582 }

	6583 ; CHECK-LABEL: define <2 x i64> @ashr_binop_12xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6584 ; CHECK-NEXT: %18 = ashr exact <2 x i64> %5, %11

	6585 ; CHECK-NEXT: %19 = ashr exact <2 x i64> %6, %12

	6586 ; CHECK-NEXT: %20 = ashr exact <2 x i64> %7, %13

	6587 ; CHECK-NEXT: %21 = ashr exact <2 x i64> %8, %14

	6588 ; CHECK-NEXT: %22 = ashr exact <2 x i64> %9, %15

	6589 ; CHECK-NEXT: %23 = ashr exact <2 x i64> %10, %16

	6590 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6591 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6592 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6593 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6594 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6595 ; CHECK-NEXT: ret <2 x i64> %18

	6596

	6597 define <12 x i64> @and_binop_12xi64(<12 x i64>, <12 x i64>) {

	6598 %3 = and <12 x i64> %0, %1

	6599 ret <12 x i64> %3

	6600 }

	6601 ; CHECK-LABEL: define <2 x i64> @and_binop_12xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>)

	6602 ; CHECK-NEXT: %18 = and <2 x i64> %5, %11

	6603 ; CHECK-NEXT: %19 = and <2 x i64> %6, %12

	6604 ; CHECK-NEXT: %20 = and <2 x i64> %7, %13

	6605 ; CHECK-NEXT: %21 = and <2 x i64> %8, %14

	6606 ; CHECK-NEXT: %22 = and <2 x i64> %9, %15

	6607 ; CHECK-NEXT: %23 = and <2 x i64> %10, %16

	6608 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6609 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6610 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6611 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6612 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6613 ; CHECK-NEXT: ret <2 x i64> %18

	6614

	6615 define <12 x i64> @xor_binop_12xi64(<12 x i64>, <12 x i64>) {

	6616 %3 = xor <12 x i64> %0, %1

	6617 ret <12 x i64> %3

	6618 }

	6619 ; CHECK-LABEL: define <2 x i64> @xor_binop_12xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>)

	6620 ; CHECK-NEXT: %18 = xor <2 x i64> %5, %11

	6621 ; CHECK-NEXT: %19 = xor <2 x i64> %6, %12

	6622 ; CHECK-NEXT: %20 = xor <2 x i64> %7, %13

	6623 ; CHECK-NEXT: %21 = xor <2 x i64> %8, %14

	6624 ; CHECK-NEXT: %22 = xor <2 x i64> %9, %15

	6625 ; CHECK-NEXT: %23 = xor <2 x i64> %10, %16

	6626 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6627 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6628 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6629 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6630 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6631 ; CHECK-NEXT: ret <2 x i64> %18

	6632

	6633 define <12 x i64> @or_binop_12xi64(<12 x i64>, <12 x i64>) {

	6634 %3 = or <12 x i64> %0, %1

	6635 ret <12 x i64> %3

	6636 }

	6637 ; CHECK-LABEL: define <2 x i64> @or_binop_12xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferencea ble(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6638 ; CHECK-NEXT: %18 = or <2 x i64> %5, %11

	6639 ; CHECK-NEXT: %19 = or <2 x i64> %6, %12

	6640 ; CHECK-NEXT: %20 = or <2 x i64> %7, %13

	6641 ; CHECK-NEXT: %21 = or <2 x i64> %8, %14

	6642 ; CHECK-NEXT: %22 = or <2 x i64> %9, %15

	6643 ; CHECK-NEXT: %23 = or <2 x i64> %10, %16

	6644 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6645 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6646 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6647 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6648 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6649 ; CHECK-NEXT: ret <2 x i64> %18

	6650

	6651 define <12 x i64> @urem_binop_12xi64(<12 x i64>, <12 x i64>) {

	6652 %3 = urem <12 x i64> %0, %1

	6653 ret <12 x i64> %3

	6654 }

	6655 ; CHECK-LABEL: define <2 x i64> @urem_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6656 ; CHECK-NEXT: %18 = urem <2 x i64> %5, %11

	6657 ; CHECK-NEXT: %19 = urem <2 x i64> %6, %12

	6658 ; CHECK-NEXT: %20 = urem <2 x i64> %7, %13

	6659 ; CHECK-NEXT: %21 = urem <2 x i64> %8, %14

	6660 ; CHECK-NEXT: %22 = urem <2 x i64> %9, %15

	6661 ; CHECK-NEXT: %23 = urem <2 x i64> %10, %16

	6662 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6663 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6664 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6665 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6666 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6667 ; CHECK-NEXT: ret <2 x i64> %18

	6668

	6669 define <12 x i64> @srem_binop_12xi64(<12 x i64>, <12 x i64>) {

	6670 %3 = srem <12 x i64> %0, %1

	6671 ret <12 x i64> %3

	6672 }

	6673 ; CHECK-LABEL: define <2 x i64> @srem_binop_12xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	6674 ; CHECK-NEXT: %18 = srem <2 x i64> %5, %11

	6675 ; CHECK-NEXT: %19 = srem <2 x i64> %6, %12

	6676 ; CHECK-NEXT: %20 = srem <2 x i64> %7, %13

	6677 ; CHECK-NEXT: %21 = srem <2 x i64> %8, %14

	6678 ; CHECK-NEXT: %22 = srem <2 x i64> %9, %15

	6679 ; CHECK-NEXT: %23 = srem <2 x i64> %10, %16

	6680 ; CHECK-NEXT: store <2 x i64> %19, <2 x i64>* %0, align 16

	6681 ; CHECK-NEXT: store <2 x i64> %20, <2 x i64>* %1, align 16

	6682 ; CHECK-NEXT: store <2 x i64> %21, <2 x i64>* %2, align 16

	6683 ; CHECK-NEXT: store <2 x i64> %22, <2 x i64>* %3, align 16

	6684 ; CHECK-NEXT: store <2 x i64> %23, <2 x i64>* %4, align 16

	6685 ; CHECK-NEXT: ret <2 x i64> %18

	6686

	6687 define <16 x i8> @add_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {

	6688 %3 = add nuw <16 x i8> %0, %1

	6689 ret <16 x i8> %3

	6690 }

	6691 ; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nuw(<16 x i8>, <16 x i8>)

	6692 ; CHECK-NEXT: %3 = add nuw <16 x i8> %0, %1

	6693 ; CHECK-NEXT: ret <16 x i8> %3

	6694

	6695 define <16 x i8> @add_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {

	6696 %3 = add nsw <16 x i8> %0, %1

	6697 ret <16 x i8> %3

	6698 }

	6699 ; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nsw(<16 x i8>, <16 x i8>)

	6700 ; CHECK-NEXT: %3 = add nsw <16 x i8> %0, %1

	6701 ; CHECK-NEXT: ret <16 x i8> %3

	6702

	6703 define <16 x i8> @add_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {

	6704 %3 = add nuw nsw <16 x i8> %0, %1

	6705 ret <16 x i8> %3

	6706 }

	6707 ; CHECK-LABEL: define <16 x i8> @add_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	6708 ; CHECK-NEXT: %3 = add nuw nsw <16 x i8> %0, %1

	6709 ; CHECK-NEXT: ret <16 x i8> %3

	6710

	6711 define <16 x i8> @sub_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {

	6712 %3 = sub nuw <16 x i8> %0, %1

	6713 ret <16 x i8> %3

	6714 }

	6715 ; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nuw(<16 x i8>, <16 x i8>)

	6716 ; CHECK-NEXT: %3 = sub nuw <16 x i8> %0, %1

	6717 ; CHECK-NEXT: ret <16 x i8> %3

	6718

	6719 define <16 x i8> @sub_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {

	6720 %3 = sub nsw <16 x i8> %0, %1

	6721 ret <16 x i8> %3

	6722 }

	6723 ; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nsw(<16 x i8>, <16 x i8>)

	6724 ; CHECK-NEXT: %3 = sub nsw <16 x i8> %0, %1

	6725 ; CHECK-NEXT: ret <16 x i8> %3

	6726

	6727 define <16 x i8> @sub_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {

	6728 %3 = sub nuw nsw <16 x i8> %0, %1

	6729 ret <16 x i8> %3

	6730 }

	6731 ; CHECK-LABEL: define <16 x i8> @sub_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	6732 ; CHECK-NEXT: %3 = sub nuw nsw <16 x i8> %0, %1

	6733 ; CHECK-NEXT: ret <16 x i8> %3

	6734

	6735 define <16 x i8> @mul_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {

	6736 %3 = mul nuw <16 x i8> %0, %1

	6737 ret <16 x i8> %3

	6738 }

	6739 ; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nuw(<16 x i8>, <16 x i8>)

	6740 ; CHECK-NEXT: %3 = mul nuw <16 x i8> %0, %1

	6741 ; CHECK-NEXT: ret <16 x i8> %3

	6742

	6743 define <16 x i8> @mul_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {

	6744 %3 = mul nsw <16 x i8> %0, %1

	6745 ret <16 x i8> %3

	6746 }

	6747 ; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nsw(<16 x i8>, <16 x i8>)

	6748 ; CHECK-NEXT: %3 = mul nsw <16 x i8> %0, %1

	6749 ; CHECK-NEXT: ret <16 x i8> %3

	6750

	6751 define <16 x i8> @mul_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {

	6752 %3 = mul nuw nsw <16 x i8> %0, %1

	6753 ret <16 x i8> %3

	6754 }

	6755 ; CHECK-LABEL: define <16 x i8> @mul_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	6756 ; CHECK-NEXT: %3 = mul nuw nsw <16 x i8> %0, %1

	6757 ; CHECK-NEXT: ret <16 x i8> %3

	6758

	6759 define <16 x i8> @shl_binop_16xi8_nuw(<16 x i8>, <16 x i8>) {

	6760 %3 = shl nuw <16 x i8> %0, %1

	6761 ret <16 x i8> %3

	6762 }

	6763 ; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nuw(<16 x i8>, <16 x i8>)

	6764 ; CHECK-NEXT: %3 = shl nuw <16 x i8> %0, %1

	6765 ; CHECK-NEXT: ret <16 x i8> %3

	6766

	6767 define <16 x i8> @shl_binop_16xi8_nsw(<16 x i8>, <16 x i8>) {

	6768 %3 = shl nsw <16 x i8> %0, %1

	6769 ret <16 x i8> %3

	6770 }

	6771 ; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nsw(<16 x i8>, <16 x i8>)

	6772 ; CHECK-NEXT: %3 = shl nsw <16 x i8> %0, %1

	6773 ; CHECK-NEXT: ret <16 x i8> %3

	6774

	6775 define <16 x i8> @shl_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>) {

	6776 %3 = shl nuw nsw <16 x i8> %0, %1

	6777 ret <16 x i8> %3

	6778 }

	6779 ; CHECK-LABEL: define <16 x i8> @shl_binop_16xi8_nuw_nsw(<16 x i8>, <16 x i8>)

	6780 ; CHECK-NEXT: %3 = shl nuw nsw <16 x i8> %0, %1

	6781 ; CHECK-NEXT: ret <16 x i8> %3

	6782

	6783 define <16 x i8> @udiv_binop_16xi8(<16 x i8>, <16 x i8>) {

	6784 %3 = udiv <16 x i8> %0, %1

	6785 ret <16 x i8> %3

	6786 }

	6787 ; CHECK-LABEL: define <16 x i8> @udiv_binop_16xi8(<16 x i8>, <16 x i8>)

	6788 ; CHECK-NEXT: %3 = udiv <16 x i8> %0, %1

	6789 ; CHECK-NEXT: ret <16 x i8> %3

	6790

	6791 define <16 x i8> @udiv_binop_16xi8_exact(<16 x i8>, <16 x i8>) {

	6792 %3 = udiv exact <16 x i8> %0, %1

	6793 ret <16 x i8> %3

	6794 }

	6795 ; CHECK-LABEL: define <16 x i8> @udiv_binop_16xi8_exact(<16 x i8>, <16 x i8>)

	6796 ; CHECK-NEXT: %3 = udiv exact <16 x i8> %0, %1

	6797 ; CHECK-NEXT: ret <16 x i8> %3

	6798

	6799 define <16 x i8> @sdiv_binop_16xi8(<16 x i8>, <16 x i8>) {

	6800 %3 = sdiv <16 x i8> %0, %1

	6801 ret <16 x i8> %3

	6802 }

	6803 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_16xi8(<16 x i8>, <16 x i8>)

	6804 ; CHECK-NEXT: %3 = sdiv <16 x i8> %0, %1

	6805 ; CHECK-NEXT: ret <16 x i8> %3

	6806

	6807 define <16 x i8> @sdiv_binop_16xi8_exact(<16 x i8>, <16 x i8>) {

	6808 %3 = sdiv exact <16 x i8> %0, %1

	6809 ret <16 x i8> %3

	6810 }

	6811 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_16xi8_exact(<16 x i8>, <16 x i8>)

	6812 ; CHECK-NEXT: %3 = sdiv exact <16 x i8> %0, %1

	6813 ; CHECK-NEXT: ret <16 x i8> %3

	6814

	6815 define <16 x i8> @lshr_binop_16xi8(<16 x i8>, <16 x i8>) {

	6816 %3 = lshr <16 x i8> %0, %1

	6817 ret <16 x i8> %3

	6818 }

	6819 ; CHECK-LABEL: define <16 x i8> @lshr_binop_16xi8(<16 x i8>, <16 x i8>)

	6820 ; CHECK-NEXT: %3 = lshr <16 x i8> %0, %1

	6821 ; CHECK-NEXT: ret <16 x i8> %3

	6822

	6823 define <16 x i8> @lshr_binop_16xi8_exact(<16 x i8>, <16 x i8>) {

	6824 %3 = lshr exact <16 x i8> %0, %1

	6825 ret <16 x i8> %3

	6826 }

	6827 ; CHECK-LABEL: define <16 x i8> @lshr_binop_16xi8_exact(<16 x i8>, <16 x i8>)

	6828 ; CHECK-NEXT: %3 = lshr exact <16 x i8> %0, %1

	6829 ; CHECK-NEXT: ret <16 x i8> %3

	6830

	6831 define <16 x i8> @ashr_binop_16xi8(<16 x i8>, <16 x i8>) {

	6832 %3 = ashr <16 x i8> %0, %1

	6833 ret <16 x i8> %3

	6834 }

	6835 ; CHECK-LABEL: define <16 x i8> @ashr_binop_16xi8(<16 x i8>, <16 x i8>)

	6836 ; CHECK-NEXT: %3 = ashr <16 x i8> %0, %1

	6837 ; CHECK-NEXT: ret <16 x i8> %3

	6838

	6839 define <16 x i8> @ashr_binop_16xi8_exact(<16 x i8>, <16 x i8>) {

	6840 %3 = ashr exact <16 x i8> %0, %1

	6841 ret <16 x i8> %3

	6842 }

	6843 ; CHECK-LABEL: define <16 x i8> @ashr_binop_16xi8_exact(<16 x i8>, <16 x i8>)

	6844 ; CHECK-NEXT: %3 = ashr exact <16 x i8> %0, %1

	6845 ; CHECK-NEXT: ret <16 x i8> %3

	6846

	6847 define <16 x i8> @and_binop_16xi8(<16 x i8>, <16 x i8>) {

	6848 %3 = and <16 x i8> %0, %1

	6849 ret <16 x i8> %3

	6850 }

	6851 ; CHECK-LABEL: define <16 x i8> @and_binop_16xi8(<16 x i8>, <16 x i8>)

	6852 ; CHECK-NEXT: %3 = and <16 x i8> %0, %1

	6853 ; CHECK-NEXT: ret <16 x i8> %3

	6854

	6855 define <16 x i8> @xor_binop_16xi8(<16 x i8>, <16 x i8>) {

	6856 %3 = xor <16 x i8> %0, %1

	6857 ret <16 x i8> %3

	6858 }

	6859 ; CHECK-LABEL: define <16 x i8> @xor_binop_16xi8(<16 x i8>, <16 x i8>)

	6860 ; CHECK-NEXT: %3 = xor <16 x i8> %0, %1

	6861 ; CHECK-NEXT: ret <16 x i8> %3

	6862

	6863 define <16 x i8> @or_binop_16xi8(<16 x i8>, <16 x i8>) {

	6864 %3 = or <16 x i8> %0, %1

	6865 ret <16 x i8> %3

	6866 }

	6867 ; CHECK-LABEL: define <16 x i8> @or_binop_16xi8(<16 x i8>, <16 x i8>)

	6868 ; CHECK-NEXT: %3 = or <16 x i8> %0, %1

	6869 ; CHECK-NEXT: ret <16 x i8> %3

	6870

	6871 define <16 x i8> @urem_binop_16xi8(<16 x i8>, <16 x i8>) {

	6872 %3 = urem <16 x i8> %0, %1

	6873 ret <16 x i8> %3

	6874 }

	6875 ; CHECK-LABEL: define <16 x i8> @urem_binop_16xi8(<16 x i8>, <16 x i8>)

	6876 ; CHECK-NEXT: %3 = urem <16 x i8> %0, %1

	6877 ; CHECK-NEXT: ret <16 x i8> %3

	6878

	6879 define <16 x i8> @srem_binop_16xi8(<16 x i8>, <16 x i8>) {

	6880 %3 = srem <16 x i8> %0, %1

	6881 ret <16 x i8> %3

	6882 }

	6883 ; CHECK-LABEL: define <16 x i8> @srem_binop_16xi8(<16 x i8>, <16 x i8>)

	6884 ; CHECK-NEXT: %3 = srem <16 x i8> %0, %1

	6885 ; CHECK-NEXT: ret <16 x i8> %3

	6886

	6887 define <16 x i16> @add_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {

	6888 %3 = add nuw <16 x i16> %0, %1

	6889 ret <16 x i16> %3

	6890 }

	6891 ; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6892 ; CHECK-NEXT: %6 = add nuw <8 x i16> %1, %3

	6893 ; CHECK-NEXT: %7 = add nuw <8 x i16> %2, %4

	6894 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6895 ; CHECK-NEXT: ret <8 x i16> %6

	6896

	6897 define <16 x i16> @add_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {

	6898 %3 = add nsw <16 x i16> %0, %1

	6899 ret <16 x i16> %3

	6900 }

	6901 ; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6902 ; CHECK-NEXT: %6 = add nsw <8 x i16> %1, %3

	6903 ; CHECK-NEXT: %7 = add nsw <8 x i16> %2, %4

	6904 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6905 ; CHECK-NEXT: ret <8 x i16> %6

	6906

	6907 define <16 x i16> @add_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {

	6908 %3 = add nuw nsw <16 x i16> %0, %1

	6909 ret <16 x i16> %3

	6910 }

	6911 ; CHECK-LABEL: define <8 x i16> @add_binop_16xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6912 ; CHECK-NEXT: %6 = add nuw nsw <8 x i16> %1, %3

	6913 ; CHECK-NEXT: %7 = add nuw nsw <8 x i16> %2, %4

	6914 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6915 ; CHECK-NEXT: ret <8 x i16> %6

	6916

	6917 define <16 x i16> @sub_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {

	6918 %3 = sub nuw <16 x i16> %0, %1

	6919 ret <16 x i16> %3

	6920 }

	6921 ; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6922 ; CHECK-NEXT: %6 = sub nuw <8 x i16> %1, %3

	6923 ; CHECK-NEXT: %7 = sub nuw <8 x i16> %2, %4

	6924 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6925 ; CHECK-NEXT: ret <8 x i16> %6

	6926

	6927 define <16 x i16> @sub_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {

	6928 %3 = sub nsw <16 x i16> %0, %1

	6929 ret <16 x i16> %3

	6930 }

	6931 ; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6932 ; CHECK-NEXT: %6 = sub nsw <8 x i16> %1, %3

	6933 ; CHECK-NEXT: %7 = sub nsw <8 x i16> %2, %4

	6934 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6935 ; CHECK-NEXT: ret <8 x i16> %6

	6936

	6937 define <16 x i16> @sub_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {

	6938 %3 = sub nuw nsw <16 x i16> %0, %1

	6939 ret <16 x i16> %3

	6940 }

	6941 ; CHECK-LABEL: define <8 x i16> @sub_binop_16xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6942 ; CHECK-NEXT: %6 = sub nuw nsw <8 x i16> %1, %3

	6943 ; CHECK-NEXT: %7 = sub nuw nsw <8 x i16> %2, %4

	6944 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6945 ; CHECK-NEXT: ret <8 x i16> %6

	6946

	6947 define <16 x i16> @mul_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {

	6948 %3 = mul nuw <16 x i16> %0, %1

	6949 ret <16 x i16> %3

	6950 }

	6951 ; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6952 ; CHECK-NEXT: %6 = mul nuw <8 x i16> %1, %3

	6953 ; CHECK-NEXT: %7 = mul nuw <8 x i16> %2, %4

	6954 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6955 ; CHECK-NEXT: ret <8 x i16> %6

	6956

	6957 define <16 x i16> @mul_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {

	6958 %3 = mul nsw <16 x i16> %0, %1

	6959 ret <16 x i16> %3

	6960 }

	6961 ; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6962 ; CHECK-NEXT: %6 = mul nsw <8 x i16> %1, %3

	6963 ; CHECK-NEXT: %7 = mul nsw <8 x i16> %2, %4

	6964 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6965 ; CHECK-NEXT: ret <8 x i16> %6

	6966

	6967 define <16 x i16> @mul_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {

	6968 %3 = mul nuw nsw <16 x i16> %0, %1

	6969 ret <16 x i16> %3

	6970 }

	6971 ; CHECK-LABEL: define <8 x i16> @mul_binop_16xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6972 ; CHECK-NEXT: %6 = mul nuw nsw <8 x i16> %1, %3

	6973 ; CHECK-NEXT: %7 = mul nuw nsw <8 x i16> %2, %4

	6974 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6975 ; CHECK-NEXT: ret <8 x i16> %6

	6976

	6977 define <16 x i16> @shl_binop_16xi16_nuw(<16 x i16>, <16 x i16>) {

	6978 %3 = shl nuw <16 x i16> %0, %1

	6979 ret <16 x i16> %3

	6980 }

	6981 ; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6982 ; CHECK-NEXT: %6 = shl nuw <8 x i16> %1, %3

	6983 ; CHECK-NEXT: %7 = shl nuw <8 x i16> %2, %4

	6984 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6985 ; CHECK-NEXT: ret <8 x i16> %6

	6986

	6987 define <16 x i16> @shl_binop_16xi16_nsw(<16 x i16>, <16 x i16>) {

	6988 %3 = shl nsw <16 x i16> %0, %1

	6989 ret <16 x i16> %3

	6990 }

	6991 ; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	6992 ; CHECK-NEXT: %6 = shl nsw <8 x i16> %1, %3

	6993 ; CHECK-NEXT: %7 = shl nsw <8 x i16> %2, %4

	6994 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	6995 ; CHECK-NEXT: ret <8 x i16> %6

	6996

	6997 define <16 x i16> @shl_binop_16xi16_nuw_nsw(<16 x i16>, <16 x i16>) {

	6998 %3 = shl nuw nsw <16 x i16> %0, %1

	6999 ret <16 x i16> %3

	7000 }

	7001 ; CHECK-LABEL: define <8 x i16> @shl_binop_16xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7002 ; CHECK-NEXT: %6 = shl nuw nsw <8 x i16> %1, %3

	7003 ; CHECK-NEXT: %7 = shl nuw nsw <8 x i16> %2, %4

	7004 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7005 ; CHECK-NEXT: ret <8 x i16> %6

	7006

	7007 define <16 x i16> @udiv_binop_16xi16(<16 x i16>, <16 x i16>) {

	7008 %3 = udiv <16 x i16> %0, %1

	7009 ret <16 x i16> %3

	7010 }

	7011 ; CHECK-LABEL: define <8 x i16> @udiv_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7012 ; CHECK-NEXT: %6 = udiv <8 x i16> %1, %3

	7013 ; CHECK-NEXT: %7 = udiv <8 x i16> %2, %4

	7014 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7015 ; CHECK-NEXT: ret <8 x i16> %6

	7016

	7017 define <16 x i16> @udiv_binop_16xi16_exact(<16 x i16>, <16 x i16>) {

	7018 %3 = udiv exact <16 x i16> %0, %1

	7019 ret <16 x i16> %3

	7020 }

	7021 ; CHECK-LABEL: define <8 x i16> @udiv_binop_16xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7022 ; CHECK-NEXT: %6 = udiv exact <8 x i16> %1, %3

	7023 ; CHECK-NEXT: %7 = udiv exact <8 x i16> %2, %4

	7024 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7025 ; CHECK-NEXT: ret <8 x i16> %6

	7026

	7027 define <16 x i16> @sdiv_binop_16xi16(<16 x i16>, <16 x i16>) {

	7028 %3 = sdiv <16 x i16> %0, %1

	7029 ret <16 x i16> %3

	7030 }

	7031 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7032 ; CHECK-NEXT: %6 = sdiv <8 x i16> %1, %3

	7033 ; CHECK-NEXT: %7 = sdiv <8 x i16> %2, %4

	7034 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7035 ; CHECK-NEXT: ret <8 x i16> %6

	7036

	7037 define <16 x i16> @sdiv_binop_16xi16_exact(<16 x i16>, <16 x i16>) {

	7038 %3 = sdiv exact <16 x i16> %0, %1

	7039 ret <16 x i16> %3

	7040 }

	7041 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_16xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7042 ; CHECK-NEXT: %6 = sdiv exact <8 x i16> %1, %3

	7043 ; CHECK-NEXT: %7 = sdiv exact <8 x i16> %2, %4

	7044 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7045 ; CHECK-NEXT: ret <8 x i16> %6

	7046

	7047 define <16 x i16> @lshr_binop_16xi16(<16 x i16>, <16 x i16>) {

	7048 %3 = lshr <16 x i16> %0, %1

	7049 ret <16 x i16> %3

	7050 }

	7051 ; CHECK-LABEL: define <8 x i16> @lshr_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7052 ; CHECK-NEXT: %6 = lshr <8 x i16> %1, %3

	7053 ; CHECK-NEXT: %7 = lshr <8 x i16> %2, %4

	7054 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7055 ; CHECK-NEXT: ret <8 x i16> %6

	7056

	7057 define <16 x i16> @lshr_binop_16xi16_exact(<16 x i16>, <16 x i16>) {

	7058 %3 = lshr exact <16 x i16> %0, %1

	7059 ret <16 x i16> %3

	7060 }

	7061 ; CHECK-LABEL: define <8 x i16> @lshr_binop_16xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7062 ; CHECK-NEXT: %6 = lshr exact <8 x i16> %1, %3

	7063 ; CHECK-NEXT: %7 = lshr exact <8 x i16> %2, %4

	7064 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7065 ; CHECK-NEXT: ret <8 x i16> %6

	7066

	7067 define <16 x i16> @ashr_binop_16xi16(<16 x i16>, <16 x i16>) {

	7068 %3 = ashr <16 x i16> %0, %1

	7069 ret <16 x i16> %3

	7070 }

	7071 ; CHECK-LABEL: define <8 x i16> @ashr_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7072 ; CHECK-NEXT: %6 = ashr <8 x i16> %1, %3

	7073 ; CHECK-NEXT: %7 = ashr <8 x i16> %2, %4

	7074 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7075 ; CHECK-NEXT: ret <8 x i16> %6

	7076

	7077 define <16 x i16> @ashr_binop_16xi16_exact(<16 x i16>, <16 x i16>) {

	7078 %3 = ashr exact <16 x i16> %0, %1

	7079 ret <16 x i16> %3

	7080 }

	7081 ; CHECK-LABEL: define <8 x i16> @ashr_binop_16xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7082 ; CHECK-NEXT: %6 = ashr exact <8 x i16> %1, %3

	7083 ; CHECK-NEXT: %7 = ashr exact <8 x i16> %2, %4

	7084 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7085 ; CHECK-NEXT: ret <8 x i16> %6

	7086

	7087 define <16 x i16> @and_binop_16xi16(<16 x i16>, <16 x i16>) {

	7088 %3 = and <16 x i16> %0, %1

	7089 ret <16 x i16> %3

	7090 }

	7091 ; CHECK-LABEL: define <8 x i16> @and_binop_16xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7092 ; CHECK-NEXT: %6 = and <8 x i16> %1, %3

	7093 ; CHECK-NEXT: %7 = and <8 x i16> %2, %4

	7094 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7095 ; CHECK-NEXT: ret <8 x i16> %6

	7096

	7097 define <16 x i16> @xor_binop_16xi16(<16 x i16>, <16 x i16>) {

	7098 %3 = xor <16 x i16> %0, %1

	7099 ret <16 x i16> %3

	7100 }

	7101 ; CHECK-LABEL: define <8 x i16> @xor_binop_16xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7102 ; CHECK-NEXT: %6 = xor <8 x i16> %1, %3

	7103 ; CHECK-NEXT: %7 = xor <8 x i16> %2, %4

	7104 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7105 ; CHECK-NEXT: ret <8 x i16> %6

	7106

	7107 define <16 x i16> @or_binop_16xi16(<16 x i16>, <16 x i16>) {

	7108 %3 = or <16 x i16> %0, %1

	7109 ret <16 x i16> %3

	7110 }

	7111 ; CHECK-LABEL: define <8 x i16> @or_binop_16xi16(<8 x i16>* nocapture nonnull de referenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7112 ; CHECK-NEXT: %6 = or <8 x i16> %1, %3

	7113 ; CHECK-NEXT: %7 = or <8 x i16> %2, %4

	7114 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7115 ; CHECK-NEXT: ret <8 x i16> %6

	7116

	7117 define <16 x i16> @urem_binop_16xi16(<16 x i16>, <16 x i16>) {

	7118 %3 = urem <16 x i16> %0, %1

	7119 ret <16 x i16> %3

	7120 }

	7121 ; CHECK-LABEL: define <8 x i16> @urem_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7122 ; CHECK-NEXT: %6 = urem <8 x i16> %1, %3

	7123 ; CHECK-NEXT: %7 = urem <8 x i16> %2, %4

	7124 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7125 ; CHECK-NEXT: ret <8 x i16> %6

	7126

	7127 define <16 x i16> @srem_binop_16xi16(<16 x i16>, <16 x i16>) {

	7128 %3 = srem <16 x i16> %0, %1

	7129 ret <16 x i16> %3

	7130 }

	7131 ; CHECK-LABEL: define <8 x i16> @srem_binop_16xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	7132 ; CHECK-NEXT: %6 = srem <8 x i16> %1, %3

	7133 ; CHECK-NEXT: %7 = srem <8 x i16> %2, %4

	7134 ; CHECK-NEXT: store <8 x i16> %7, <8 x i16>* %0, align 16

	7135 ; CHECK-NEXT: ret <8 x i16> %6

	7136

	7137 define <16 x i32> @add_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {

	7138 %3 = add nuw <16 x i32> %0, %1

	7139 ret <16 x i32> %3

	7140 }

	7141 ; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7142 ; CHECK-NEXT: %12 = add nuw <4 x i32> %3, %7

	7143 ; CHECK-NEXT: %13 = add nuw <4 x i32> %4, %8

	7144 ; CHECK-NEXT: %14 = add nuw <4 x i32> %5, %9

	7145 ; CHECK-NEXT: %15 = add nuw <4 x i32> %6, %10

	7146 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7147 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7148 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7149 ; CHECK-NEXT: ret <4 x i32> %12

	7150

	7151 define <16 x i32> @add_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {

	7152 %3 = add nsw <16 x i32> %0, %1

	7153 ret <16 x i32> %3

	7154 }

	7155 ; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7156 ; CHECK-NEXT: %12 = add nsw <4 x i32> %3, %7

	7157 ; CHECK-NEXT: %13 = add nsw <4 x i32> %4, %8

	7158 ; CHECK-NEXT: %14 = add nsw <4 x i32> %5, %9

	7159 ; CHECK-NEXT: %15 = add nsw <4 x i32> %6, %10

	7160 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7161 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7162 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7163 ; CHECK-NEXT: ret <4 x i32> %12

	7164

	7165 define <16 x i32> @add_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {

	7166 %3 = add nuw nsw <16 x i32> %0, %1

	7167 ret <16 x i32> %3

	7168 }

	7169 ; CHECK-LABEL: define <4 x i32> @add_binop_16xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7170 ; CHECK-NEXT: %12 = add nuw nsw <4 x i32> %3, %7

	7171 ; CHECK-NEXT: %13 = add nuw nsw <4 x i32> %4, %8

	7172 ; CHECK-NEXT: %14 = add nuw nsw <4 x i32> %5, %9

	7173 ; CHECK-NEXT: %15 = add nuw nsw <4 x i32> %6, %10

	7174 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7175 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7176 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7177 ; CHECK-NEXT: ret <4 x i32> %12

	7178

	7179 define <16 x i32> @sub_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {

	7180 %3 = sub nuw <16 x i32> %0, %1

	7181 ret <16 x i32> %3

	7182 }

	7183 ; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7184 ; CHECK-NEXT: %12 = sub nuw <4 x i32> %3, %7

	7185 ; CHECK-NEXT: %13 = sub nuw <4 x i32> %4, %8

	7186 ; CHECK-NEXT: %14 = sub nuw <4 x i32> %5, %9

	7187 ; CHECK-NEXT: %15 = sub nuw <4 x i32> %6, %10

	7188 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7189 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7190 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7191 ; CHECK-NEXT: ret <4 x i32> %12

	7192

	7193 define <16 x i32> @sub_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {

	7194 %3 = sub nsw <16 x i32> %0, %1

	7195 ret <16 x i32> %3

	7196 }

	7197 ; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7198 ; CHECK-NEXT: %12 = sub nsw <4 x i32> %3, %7

	7199 ; CHECK-NEXT: %13 = sub nsw <4 x i32> %4, %8

	7200 ; CHECK-NEXT: %14 = sub nsw <4 x i32> %5, %9

	7201 ; CHECK-NEXT: %15 = sub nsw <4 x i32> %6, %10

	7202 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7203 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7204 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7205 ; CHECK-NEXT: ret <4 x i32> %12

	7206

	7207 define <16 x i32> @sub_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {

	7208 %3 = sub nuw nsw <16 x i32> %0, %1

	7209 ret <16 x i32> %3

	7210 }

	7211 ; CHECK-LABEL: define <4 x i32> @sub_binop_16xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7212 ; CHECK-NEXT: %12 = sub nuw nsw <4 x i32> %3, %7

	7213 ; CHECK-NEXT: %13 = sub nuw nsw <4 x i32> %4, %8

	7214 ; CHECK-NEXT: %14 = sub nuw nsw <4 x i32> %5, %9

	7215 ; CHECK-NEXT: %15 = sub nuw nsw <4 x i32> %6, %10

	7216 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7217 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7218 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7219 ; CHECK-NEXT: ret <4 x i32> %12

	7220

	7221 define <16 x i32> @mul_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {

	7222 %3 = mul nuw <16 x i32> %0, %1

	7223 ret <16 x i32> %3

	7224 }

	7225 ; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7226 ; CHECK-NEXT: %12 = mul nuw <4 x i32> %3, %7

	7227 ; CHECK-NEXT: %13 = mul nuw <4 x i32> %4, %8

	7228 ; CHECK-NEXT: %14 = mul nuw <4 x i32> %5, %9

	7229 ; CHECK-NEXT: %15 = mul nuw <4 x i32> %6, %10

	7230 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7231 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7232 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7233 ; CHECK-NEXT: ret <4 x i32> %12

	7234

	7235 define <16 x i32> @mul_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {

	7236 %3 = mul nsw <16 x i32> %0, %1

	7237 ret <16 x i32> %3

	7238 }

	7239 ; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7240 ; CHECK-NEXT: %12 = mul nsw <4 x i32> %3, %7

	7241 ; CHECK-NEXT: %13 = mul nsw <4 x i32> %4, %8

	7242 ; CHECK-NEXT: %14 = mul nsw <4 x i32> %5, %9

	7243 ; CHECK-NEXT: %15 = mul nsw <4 x i32> %6, %10

	7244 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7245 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7246 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7247 ; CHECK-NEXT: ret <4 x i32> %12

	7248

	7249 define <16 x i32> @mul_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {

	7250 %3 = mul nuw nsw <16 x i32> %0, %1

	7251 ret <16 x i32> %3

	7252 }

	7253 ; CHECK-LABEL: define <4 x i32> @mul_binop_16xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7254 ; CHECK-NEXT: %12 = mul nuw nsw <4 x i32> %3, %7

	7255 ; CHECK-NEXT: %13 = mul nuw nsw <4 x i32> %4, %8

	7256 ; CHECK-NEXT: %14 = mul nuw nsw <4 x i32> %5, %9

	7257 ; CHECK-NEXT: %15 = mul nuw nsw <4 x i32> %6, %10

	7258 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7259 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7260 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7261 ; CHECK-NEXT: ret <4 x i32> %12

	7262

	7263 define <16 x i32> @shl_binop_16xi32_nuw(<16 x i32>, <16 x i32>) {

	7264 %3 = shl nuw <16 x i32> %0, %1

	7265 ret <16 x i32> %3

	7266 }

	7267 ; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7268 ; CHECK-NEXT: %12 = shl nuw <4 x i32> %3, %7

	7269 ; CHECK-NEXT: %13 = shl nuw <4 x i32> %4, %8

	7270 ; CHECK-NEXT: %14 = shl nuw <4 x i32> %5, %9

	7271 ; CHECK-NEXT: %15 = shl nuw <4 x i32> %6, %10

	7272 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7273 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7274 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7275 ; CHECK-NEXT: ret <4 x i32> %12

	7276

	7277 define <16 x i32> @shl_binop_16xi32_nsw(<16 x i32>, <16 x i32>) {

	7278 %3 = shl nsw <16 x i32> %0, %1

	7279 ret <16 x i32> %3

	7280 }

	7281 ; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7282 ; CHECK-NEXT: %12 = shl nsw <4 x i32> %3, %7

	7283 ; CHECK-NEXT: %13 = shl nsw <4 x i32> %4, %8

	7284 ; CHECK-NEXT: %14 = shl nsw <4 x i32> %5, %9

	7285 ; CHECK-NEXT: %15 = shl nsw <4 x i32> %6, %10

	7286 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7287 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7288 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7289 ; CHECK-NEXT: ret <4 x i32> %12

	7290

	7291 define <16 x i32> @shl_binop_16xi32_nuw_nsw(<16 x i32>, <16 x i32>) {

	7292 %3 = shl nuw nsw <16 x i32> %0, %1

	7293 ret <16 x i32> %3

	7294 }

	7295 ; CHECK-LABEL: define <4 x i32> @shl_binop_16xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7296 ; CHECK-NEXT: %12 = shl nuw nsw <4 x i32> %3, %7

	7297 ; CHECK-NEXT: %13 = shl nuw nsw <4 x i32> %4, %8

	7298 ; CHECK-NEXT: %14 = shl nuw nsw <4 x i32> %5, %9

	7299 ; CHECK-NEXT: %15 = shl nuw nsw <4 x i32> %6, %10

	7300 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7301 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7302 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7303 ; CHECK-NEXT: ret <4 x i32> %12

	7304

	7305 define <16 x i32> @udiv_binop_16xi32(<16 x i32>, <16 x i32>) {

	7306 %3 = udiv <16 x i32> %0, %1

	7307 ret <16 x i32> %3

	7308 }

	7309 ; CHECK-LABEL: define <4 x i32> @udiv_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7310 ; CHECK-NEXT: %12 = udiv <4 x i32> %3, %7

	7311 ; CHECK-NEXT: %13 = udiv <4 x i32> %4, %8

	7312 ; CHECK-NEXT: %14 = udiv <4 x i32> %5, %9

	7313 ; CHECK-NEXT: %15 = udiv <4 x i32> %6, %10

	7314 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7315 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7316 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7317 ; CHECK-NEXT: ret <4 x i32> %12

	7318

	7319 define <16 x i32> @udiv_binop_16xi32_exact(<16 x i32>, <16 x i32>) {

	7320 %3 = udiv exact <16 x i32> %0, %1

	7321 ret <16 x i32> %3

	7322 }

	7323 ; CHECK-LABEL: define <4 x i32> @udiv_binop_16xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7324 ; CHECK-NEXT: %12 = udiv exact <4 x i32> %3, %7

	7325 ; CHECK-NEXT: %13 = udiv exact <4 x i32> %4, %8

	7326 ; CHECK-NEXT: %14 = udiv exact <4 x i32> %5, %9

	7327 ; CHECK-NEXT: %15 = udiv exact <4 x i32> %6, %10

	7328 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7329 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7330 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7331 ; CHECK-NEXT: ret <4 x i32> %12

	7332

	7333 define <16 x i32> @sdiv_binop_16xi32(<16 x i32>, <16 x i32>) {

	7334 %3 = sdiv <16 x i32> %0, %1

	7335 ret <16 x i32> %3

	7336 }

	7337 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7338 ; CHECK-NEXT: %12 = sdiv <4 x i32> %3, %7

	7339 ; CHECK-NEXT: %13 = sdiv <4 x i32> %4, %8

	7340 ; CHECK-NEXT: %14 = sdiv <4 x i32> %5, %9

	7341 ; CHECK-NEXT: %15 = sdiv <4 x i32> %6, %10

	7342 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7343 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7344 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7345 ; CHECK-NEXT: ret <4 x i32> %12

	7346

	7347 define <16 x i32> @sdiv_binop_16xi32_exact(<16 x i32>, <16 x i32>) {

	7348 %3 = sdiv exact <16 x i32> %0, %1

	7349 ret <16 x i32> %3

	7350 }

	7351 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_16xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7352 ; CHECK-NEXT: %12 = sdiv exact <4 x i32> %3, %7

	7353 ; CHECK-NEXT: %13 = sdiv exact <4 x i32> %4, %8

	7354 ; CHECK-NEXT: %14 = sdiv exact <4 x i32> %5, %9

	7355 ; CHECK-NEXT: %15 = sdiv exact <4 x i32> %6, %10

	7356 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7357 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7358 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7359 ; CHECK-NEXT: ret <4 x i32> %12

	7360

	7361 define <16 x i32> @lshr_binop_16xi32(<16 x i32>, <16 x i32>) {

	7362 %3 = lshr <16 x i32> %0, %1

	7363 ret <16 x i32> %3

	7364 }

	7365 ; CHECK-LABEL: define <4 x i32> @lshr_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7366 ; CHECK-NEXT: %12 = lshr <4 x i32> %3, %7

	7367 ; CHECK-NEXT: %13 = lshr <4 x i32> %4, %8

	7368 ; CHECK-NEXT: %14 = lshr <4 x i32> %5, %9

	7369 ; CHECK-NEXT: %15 = lshr <4 x i32> %6, %10

	7370 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7371 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7372 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7373 ; CHECK-NEXT: ret <4 x i32> %12

	7374

	7375 define <16 x i32> @lshr_binop_16xi32_exact(<16 x i32>, <16 x i32>) {

	7376 %3 = lshr exact <16 x i32> %0, %1

	7377 ret <16 x i32> %3

	7378 }

	7379 ; CHECK-LABEL: define <4 x i32> @lshr_binop_16xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7380 ; CHECK-NEXT: %12 = lshr exact <4 x i32> %3, %7

	7381 ; CHECK-NEXT: %13 = lshr exact <4 x i32> %4, %8

	7382 ; CHECK-NEXT: %14 = lshr exact <4 x i32> %5, %9

	7383 ; CHECK-NEXT: %15 = lshr exact <4 x i32> %6, %10

	7384 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7385 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7386 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7387 ; CHECK-NEXT: ret <4 x i32> %12

	7388

	7389 define <16 x i32> @ashr_binop_16xi32(<16 x i32>, <16 x i32>) {

	7390 %3 = ashr <16 x i32> %0, %1

	7391 ret <16 x i32> %3

	7392 }

	7393 ; CHECK-LABEL: define <4 x i32> @ashr_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7394 ; CHECK-NEXT: %12 = ashr <4 x i32> %3, %7

	7395 ; CHECK-NEXT: %13 = ashr <4 x i32> %4, %8

	7396 ; CHECK-NEXT: %14 = ashr <4 x i32> %5, %9

	7397 ; CHECK-NEXT: %15 = ashr <4 x i32> %6, %10

	7398 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7399 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7400 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7401 ; CHECK-NEXT: ret <4 x i32> %12

	7402

	7403 define <16 x i32> @ashr_binop_16xi32_exact(<16 x i32>, <16 x i32>) {

	7404 %3 = ashr exact <16 x i32> %0, %1

	7405 ret <16 x i32> %3

	7406 }

	7407 ; CHECK-LABEL: define <4 x i32> @ashr_binop_16xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7408 ; CHECK-NEXT: %12 = ashr exact <4 x i32> %3, %7

	7409 ; CHECK-NEXT: %13 = ashr exact <4 x i32> %4, %8

	7410 ; CHECK-NEXT: %14 = ashr exact <4 x i32> %5, %9

	7411 ; CHECK-NEXT: %15 = ashr exact <4 x i32> %6, %10

	7412 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7413 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7414 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7415 ; CHECK-NEXT: ret <4 x i32> %12

	7416

	7417 define <16 x i32> @and_binop_16xi32(<16 x i32>, <16 x i32>) {

	7418 %3 = and <16 x i32> %0, %1

	7419 ret <16 x i32> %3

	7420 }

	7421 ; CHECK-LABEL: define <4 x i32> @and_binop_16xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7422 ; CHECK-NEXT: %12 = and <4 x i32> %3, %7

	7423 ; CHECK-NEXT: %13 = and <4 x i32> %4, %8

	7424 ; CHECK-NEXT: %14 = and <4 x i32> %5, %9

	7425 ; CHECK-NEXT: %15 = and <4 x i32> %6, %10

	7426 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7427 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7428 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7429 ; CHECK-NEXT: ret <4 x i32> %12

	7430

	7431 define <16 x i32> @xor_binop_16xi32(<16 x i32>, <16 x i32>) {

	7432 %3 = xor <16 x i32> %0, %1

	7433 ret <16 x i32> %3

	7434 }

	7435 ; CHECK-LABEL: define <4 x i32> @xor_binop_16xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7436 ; CHECK-NEXT: %12 = xor <4 x i32> %3, %7

	7437 ; CHECK-NEXT: %13 = xor <4 x i32> %4, %8

	7438 ; CHECK-NEXT: %14 = xor <4 x i32> %5, %9

	7439 ; CHECK-NEXT: %15 = xor <4 x i32> %6, %10

	7440 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7441 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7442 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7443 ; CHECK-NEXT: ret <4 x i32> %12

	7444

	7445 define <16 x i32> @or_binop_16xi32(<16 x i32>, <16 x i32>) {

	7446 %3 = or <16 x i32> %0, %1

	7447 ret <16 x i32> %3

	7448 }

	7449 ; CHECK-LABEL: define <4 x i32> @or_binop_16xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7450 ; CHECK-NEXT: %12 = or <4 x i32> %3, %7

	7451 ; CHECK-NEXT: %13 = or <4 x i32> %4, %8

	7452 ; CHECK-NEXT: %14 = or <4 x i32> %5, %9

	7453 ; CHECK-NEXT: %15 = or <4 x i32> %6, %10

	7454 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7455 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7456 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7457 ; CHECK-NEXT: ret <4 x i32> %12

	7458

	7459 define <16 x i32> @urem_binop_16xi32(<16 x i32>, <16 x i32>) {

	7460 %3 = urem <16 x i32> %0, %1

	7461 ret <16 x i32> %3

	7462 }

	7463 ; CHECK-LABEL: define <4 x i32> @urem_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7464 ; CHECK-NEXT: %12 = urem <4 x i32> %3, %7

	7465 ; CHECK-NEXT: %13 = urem <4 x i32> %4, %8

	7466 ; CHECK-NEXT: %14 = urem <4 x i32> %5, %9

	7467 ; CHECK-NEXT: %15 = urem <4 x i32> %6, %10

	7468 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7469 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7470 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7471 ; CHECK-NEXT: ret <4 x i32> %12

	7472

	7473 define <16 x i32> @srem_binop_16xi32(<16 x i32>, <16 x i32>) {

	7474 %3 = srem <16 x i32> %0, %1

	7475 ret <16 x i32> %3

	7476 }

	7477 ; CHECK-LABEL: define <4 x i32> @srem_binop_16xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i 32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	7478 ; CHECK-NEXT: %12 = srem <4 x i32> %3, %7

	7479 ; CHECK-NEXT: %13 = srem <4 x i32> %4, %8

	7480 ; CHECK-NEXT: %14 = srem <4 x i32> %5, %9

	7481 ; CHECK-NEXT: %15 = srem <4 x i32> %6, %10

	7482 ; CHECK-NEXT: store <4 x i32> %13, <4 x i32>* %0, align 16

	7483 ; CHECK-NEXT: store <4 x i32> %14, <4 x i32>* %1, align 16

	7484 ; CHECK-NEXT: store <4 x i32> %15, <4 x i32>* %2, align 16

	7485 ; CHECK-NEXT: ret <4 x i32> %12

	7486

	7487 define <16 x i64> @add_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {

	7488 %3 = add nuw <16 x i64> %0, %1

	7489 ret <16 x i64> %3

	7490 }

	7491 ; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7492 ; CHECK-NEXT: %24 = add nuw <2 x i64> %7, %15

	7493 ; CHECK-NEXT: %25 = add nuw <2 x i64> %8, %16

	7494 ; CHECK-NEXT: %26 = add nuw <2 x i64> %9, %17

	7495 ; CHECK-NEXT: %27 = add nuw <2 x i64> %10, %18

	7496 ; CHECK-NEXT: %28 = add nuw <2 x i64> %11, %19

	7497 ; CHECK-NEXT: %29 = add nuw <2 x i64> %12, %20

	7498 ; CHECK-NEXT: %30 = add nuw <2 x i64> %13, %21

	7499 ; CHECK-NEXT: %31 = add nuw <2 x i64> %14, %22

	7500 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7501 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7502 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7503 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7504 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7505 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7506 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7507 ; CHECK-NEXT: ret <2 x i64> %24

	7508

	7509 define <16 x i64> @add_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {

	7510 %3 = add nsw <16 x i64> %0, %1

	7511 ret <16 x i64> %3

	7512 }

	7513 ; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7514 ; CHECK-NEXT: %24 = add nsw <2 x i64> %7, %15

	7515 ; CHECK-NEXT: %25 = add nsw <2 x i64> %8, %16

	7516 ; CHECK-NEXT: %26 = add nsw <2 x i64> %9, %17

	7517 ; CHECK-NEXT: %27 = add nsw <2 x i64> %10, %18

	7518 ; CHECK-NEXT: %28 = add nsw <2 x i64> %11, %19

	7519 ; CHECK-NEXT: %29 = add nsw <2 x i64> %12, %20

	7520 ; CHECK-NEXT: %30 = add nsw <2 x i64> %13, %21

	7521 ; CHECK-NEXT: %31 = add nsw <2 x i64> %14, %22

	7522 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7523 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7524 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7525 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7526 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7527 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7528 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7529 ; CHECK-NEXT: ret <2 x i64> %24

	7530

	7531 define <16 x i64> @add_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {

	7532 %3 = add nuw nsw <16 x i64> %0, %1

	7533 ret <16 x i64> %3

	7534 }

	7535 ; CHECK-LABEL: define <2 x i64> @add_binop_16xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>)

	7536 ; CHECK-NEXT: %24 = add nuw nsw <2 x i64> %7, %15

	7537 ; CHECK-NEXT: %25 = add nuw nsw <2 x i64> %8, %16

	7538 ; CHECK-NEXT: %26 = add nuw nsw <2 x i64> %9, %17

	7539 ; CHECK-NEXT: %27 = add nuw nsw <2 x i64> %10, %18

	7540 ; CHECK-NEXT: %28 = add nuw nsw <2 x i64> %11, %19

	7541 ; CHECK-NEXT: %29 = add nuw nsw <2 x i64> %12, %20

	7542 ; CHECK-NEXT: %30 = add nuw nsw <2 x i64> %13, %21

	7543 ; CHECK-NEXT: %31 = add nuw nsw <2 x i64> %14, %22

	7544 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7545 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7546 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7547 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7548 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7549 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7550 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7551 ; CHECK-NEXT: ret <2 x i64> %24

	7552

	7553 define <16 x i64> @sub_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {

	7554 %3 = sub nuw <16 x i64> %0, %1

	7555 ret <16 x i64> %3

	7556 }

	7557 ; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7558 ; CHECK-NEXT: %24 = sub nuw <2 x i64> %7, %15

	7559 ; CHECK-NEXT: %25 = sub nuw <2 x i64> %8, %16

	7560 ; CHECK-NEXT: %26 = sub nuw <2 x i64> %9, %17

	7561 ; CHECK-NEXT: %27 = sub nuw <2 x i64> %10, %18

	7562 ; CHECK-NEXT: %28 = sub nuw <2 x i64> %11, %19

	7563 ; CHECK-NEXT: %29 = sub nuw <2 x i64> %12, %20

	7564 ; CHECK-NEXT: %30 = sub nuw <2 x i64> %13, %21

	7565 ; CHECK-NEXT: %31 = sub nuw <2 x i64> %14, %22

	7566 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7567 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7568 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7569 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7570 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7571 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7572 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7573 ; CHECK-NEXT: ret <2 x i64> %24

	7574

	7575 define <16 x i64> @sub_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {

	7576 %3 = sub nsw <16 x i64> %0, %1

	7577 ret <16 x i64> %3

	7578 }

	7579 ; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7580 ; CHECK-NEXT: %24 = sub nsw <2 x i64> %7, %15

	7581 ; CHECK-NEXT: %25 = sub nsw <2 x i64> %8, %16

	7582 ; CHECK-NEXT: %26 = sub nsw <2 x i64> %9, %17

	7583 ; CHECK-NEXT: %27 = sub nsw <2 x i64> %10, %18

	7584 ; CHECK-NEXT: %28 = sub nsw <2 x i64> %11, %19

	7585 ; CHECK-NEXT: %29 = sub nsw <2 x i64> %12, %20

	7586 ; CHECK-NEXT: %30 = sub nsw <2 x i64> %13, %21

	7587 ; CHECK-NEXT: %31 = sub nsw <2 x i64> %14, %22

	7588 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7589 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7590 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7591 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7592 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7593 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7594 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7595 ; CHECK-NEXT: ret <2 x i64> %24

	7596

	7597 define <16 x i64> @sub_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {

	7598 %3 = sub nuw nsw <16 x i64> %0, %1

	7599 ret <16 x i64> %3

	7600 }

	7601 ; CHECK-LABEL: define <2 x i64> @sub_binop_16xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>)

	7602 ; CHECK-NEXT: %24 = sub nuw nsw <2 x i64> %7, %15

	7603 ; CHECK-NEXT: %25 = sub nuw nsw <2 x i64> %8, %16

	7604 ; CHECK-NEXT: %26 = sub nuw nsw <2 x i64> %9, %17

	7605 ; CHECK-NEXT: %27 = sub nuw nsw <2 x i64> %10, %18

	7606 ; CHECK-NEXT: %28 = sub nuw nsw <2 x i64> %11, %19

	7607 ; CHECK-NEXT: %29 = sub nuw nsw <2 x i64> %12, %20

	7608 ; CHECK-NEXT: %30 = sub nuw nsw <2 x i64> %13, %21

	7609 ; CHECK-NEXT: %31 = sub nuw nsw <2 x i64> %14, %22

	7610 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7611 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7612 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7613 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7614 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7615 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7616 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7617 ; CHECK-NEXT: ret <2 x i64> %24

	7618

	7619 define <16 x i64> @mul_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {

	7620 %3 = mul nuw <16 x i64> %0, %1

	7621 ret <16 x i64> %3

	7622 }

	7623 ; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7624 ; CHECK-NEXT: %24 = mul nuw <2 x i64> %7, %15

	7625 ; CHECK-NEXT: %25 = mul nuw <2 x i64> %8, %16

	7626 ; CHECK-NEXT: %26 = mul nuw <2 x i64> %9, %17

	7627 ; CHECK-NEXT: %27 = mul nuw <2 x i64> %10, %18

	7628 ; CHECK-NEXT: %28 = mul nuw <2 x i64> %11, %19

	7629 ; CHECK-NEXT: %29 = mul nuw <2 x i64> %12, %20

	7630 ; CHECK-NEXT: %30 = mul nuw <2 x i64> %13, %21

	7631 ; CHECK-NEXT: %31 = mul nuw <2 x i64> %14, %22

	7632 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7633 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7634 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7635 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7636 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7637 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7638 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7639 ; CHECK-NEXT: ret <2 x i64> %24

	7640

	7641 define <16 x i64> @mul_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {

	7642 %3 = mul nsw <16 x i64> %0, %1

	7643 ret <16 x i64> %3

	7644 }

	7645 ; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7646 ; CHECK-NEXT: %24 = mul nsw <2 x i64> %7, %15

	7647 ; CHECK-NEXT: %25 = mul nsw <2 x i64> %8, %16

	7648 ; CHECK-NEXT: %26 = mul nsw <2 x i64> %9, %17

	7649 ; CHECK-NEXT: %27 = mul nsw <2 x i64> %10, %18

	7650 ; CHECK-NEXT: %28 = mul nsw <2 x i64> %11, %19

	7651 ; CHECK-NEXT: %29 = mul nsw <2 x i64> %12, %20

	7652 ; CHECK-NEXT: %30 = mul nsw <2 x i64> %13, %21

	7653 ; CHECK-NEXT: %31 = mul nsw <2 x i64> %14, %22

	7654 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7655 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7656 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7657 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7658 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7659 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7660 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7661 ; CHECK-NEXT: ret <2 x i64> %24

	7662

	7663 define <16 x i64> @mul_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {

	7664 %3 = mul nuw nsw <16 x i64> %0, %1

	7665 ret <16 x i64> %3

	7666 }

	7667 ; CHECK-LABEL: define <2 x i64> @mul_binop_16xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>)

	7668 ; CHECK-NEXT: %24 = mul nuw nsw <2 x i64> %7, %15

	7669 ; CHECK-NEXT: %25 = mul nuw nsw <2 x i64> %8, %16

	7670 ; CHECK-NEXT: %26 = mul nuw nsw <2 x i64> %9, %17

	7671 ; CHECK-NEXT: %27 = mul nuw nsw <2 x i64> %10, %18

	7672 ; CHECK-NEXT: %28 = mul nuw nsw <2 x i64> %11, %19

	7673 ; CHECK-NEXT: %29 = mul nuw nsw <2 x i64> %12, %20

	7674 ; CHECK-NEXT: %30 = mul nuw nsw <2 x i64> %13, %21

	7675 ; CHECK-NEXT: %31 = mul nuw nsw <2 x i64> %14, %22

	7676 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7677 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7678 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7679 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7680 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7681 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7682 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7683 ; CHECK-NEXT: ret <2 x i64> %24

	7684

	7685 define <16 x i64> @shl_binop_16xi64_nuw(<16 x i64>, <16 x i64>) {

	7686 %3 = shl nuw <16 x i64> %0, %1

	7687 ret <16 x i64> %3

	7688 }

	7689 ; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7690 ; CHECK-NEXT: %24 = shl nuw <2 x i64> %7, %15

	7691 ; CHECK-NEXT: %25 = shl nuw <2 x i64> %8, %16

	7692 ; CHECK-NEXT: %26 = shl nuw <2 x i64> %9, %17

	7693 ; CHECK-NEXT: %27 = shl nuw <2 x i64> %10, %18

	7694 ; CHECK-NEXT: %28 = shl nuw <2 x i64> %11, %19

	7695 ; CHECK-NEXT: %29 = shl nuw <2 x i64> %12, %20

	7696 ; CHECK-NEXT: %30 = shl nuw <2 x i64> %13, %21

	7697 ; CHECK-NEXT: %31 = shl nuw <2 x i64> %14, %22

	7698 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7699 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7700 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7701 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7702 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7703 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7704 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7705 ; CHECK-NEXT: ret <2 x i64> %24

	7706

	7707 define <16 x i64> @shl_binop_16xi64_nsw(<16 x i64>, <16 x i64>) {

	7708 %3 = shl nsw <16 x i64> %0, %1

	7709 ret <16 x i64> %3

	7710 }

	7711 ; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7712 ; CHECK-NEXT: %24 = shl nsw <2 x i64> %7, %15

	7713 ; CHECK-NEXT: %25 = shl nsw <2 x i64> %8, %16

	7714 ; CHECK-NEXT: %26 = shl nsw <2 x i64> %9, %17

	7715 ; CHECK-NEXT: %27 = shl nsw <2 x i64> %10, %18

	7716 ; CHECK-NEXT: %28 = shl nsw <2 x i64> %11, %19

	7717 ; CHECK-NEXT: %29 = shl nsw <2 x i64> %12, %20

	7718 ; CHECK-NEXT: %30 = shl nsw <2 x i64> %13, %21

	7719 ; CHECK-NEXT: %31 = shl nsw <2 x i64> %14, %22

	7720 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7721 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7722 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7723 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7724 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7725 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7726 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7727 ; CHECK-NEXT: ret <2 x i64> %24

	7728

	7729 define <16 x i64> @shl_binop_16xi64_nuw_nsw(<16 x i64>, <16 x i64>) {

	7730 %3 = shl nuw nsw <16 x i64> %0, %1

	7731 ret <16 x i64> %3

	7732 }

	7733 ; CHECK-LABEL: define <2 x i64> @shl_binop_16xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>)

	7734 ; CHECK-NEXT: %24 = shl nuw nsw <2 x i64> %7, %15

	7735 ; CHECK-NEXT: %25 = shl nuw nsw <2 x i64> %8, %16

	7736 ; CHECK-NEXT: %26 = shl nuw nsw <2 x i64> %9, %17

	7737 ; CHECK-NEXT: %27 = shl nuw nsw <2 x i64> %10, %18

	7738 ; CHECK-NEXT: %28 = shl nuw nsw <2 x i64> %11, %19

	7739 ; CHECK-NEXT: %29 = shl nuw nsw <2 x i64> %12, %20

	7740 ; CHECK-NEXT: %30 = shl nuw nsw <2 x i64> %13, %21

	7741 ; CHECK-NEXT: %31 = shl nuw nsw <2 x i64> %14, %22

	7742 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7743 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7744 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7745 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7746 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7747 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7748 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7749 ; CHECK-NEXT: ret <2 x i64> %24

	7750

	7751 define <16 x i64> @udiv_binop_16xi64(<16 x i64>, <16 x i64>) {

	7752 %3 = udiv <16 x i64> %0, %1

	7753 ret <16 x i64> %3

	7754 }

	7755 ; CHECK-LABEL: define <2 x i64> @udiv_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7756 ; CHECK-NEXT: %24 = udiv <2 x i64> %7, %15

	7757 ; CHECK-NEXT: %25 = udiv <2 x i64> %8, %16

	7758 ; CHECK-NEXT: %26 = udiv <2 x i64> %9, %17

	7759 ; CHECK-NEXT: %27 = udiv <2 x i64> %10, %18

	7760 ; CHECK-NEXT: %28 = udiv <2 x i64> %11, %19

	7761 ; CHECK-NEXT: %29 = udiv <2 x i64> %12, %20

	7762 ; CHECK-NEXT: %30 = udiv <2 x i64> %13, %21

	7763 ; CHECK-NEXT: %31 = udiv <2 x i64> %14, %22

	7764 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7765 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7766 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7767 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7768 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7769 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7770 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7771 ; CHECK-NEXT: ret <2 x i64> %24

	7772

	7773 define <16 x i64> @udiv_binop_16xi64_exact(<16 x i64>, <16 x i64>) {

	7774 %3 = udiv exact <16 x i64> %0, %1

	7775 ret <16 x i64> %3

	7776 }

	7777 ; CHECK-LABEL: define <2 x i64> @udiv_binop_16xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7778 ; CHECK-NEXT: %24 = udiv exact <2 x i64> %7, %15

	7779 ; CHECK-NEXT: %25 = udiv exact <2 x i64> %8, %16

	7780 ; CHECK-NEXT: %26 = udiv exact <2 x i64> %9, %17

	7781 ; CHECK-NEXT: %27 = udiv exact <2 x i64> %10, %18

	7782 ; CHECK-NEXT: %28 = udiv exact <2 x i64> %11, %19

	7783 ; CHECK-NEXT: %29 = udiv exact <2 x i64> %12, %20

	7784 ; CHECK-NEXT: %30 = udiv exact <2 x i64> %13, %21

	7785 ; CHECK-NEXT: %31 = udiv exact <2 x i64> %14, %22

	7786 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7787 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7788 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7789 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7790 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7791 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7792 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7793 ; CHECK-NEXT: ret <2 x i64> %24

	7794

	7795 define <16 x i64> @sdiv_binop_16xi64(<16 x i64>, <16 x i64>) {

	7796 %3 = sdiv <16 x i64> %0, %1

	7797 ret <16 x i64> %3

	7798 }

	7799 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7800 ; CHECK-NEXT: %24 = sdiv <2 x i64> %7, %15

	7801 ; CHECK-NEXT: %25 = sdiv <2 x i64> %8, %16

	7802 ; CHECK-NEXT: %26 = sdiv <2 x i64> %9, %17

	7803 ; CHECK-NEXT: %27 = sdiv <2 x i64> %10, %18

	7804 ; CHECK-NEXT: %28 = sdiv <2 x i64> %11, %19

	7805 ; CHECK-NEXT: %29 = sdiv <2 x i64> %12, %20

	7806 ; CHECK-NEXT: %30 = sdiv <2 x i64> %13, %21

	7807 ; CHECK-NEXT: %31 = sdiv <2 x i64> %14, %22

	7808 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7809 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7810 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7811 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7812 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7813 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7814 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7815 ; CHECK-NEXT: ret <2 x i64> %24

	7816

	7817 define <16 x i64> @sdiv_binop_16xi64_exact(<16 x i64>, <16 x i64>) {

	7818 %3 = sdiv exact <16 x i64> %0, %1

	7819 ret <16 x i64> %3

	7820 }

	7821 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_16xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7822 ; CHECK-NEXT: %24 = sdiv exact <2 x i64> %7, %15

	7823 ; CHECK-NEXT: %25 = sdiv exact <2 x i64> %8, %16

	7824 ; CHECK-NEXT: %26 = sdiv exact <2 x i64> %9, %17

	7825 ; CHECK-NEXT: %27 = sdiv exact <2 x i64> %10, %18

	7826 ; CHECK-NEXT: %28 = sdiv exact <2 x i64> %11, %19

	7827 ; CHECK-NEXT: %29 = sdiv exact <2 x i64> %12, %20

	7828 ; CHECK-NEXT: %30 = sdiv exact <2 x i64> %13, %21

	7829 ; CHECK-NEXT: %31 = sdiv exact <2 x i64> %14, %22

	7830 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7831 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7832 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7833 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7834 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7835 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7836 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7837 ; CHECK-NEXT: ret <2 x i64> %24

	7838

	7839 define <16 x i64> @lshr_binop_16xi64(<16 x i64>, <16 x i64>) {

	7840 %3 = lshr <16 x i64> %0, %1

	7841 ret <16 x i64> %3

	7842 }

	7843 ; CHECK-LABEL: define <2 x i64> @lshr_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7844 ; CHECK-NEXT: %24 = lshr <2 x i64> %7, %15

	7845 ; CHECK-NEXT: %25 = lshr <2 x i64> %8, %16

	7846 ; CHECK-NEXT: %26 = lshr <2 x i64> %9, %17

	7847 ; CHECK-NEXT: %27 = lshr <2 x i64> %10, %18

	7848 ; CHECK-NEXT: %28 = lshr <2 x i64> %11, %19

	7849 ; CHECK-NEXT: %29 = lshr <2 x i64> %12, %20

	7850 ; CHECK-NEXT: %30 = lshr <2 x i64> %13, %21

	7851 ; CHECK-NEXT: %31 = lshr <2 x i64> %14, %22

	7852 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7853 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7854 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7855 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7856 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7857 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7858 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7859 ; CHECK-NEXT: ret <2 x i64> %24

	7860

	7861 define <16 x i64> @lshr_binop_16xi64_exact(<16 x i64>, <16 x i64>) {

	7862 %3 = lshr exact <16 x i64> %0, %1

	7863 ret <16 x i64> %3

	7864 }

	7865 ; CHECK-LABEL: define <2 x i64> @lshr_binop_16xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7866 ; CHECK-NEXT: %24 = lshr exact <2 x i64> %7, %15

	7867 ; CHECK-NEXT: %25 = lshr exact <2 x i64> %8, %16

	7868 ; CHECK-NEXT: %26 = lshr exact <2 x i64> %9, %17

	7869 ; CHECK-NEXT: %27 = lshr exact <2 x i64> %10, %18

	7870 ; CHECK-NEXT: %28 = lshr exact <2 x i64> %11, %19

	7871 ; CHECK-NEXT: %29 = lshr exact <2 x i64> %12, %20

	7872 ; CHECK-NEXT: %30 = lshr exact <2 x i64> %13, %21

	7873 ; CHECK-NEXT: %31 = lshr exact <2 x i64> %14, %22

	7874 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7875 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7876 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7877 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7878 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7879 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7880 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7881 ; CHECK-NEXT: ret <2 x i64> %24

	7882

	7883 define <16 x i64> @ashr_binop_16xi64(<16 x i64>, <16 x i64>) {

	7884 %3 = ashr <16 x i64> %0, %1

	7885 ret <16 x i64> %3

	7886 }

	7887 ; CHECK-LABEL: define <2 x i64> @ashr_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7888 ; CHECK-NEXT: %24 = ashr <2 x i64> %7, %15

	7889 ; CHECK-NEXT: %25 = ashr <2 x i64> %8, %16

	7890 ; CHECK-NEXT: %26 = ashr <2 x i64> %9, %17

	7891 ; CHECK-NEXT: %27 = ashr <2 x i64> %10, %18

	7892 ; CHECK-NEXT: %28 = ashr <2 x i64> %11, %19

	7893 ; CHECK-NEXT: %29 = ashr <2 x i64> %12, %20

	7894 ; CHECK-NEXT: %30 = ashr <2 x i64> %13, %21

	7895 ; CHECK-NEXT: %31 = ashr <2 x i64> %14, %22

	7896 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7897 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7898 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7899 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7900 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7901 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7902 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7903 ; CHECK-NEXT: ret <2 x i64> %24

	7904

	7905 define <16 x i64> @ashr_binop_16xi64_exact(<16 x i64>, <16 x i64>) {

	7906 %3 = ashr exact <16 x i64> %0, %1

	7907 ret <16 x i64> %3

	7908 }

	7909 ; CHECK-LABEL: define <2 x i64> @ashr_binop_16xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7910 ; CHECK-NEXT: %24 = ashr exact <2 x i64> %7, %15

	7911 ; CHECK-NEXT: %25 = ashr exact <2 x i64> %8, %16

	7912 ; CHECK-NEXT: %26 = ashr exact <2 x i64> %9, %17

	7913 ; CHECK-NEXT: %27 = ashr exact <2 x i64> %10, %18

	7914 ; CHECK-NEXT: %28 = ashr exact <2 x i64> %11, %19

	7915 ; CHECK-NEXT: %29 = ashr exact <2 x i64> %12, %20

	7916 ; CHECK-NEXT: %30 = ashr exact <2 x i64> %13, %21

	7917 ; CHECK-NEXT: %31 = ashr exact <2 x i64> %14, %22

	7918 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7919 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7920 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7921 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7922 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7923 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7924 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7925 ; CHECK-NEXT: ret <2 x i64> %24

	7926

	7927 define <16 x i64> @and_binop_16xi64(<16 x i64>, <16 x i64>) {

	7928 %3 = and <16 x i64> %0, %1

	7929 ret <16 x i64> %3

	7930 }

	7931 ; CHECK-LABEL: define <2 x i64> @and_binop_16xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>)

	7932 ; CHECK-NEXT: %24 = and <2 x i64> %7, %15

	7933 ; CHECK-NEXT: %25 = and <2 x i64> %8, %16

	7934 ; CHECK-NEXT: %26 = and <2 x i64> %9, %17

	7935 ; CHECK-NEXT: %27 = and <2 x i64> %10, %18

	7936 ; CHECK-NEXT: %28 = and <2 x i64> %11, %19

	7937 ; CHECK-NEXT: %29 = and <2 x i64> %12, %20

	7938 ; CHECK-NEXT: %30 = and <2 x i64> %13, %21

	7939 ; CHECK-NEXT: %31 = and <2 x i64> %14, %22

	7940 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7941 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7942 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7943 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7944 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7945 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7946 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7947 ; CHECK-NEXT: ret <2 x i64> %24

	7948

	7949 define <16 x i64> @xor_binop_16xi64(<16 x i64>, <16 x i64>) {

	7950 %3 = xor <16 x i64> %0, %1

	7951 ret <16 x i64> %3

	7952 }

	7953 ; CHECK-LABEL: define <2 x i64> @xor_binop_16xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>)

	7954 ; CHECK-NEXT: %24 = xor <2 x i64> %7, %15

	7955 ; CHECK-NEXT: %25 = xor <2 x i64> %8, %16

	7956 ; CHECK-NEXT: %26 = xor <2 x i64> %9, %17

	7957 ; CHECK-NEXT: %27 = xor <2 x i64> %10, %18

	7958 ; CHECK-NEXT: %28 = xor <2 x i64> %11, %19

	7959 ; CHECK-NEXT: %29 = xor <2 x i64> %12, %20

	7960 ; CHECK-NEXT: %30 = xor <2 x i64> %13, %21

	7961 ; CHECK-NEXT: %31 = xor <2 x i64> %14, %22

	7962 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7963 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7964 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7965 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7966 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7967 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7968 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7969 ; CHECK-NEXT: ret <2 x i64> %24

	7970

	7971 define <16 x i64> @or_binop_16xi64(<16 x i64>, <16 x i64>) {

	7972 %3 = or <16 x i64> %0, %1

	7973 ret <16 x i64> %3

	7974 }

	7975 ; CHECK-LABEL: define <2 x i64> @or_binop_16xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferencea ble(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>)

	7976 ; CHECK-NEXT: %24 = or <2 x i64> %7, %15

	7977 ; CHECK-NEXT: %25 = or <2 x i64> %8, %16

	7978 ; CHECK-NEXT: %26 = or <2 x i64> %9, %17

	7979 ; CHECK-NEXT: %27 = or <2 x i64> %10, %18

	7980 ; CHECK-NEXT: %28 = or <2 x i64> %11, %19

	7981 ; CHECK-NEXT: %29 = or <2 x i64> %12, %20

	7982 ; CHECK-NEXT: %30 = or <2 x i64> %13, %21

	7983 ; CHECK-NEXT: %31 = or <2 x i64> %14, %22

	7984 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	7985 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	7986 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	7987 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	7988 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	7989 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	7990 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	7991 ; CHECK-NEXT: ret <2 x i64> %24

	7992

	7993 define <16 x i64> @urem_binop_16xi64(<16 x i64>, <16 x i64>) {

	7994 %3 = urem <16 x i64> %0, %1

	7995 ret <16 x i64> %3

	7996 }

	7997 ; CHECK-LABEL: define <2 x i64> @urem_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	7998 ; CHECK-NEXT: %24 = urem <2 x i64> %7, %15

	7999 ; CHECK-NEXT: %25 = urem <2 x i64> %8, %16

	8000 ; CHECK-NEXT: %26 = urem <2 x i64> %9, %17

	8001 ; CHECK-NEXT: %27 = urem <2 x i64> %10, %18

	8002 ; CHECK-NEXT: %28 = urem <2 x i64> %11, %19

	8003 ; CHECK-NEXT: %29 = urem <2 x i64> %12, %20

	8004 ; CHECK-NEXT: %30 = urem <2 x i64> %13, %21

	8005 ; CHECK-NEXT: %31 = urem <2 x i64> %14, %22

	8006 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	8007 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	8008 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	8009 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	8010 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	8011 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	8012 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	8013 ; CHECK-NEXT: ret <2 x i64> %24

	8014

	8015 define <16 x i64> @srem_binop_16xi64(<16 x i64>, <16 x i64>) {

	8016 %3 = srem <16 x i64> %0, %1

	8017 ret <16 x i64> %3

	8018 }

	8019 ; CHECK-LABEL: define <2 x i64> @srem_binop_16xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	8020 ; CHECK-NEXT: %24 = srem <2 x i64> %7, %15

	8021 ; CHECK-NEXT: %25 = srem <2 x i64> %8, %16

	8022 ; CHECK-NEXT: %26 = srem <2 x i64> %9, %17

	8023 ; CHECK-NEXT: %27 = srem <2 x i64> %10, %18

	8024 ; CHECK-NEXT: %28 = srem <2 x i64> %11, %19

	8025 ; CHECK-NEXT: %29 = srem <2 x i64> %12, %20

	8026 ; CHECK-NEXT: %30 = srem <2 x i64> %13, %21

	8027 ; CHECK-NEXT: %31 = srem <2 x i64> %14, %22

	8028 ; CHECK-NEXT: store <2 x i64> %25, <2 x i64>* %0, align 16

	8029 ; CHECK-NEXT: store <2 x i64> %26, <2 x i64>* %1, align 16

	8030 ; CHECK-NEXT: store <2 x i64> %27, <2 x i64>* %2, align 16

	8031 ; CHECK-NEXT: store <2 x i64> %28, <2 x i64>* %3, align 16

	8032 ; CHECK-NEXT: store <2 x i64> %29, <2 x i64>* %4, align 16

	8033 ; CHECK-NEXT: store <2 x i64> %30, <2 x i64>* %5, align 16

	8034 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %6, align 16

	8035 ; CHECK-NEXT: ret <2 x i64> %24

	8036

	8037 define <20 x i8> @add_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {

	8038 %3 = add nuw <20 x i8> %0, %1

	8039 ret <20 x i8> %3

	8040 }

	8041 ; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nuw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8042 ; CHECK-NEXT: %6 = add nuw <16 x i8> %1, %3

	8043 ; CHECK-NEXT: %7 = add nuw <16 x i8> %2, %4

	8044 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8045 ; CHECK-NEXT: ret <16 x i8> %6

	8046

	8047 define <20 x i8> @add_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {

	8048 %3 = add nsw <20 x i8> %0, %1

	8049 ret <20 x i8> %3

	8050 }

	8051 ; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nsw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8052 ; CHECK-NEXT: %6 = add nsw <16 x i8> %1, %3

	8053 ; CHECK-NEXT: %7 = add nsw <16 x i8> %2, %4

	8054 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8055 ; CHECK-NEXT: ret <16 x i8> %6

	8056

	8057 define <20 x i8> @add_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {

	8058 %3 = add nuw nsw <20 x i8> %0, %1

	8059 ret <20 x i8> %3

	8060 }

	8061 ; CHECK-LABEL: define <16 x i8> @add_binop_20xi8_nuw_nsw(<16 x i8>* nocapture no nnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8062 ; CHECK-NEXT: %6 = add nuw nsw <16 x i8> %1, %3

	8063 ; CHECK-NEXT: %7 = add nuw nsw <16 x i8> %2, %4

	8064 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8065 ; CHECK-NEXT: ret <16 x i8> %6

	8066

	8067 define <20 x i8> @sub_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {

	8068 %3 = sub nuw <20 x i8> %0, %1

	8069 ret <20 x i8> %3

	8070 }

	8071 ; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nuw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8072 ; CHECK-NEXT: %6 = sub nuw <16 x i8> %1, %3

	8073 ; CHECK-NEXT: %7 = sub nuw <16 x i8> %2, %4

	8074 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8075 ; CHECK-NEXT: ret <16 x i8> %6

	8076

	8077 define <20 x i8> @sub_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {

	8078 %3 = sub nsw <20 x i8> %0, %1

	8079 ret <20 x i8> %3

	8080 }

	8081 ; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nsw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8082 ; CHECK-NEXT: %6 = sub nsw <16 x i8> %1, %3

	8083 ; CHECK-NEXT: %7 = sub nsw <16 x i8> %2, %4

	8084 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8085 ; CHECK-NEXT: ret <16 x i8> %6

	8086

	8087 define <20 x i8> @sub_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {

	8088 %3 = sub nuw nsw <20 x i8> %0, %1

	8089 ret <20 x i8> %3

	8090 }

	8091 ; CHECK-LABEL: define <16 x i8> @sub_binop_20xi8_nuw_nsw(<16 x i8>* nocapture no nnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8092 ; CHECK-NEXT: %6 = sub nuw nsw <16 x i8> %1, %3

	8093 ; CHECK-NEXT: %7 = sub nuw nsw <16 x i8> %2, %4

	8094 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8095 ; CHECK-NEXT: ret <16 x i8> %6

	8096

	8097 define <20 x i8> @mul_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {

	8098 %3 = mul nuw <20 x i8> %0, %1

	8099 ret <20 x i8> %3

	8100 }

	8101 ; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nuw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8102 ; CHECK-NEXT: %6 = mul nuw <16 x i8> %1, %3

	8103 ; CHECK-NEXT: %7 = mul nuw <16 x i8> %2, %4

	8104 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8105 ; CHECK-NEXT: ret <16 x i8> %6

	8106

	8107 define <20 x i8> @mul_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {

	8108 %3 = mul nsw <20 x i8> %0, %1

	8109 ret <20 x i8> %3

	8110 }

	8111 ; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nsw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8112 ; CHECK-NEXT: %6 = mul nsw <16 x i8> %1, %3

	8113 ; CHECK-NEXT: %7 = mul nsw <16 x i8> %2, %4

	8114 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8115 ; CHECK-NEXT: ret <16 x i8> %6

	8116

	8117 define <20 x i8> @mul_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {

	8118 %3 = mul nuw nsw <20 x i8> %0, %1

	8119 ret <20 x i8> %3

	8120 }

	8121 ; CHECK-LABEL: define <16 x i8> @mul_binop_20xi8_nuw_nsw(<16 x i8>* nocapture no nnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8122 ; CHECK-NEXT: %6 = mul nuw nsw <16 x i8> %1, %3

	8123 ; CHECK-NEXT: %7 = mul nuw nsw <16 x i8> %2, %4

	8124 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8125 ; CHECK-NEXT: ret <16 x i8> %6

	8126

	8127 define <20 x i8> @shl_binop_20xi8_nuw(<20 x i8>, <20 x i8>) {

	8128 %3 = shl nuw <20 x i8> %0, %1

	8129 ret <20 x i8> %3

	8130 }

	8131 ; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nuw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8132 ; CHECK-NEXT: %6 = shl nuw <16 x i8> %1, %3

	8133 ; CHECK-NEXT: %7 = shl nuw <16 x i8> %2, %4

	8134 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8135 ; CHECK-NEXT: ret <16 x i8> %6

	8136

	8137 define <20 x i8> @shl_binop_20xi8_nsw(<20 x i8>, <20 x i8>) {

	8138 %3 = shl nsw <20 x i8> %0, %1

	8139 ret <20 x i8> %3

	8140 }

	8141 ; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nsw(<16 x i8>* nocapture nonnul l dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8142 ; CHECK-NEXT: %6 = shl nsw <16 x i8> %1, %3

	8143 ; CHECK-NEXT: %7 = shl nsw <16 x i8> %2, %4

	8144 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8145 ; CHECK-NEXT: ret <16 x i8> %6

	8146

	8147 define <20 x i8> @shl_binop_20xi8_nuw_nsw(<20 x i8>, <20 x i8>) {

	8148 %3 = shl nuw nsw <20 x i8> %0, %1

	8149 ret <20 x i8> %3

	8150 }

	8151 ; CHECK-LABEL: define <16 x i8> @shl_binop_20xi8_nuw_nsw(<16 x i8>* nocapture no nnull dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8152 ; CHECK-NEXT: %6 = shl nuw nsw <16 x i8> %1, %3

	8153 ; CHECK-NEXT: %7 = shl nuw nsw <16 x i8> %2, %4

	8154 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8155 ; CHECK-NEXT: ret <16 x i8> %6

	8156

	8157 define <20 x i8> @udiv_binop_20xi8(<20 x i8>, <20 x i8>) {

	8158 %3 = udiv <20 x i8> %0, %1

	8159 ret <20 x i8> %3

	8160 }

	8161 ; CHECK-LABEL: define <16 x i8> @udiv_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8162 ; CHECK-NEXT: %6 = udiv <16 x i8> %1, %3

	8163 ; CHECK-NEXT: %7 = udiv <16 x i8> %2, %4

	8164 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8165 ; CHECK-NEXT: ret <16 x i8> %6

	8166

	8167 define <20 x i8> @udiv_binop_20xi8_exact(<20 x i8>, <20 x i8>) {

	8168 %3 = udiv exact <20 x i8> %0, %1

	8169 ret <20 x i8> %3

	8170 }

	8171 ; CHECK-LABEL: define <16 x i8> @udiv_binop_20xi8_exact(<16 x i8>* nocapture non null dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8172 ; CHECK-NEXT: %6 = udiv exact <16 x i8> %1, %3

	8173 ; CHECK-NEXT: %7 = udiv exact <16 x i8> %2, %4

	8174 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8175 ; CHECK-NEXT: ret <16 x i8> %6

	8176

	8177 define <20 x i8> @sdiv_binop_20xi8(<20 x i8>, <20 x i8>) {

	8178 %3 = sdiv <20 x i8> %0, %1

	8179 ret <20 x i8> %3

	8180 }

	8181 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8182 ; CHECK-NEXT: %6 = sdiv <16 x i8> %1, %3

	8183 ; CHECK-NEXT: %7 = sdiv <16 x i8> %2, %4

	8184 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8185 ; CHECK-NEXT: ret <16 x i8> %6

	8186

	8187 define <20 x i8> @sdiv_binop_20xi8_exact(<20 x i8>, <20 x i8>) {

	8188 %3 = sdiv exact <20 x i8> %0, %1

	8189 ret <20 x i8> %3

	8190 }

	8191 ; CHECK-LABEL: define <16 x i8> @sdiv_binop_20xi8_exact(<16 x i8>* nocapture non null dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8192 ; CHECK-NEXT: %6 = sdiv exact <16 x i8> %1, %3

	8193 ; CHECK-NEXT: %7 = sdiv exact <16 x i8> %2, %4

	8194 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8195 ; CHECK-NEXT: ret <16 x i8> %6

	8196

	8197 define <20 x i8> @lshr_binop_20xi8(<20 x i8>, <20 x i8>) {

	8198 %3 = lshr <20 x i8> %0, %1

	8199 ret <20 x i8> %3

	8200 }

	8201 ; CHECK-LABEL: define <16 x i8> @lshr_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8202 ; CHECK-NEXT: %6 = lshr <16 x i8> %1, %3

	8203 ; CHECK-NEXT: %7 = lshr <16 x i8> %2, %4

	8204 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8205 ; CHECK-NEXT: ret <16 x i8> %6

	8206

	8207 define <20 x i8> @lshr_binop_20xi8_exact(<20 x i8>, <20 x i8>) {

	8208 %3 = lshr exact <20 x i8> %0, %1

	8209 ret <20 x i8> %3

	8210 }

	8211 ; CHECK-LABEL: define <16 x i8> @lshr_binop_20xi8_exact(<16 x i8>* nocapture non null dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8212 ; CHECK-NEXT: %6 = lshr exact <16 x i8> %1, %3

	8213 ; CHECK-NEXT: %7 = lshr exact <16 x i8> %2, %4

	8214 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8215 ; CHECK-NEXT: ret <16 x i8> %6

	8216

	8217 define <20 x i8> @ashr_binop_20xi8(<20 x i8>, <20 x i8>) {

	8218 %3 = ashr <20 x i8> %0, %1

	8219 ret <20 x i8> %3

	8220 }

	8221 ; CHECK-LABEL: define <16 x i8> @ashr_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8222 ; CHECK-NEXT: %6 = ashr <16 x i8> %1, %3

	8223 ; CHECK-NEXT: %7 = ashr <16 x i8> %2, %4

	8224 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8225 ; CHECK-NEXT: ret <16 x i8> %6

	8226

	8227 define <20 x i8> @ashr_binop_20xi8_exact(<20 x i8>, <20 x i8>) {

	8228 %3 = ashr exact <20 x i8> %0, %1

	8229 ret <20 x i8> %3

	8230 }

	8231 ; CHECK-LABEL: define <16 x i8> @ashr_binop_20xi8_exact(<16 x i8>* nocapture non null dereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8232 ; CHECK-NEXT: %6 = ashr exact <16 x i8> %1, %3

	8233 ; CHECK-NEXT: %7 = ashr exact <16 x i8> %2, %4

	8234 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8235 ; CHECK-NEXT: ret <16 x i8> %6

	8236

	8237 define <20 x i8> @and_binop_20xi8(<20 x i8>, <20 x i8>) {

	8238 %3 = and <20 x i8> %0, %1

	8239 ret <20 x i8> %3

	8240 }

	8241 ; CHECK-LABEL: define <16 x i8> @and_binop_20xi8(<16 x i8>* nocapture nonnull de referenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8242 ; CHECK-NEXT: %6 = and <16 x i8> %1, %3

	8243 ; CHECK-NEXT: %7 = and <16 x i8> %2, %4

	8244 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8245 ; CHECK-NEXT: ret <16 x i8> %6

	8246

	8247 define <20 x i8> @xor_binop_20xi8(<20 x i8>, <20 x i8>) {

	8248 %3 = xor <20 x i8> %0, %1

	8249 ret <20 x i8> %3

	8250 }

	8251 ; CHECK-LABEL: define <16 x i8> @xor_binop_20xi8(<16 x i8>* nocapture nonnull de referenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8252 ; CHECK-NEXT: %6 = xor <16 x i8> %1, %3

	8253 ; CHECK-NEXT: %7 = xor <16 x i8> %2, %4

	8254 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8255 ; CHECK-NEXT: ret <16 x i8> %6

	8256

	8257 define <20 x i8> @or_binop_20xi8(<20 x i8>, <20 x i8>) {

	8258 %3 = or <20 x i8> %0, %1

	8259 ret <20 x i8> %3

	8260 }

	8261 ; CHECK-LABEL: define <16 x i8> @or_binop_20xi8(<16 x i8>* nocapture nonnull der eferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8262 ; CHECK-NEXT: %6 = or <16 x i8> %1, %3

	8263 ; CHECK-NEXT: %7 = or <16 x i8> %2, %4

	8264 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8265 ; CHECK-NEXT: ret <16 x i8> %6

	8266

	8267 define <20 x i8> @urem_binop_20xi8(<20 x i8>, <20 x i8>) {

	8268 %3 = urem <20 x i8> %0, %1

	8269 ret <20 x i8> %3

	8270 }

	8271 ; CHECK-LABEL: define <16 x i8> @urem_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8272 ; CHECK-NEXT: %6 = urem <16 x i8> %1, %3

	8273 ; CHECK-NEXT: %7 = urem <16 x i8> %2, %4

	8274 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8275 ; CHECK-NEXT: ret <16 x i8> %6

	8276

	8277 define <20 x i8> @srem_binop_20xi8(<20 x i8>, <20 x i8>) {

	8278 %3 = srem <20 x i8> %0, %1

	8279 ret <20 x i8> %3

	8280 }

	8281 ; CHECK-LABEL: define <16 x i8> @srem_binop_20xi8(<16 x i8>* nocapture nonnull d ereferenceable(16), <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8>)

	8282 ; CHECK-NEXT: %6 = srem <16 x i8> %1, %3

	8283 ; CHECK-NEXT: %7 = srem <16 x i8> %2, %4

	8284 ; CHECK-NEXT: store <16 x i8> %7, <16 x i8>* %0, align 16

	8285 ; CHECK-NEXT: ret <16 x i8> %6

	8286

	8287 define <20 x i16> @add_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {

	8288 %3 = add nuw <20 x i16> %0, %1

	8289 ret <20 x i16> %3

	8290 }

	8291 ; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8292 ; CHECK-NEXT: %9 = add nuw <8 x i16> %2, %5

	8293 ; CHECK-NEXT: %10 = add nuw <8 x i16> %3, %6

	8294 ; CHECK-NEXT: %11 = add nuw <8 x i16> %4, %7

	8295 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8296 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8297 ; CHECK-NEXT: ret <8 x i16> %9

	8298

	8299 define <20 x i16> @add_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {

	8300 %3 = add nsw <20 x i16> %0, %1

	8301 ret <20 x i16> %3

	8302 }

	8303 ; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8304 ; CHECK-NEXT: %9 = add nsw <8 x i16> %2, %5

	8305 ; CHECK-NEXT: %10 = add nsw <8 x i16> %3, %6

	8306 ; CHECK-NEXT: %11 = add nsw <8 x i16> %4, %7

	8307 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8308 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8309 ; CHECK-NEXT: ret <8 x i16> %9

	8310

	8311 define <20 x i16> @add_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {

	8312 %3 = add nuw nsw <20 x i16> %0, %1

	8313 ret <20 x i16> %3

	8314 }

	8315 ; CHECK-LABEL: define <8 x i16> @add_binop_20xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8316 ; CHECK-NEXT: %9 = add nuw nsw <8 x i16> %2, %5

	8317 ; CHECK-NEXT: %10 = add nuw nsw <8 x i16> %3, %6

	8318 ; CHECK-NEXT: %11 = add nuw nsw <8 x i16> %4, %7

	8319 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8320 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8321 ; CHECK-NEXT: ret <8 x i16> %9

	8322

	8323 define <20 x i16> @sub_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {

	8324 %3 = sub nuw <20 x i16> %0, %1

	8325 ret <20 x i16> %3

	8326 }

	8327 ; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8328 ; CHECK-NEXT: %9 = sub nuw <8 x i16> %2, %5

	8329 ; CHECK-NEXT: %10 = sub nuw <8 x i16> %3, %6

	8330 ; CHECK-NEXT: %11 = sub nuw <8 x i16> %4, %7

	8331 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8332 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8333 ; CHECK-NEXT: ret <8 x i16> %9

	8334

	8335 define <20 x i16> @sub_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {

	8336 %3 = sub nsw <20 x i16> %0, %1

	8337 ret <20 x i16> %3

	8338 }

	8339 ; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8340 ; CHECK-NEXT: %9 = sub nsw <8 x i16> %2, %5

	8341 ; CHECK-NEXT: %10 = sub nsw <8 x i16> %3, %6

	8342 ; CHECK-NEXT: %11 = sub nsw <8 x i16> %4, %7

	8343 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8344 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8345 ; CHECK-NEXT: ret <8 x i16> %9

	8346

	8347 define <20 x i16> @sub_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {

	8348 %3 = sub nuw nsw <20 x i16> %0, %1

	8349 ret <20 x i16> %3

	8350 }

	8351 ; CHECK-LABEL: define <8 x i16> @sub_binop_20xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8352 ; CHECK-NEXT: %9 = sub nuw nsw <8 x i16> %2, %5

	8353 ; CHECK-NEXT: %10 = sub nuw nsw <8 x i16> %3, %6

	8354 ; CHECK-NEXT: %11 = sub nuw nsw <8 x i16> %4, %7

	8355 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8356 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8357 ; CHECK-NEXT: ret <8 x i16> %9

	8358

	8359 define <20 x i16> @mul_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {

	8360 %3 = mul nuw <20 x i16> %0, %1

	8361 ret <20 x i16> %3

	8362 }

	8363 ; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8364 ; CHECK-NEXT: %9 = mul nuw <8 x i16> %2, %5

	8365 ; CHECK-NEXT: %10 = mul nuw <8 x i16> %3, %6

	8366 ; CHECK-NEXT: %11 = mul nuw <8 x i16> %4, %7

	8367 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8368 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8369 ; CHECK-NEXT: ret <8 x i16> %9

	8370

	8371 define <20 x i16> @mul_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {

	8372 %3 = mul nsw <20 x i16> %0, %1

	8373 ret <20 x i16> %3

	8374 }

	8375 ; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8376 ; CHECK-NEXT: %9 = mul nsw <8 x i16> %2, %5

	8377 ; CHECK-NEXT: %10 = mul nsw <8 x i16> %3, %6

	8378 ; CHECK-NEXT: %11 = mul nsw <8 x i16> %4, %7

	8379 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8380 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8381 ; CHECK-NEXT: ret <8 x i16> %9

	8382

	8383 define <20 x i16> @mul_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {

	8384 %3 = mul nuw nsw <20 x i16> %0, %1

	8385 ret <20 x i16> %3

	8386 }

	8387 ; CHECK-LABEL: define <8 x i16> @mul_binop_20xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8388 ; CHECK-NEXT: %9 = mul nuw nsw <8 x i16> %2, %5

	8389 ; CHECK-NEXT: %10 = mul nuw nsw <8 x i16> %3, %6

	8390 ; CHECK-NEXT: %11 = mul nuw nsw <8 x i16> %4, %7

	8391 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8392 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8393 ; CHECK-NEXT: ret <8 x i16> %9

	8394

	8395 define <20 x i16> @shl_binop_20xi16_nuw(<20 x i16>, <20 x i16>) {

	8396 %3 = shl nuw <20 x i16> %0, %1

	8397 ret <20 x i16> %3

	8398 }

	8399 ; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nuw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8400 ; CHECK-NEXT: %9 = shl nuw <8 x i16> %2, %5

	8401 ; CHECK-NEXT: %10 = shl nuw <8 x i16> %3, %6

	8402 ; CHECK-NEXT: %11 = shl nuw <8 x i16> %4, %7

	8403 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8404 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8405 ; CHECK-NEXT: ret <8 x i16> %9

	8406

	8407 define <20 x i16> @shl_binop_20xi16_nsw(<20 x i16>, <20 x i16>) {

	8408 %3 = shl nsw <20 x i16> %0, %1

	8409 ret <20 x i16> %3

	8410 }

	8411 ; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nsw(<8 x i16>* nocapture nonnu ll dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i 16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8412 ; CHECK-NEXT: %9 = shl nsw <8 x i16> %2, %5

	8413 ; CHECK-NEXT: %10 = shl nsw <8 x i16> %3, %6

	8414 ; CHECK-NEXT: %11 = shl nsw <8 x i16> %4, %7

	8415 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8416 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8417 ; CHECK-NEXT: ret <8 x i16> %9

	8418

	8419 define <20 x i16> @shl_binop_20xi16_nuw_nsw(<20 x i16>, <20 x i16>) {

	8420 %3 = shl nuw nsw <20 x i16> %0, %1

	8421 ret <20 x i16> %3

	8422 }

	8423 ; CHECK-LABEL: define <8 x i16> @shl_binop_20xi16_nuw_nsw(<8 x i16>* nocapture n onnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8424 ; CHECK-NEXT: %9 = shl nuw nsw <8 x i16> %2, %5

	8425 ; CHECK-NEXT: %10 = shl nuw nsw <8 x i16> %3, %6

	8426 ; CHECK-NEXT: %11 = shl nuw nsw <8 x i16> %4, %7

	8427 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8428 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8429 ; CHECK-NEXT: ret <8 x i16> %9

	8430

	8431 define <20 x i16> @udiv_binop_20xi16(<20 x i16>, <20 x i16>) {

	8432 %3 = udiv <20 x i16> %0, %1

	8433 ret <20 x i16> %3

	8434 }

	8435 ; CHECK-LABEL: define <8 x i16> @udiv_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8436 ; CHECK-NEXT: %9 = udiv <8 x i16> %2, %5

	8437 ; CHECK-NEXT: %10 = udiv <8 x i16> %3, %6

	8438 ; CHECK-NEXT: %11 = udiv <8 x i16> %4, %7

	8439 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8440 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8441 ; CHECK-NEXT: ret <8 x i16> %9

	8442

	8443 define <20 x i16> @udiv_binop_20xi16_exact(<20 x i16>, <20 x i16>) {

	8444 %3 = udiv exact <20 x i16> %0, %1

	8445 ret <20 x i16> %3

	8446 }

	8447 ; CHECK-LABEL: define <8 x i16> @udiv_binop_20xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8448 ; CHECK-NEXT: %9 = udiv exact <8 x i16> %2, %5

	8449 ; CHECK-NEXT: %10 = udiv exact <8 x i16> %3, %6

	8450 ; CHECK-NEXT: %11 = udiv exact <8 x i16> %4, %7

	8451 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8452 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8453 ; CHECK-NEXT: ret <8 x i16> %9

	8454

	8455 define <20 x i16> @sdiv_binop_20xi16(<20 x i16>, <20 x i16>) {

	8456 %3 = sdiv <20 x i16> %0, %1

	8457 ret <20 x i16> %3

	8458 }

	8459 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8460 ; CHECK-NEXT: %9 = sdiv <8 x i16> %2, %5

	8461 ; CHECK-NEXT: %10 = sdiv <8 x i16> %3, %6

	8462 ; CHECK-NEXT: %11 = sdiv <8 x i16> %4, %7

	8463 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8464 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8465 ; CHECK-NEXT: ret <8 x i16> %9

	8466

	8467 define <20 x i16> @sdiv_binop_20xi16_exact(<20 x i16>, <20 x i16>) {

	8468 %3 = sdiv exact <20 x i16> %0, %1

	8469 ret <20 x i16> %3

	8470 }

	8471 ; CHECK-LABEL: define <8 x i16> @sdiv_binop_20xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8472 ; CHECK-NEXT: %9 = sdiv exact <8 x i16> %2, %5

	8473 ; CHECK-NEXT: %10 = sdiv exact <8 x i16> %3, %6

	8474 ; CHECK-NEXT: %11 = sdiv exact <8 x i16> %4, %7

	8475 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8476 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8477 ; CHECK-NEXT: ret <8 x i16> %9

	8478

	8479 define <20 x i16> @lshr_binop_20xi16(<20 x i16>, <20 x i16>) {

	8480 %3 = lshr <20 x i16> %0, %1

	8481 ret <20 x i16> %3

	8482 }

	8483 ; CHECK-LABEL: define <8 x i16> @lshr_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8484 ; CHECK-NEXT: %9 = lshr <8 x i16> %2, %5

	8485 ; CHECK-NEXT: %10 = lshr <8 x i16> %3, %6

	8486 ; CHECK-NEXT: %11 = lshr <8 x i16> %4, %7

	8487 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8488 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8489 ; CHECK-NEXT: ret <8 x i16> %9

	8490

	8491 define <20 x i16> @lshr_binop_20xi16_exact(<20 x i16>, <20 x i16>) {

	8492 %3 = lshr exact <20 x i16> %0, %1

	8493 ret <20 x i16> %3

	8494 }

	8495 ; CHECK-LABEL: define <8 x i16> @lshr_binop_20xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8496 ; CHECK-NEXT: %9 = lshr exact <8 x i16> %2, %5

	8497 ; CHECK-NEXT: %10 = lshr exact <8 x i16> %3, %6

	8498 ; CHECK-NEXT: %11 = lshr exact <8 x i16> %4, %7

	8499 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8500 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8501 ; CHECK-NEXT: ret <8 x i16> %9

	8502

	8503 define <20 x i16> @ashr_binop_20xi16(<20 x i16>, <20 x i16>) {

	8504 %3 = ashr <20 x i16> %0, %1

	8505 ret <20 x i16> %3

	8506 }

	8507 ; CHECK-LABEL: define <8 x i16> @ashr_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8508 ; CHECK-NEXT: %9 = ashr <8 x i16> %2, %5

	8509 ; CHECK-NEXT: %10 = ashr <8 x i16> %3, %6

	8510 ; CHECK-NEXT: %11 = ashr <8 x i16> %4, %7

	8511 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8512 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8513 ; CHECK-NEXT: ret <8 x i16> %9

	8514

	8515 define <20 x i16> @ashr_binop_20xi16_exact(<20 x i16>, <20 x i16>) {

	8516 %3 = ashr exact <20 x i16> %0, %1

	8517 ret <20 x i16> %3

	8518 }

	8519 ; CHECK-LABEL: define <8 x i16> @ashr_binop_20xi16_exact(<8 x i16>* nocapture no nnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8520 ; CHECK-NEXT: %9 = ashr exact <8 x i16> %2, %5

	8521 ; CHECK-NEXT: %10 = ashr exact <8 x i16> %3, %6

	8522 ; CHECK-NEXT: %11 = ashr exact <8 x i16> %4, %7

	8523 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8524 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8525 ; CHECK-NEXT: ret <8 x i16> %9

	8526

	8527 define <20 x i16> @and_binop_20xi16(<20 x i16>, <20 x i16>) {

	8528 %3 = and <20 x i16> %0, %1

	8529 ret <20 x i16> %3

	8530 }

	8531 ; CHECK-LABEL: define <8 x i16> @and_binop_20xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8532 ; CHECK-NEXT: %9 = and <8 x i16> %2, %5

	8533 ; CHECK-NEXT: %10 = and <8 x i16> %3, %6

	8534 ; CHECK-NEXT: %11 = and <8 x i16> %4, %7

	8535 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8536 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8537 ; CHECK-NEXT: ret <8 x i16> %9

	8538

	8539 define <20 x i16> @xor_binop_20xi16(<20 x i16>, <20 x i16>) {

	8540 %3 = xor <20 x i16> %0, %1

	8541 ret <20 x i16> %3

	8542 }

	8543 ; CHECK-LABEL: define <8 x i16> @xor_binop_20xi16(<8 x i16>* nocapture nonnull d ereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8544 ; CHECK-NEXT: %9 = xor <8 x i16> %2, %5

	8545 ; CHECK-NEXT: %10 = xor <8 x i16> %3, %6

	8546 ; CHECK-NEXT: %11 = xor <8 x i16> %4, %7

	8547 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8548 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8549 ; CHECK-NEXT: ret <8 x i16> %9

	8550

	8551 define <20 x i16> @or_binop_20xi16(<20 x i16>, <20 x i16>) {

	8552 %3 = or <20 x i16> %0, %1

	8553 ret <20 x i16> %3

	8554 }

	8555 ; CHECK-LABEL: define <8 x i16> @or_binop_20xi16(<8 x i16>* nocapture nonnull de referenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8556 ; CHECK-NEXT: %9 = or <8 x i16> %2, %5

	8557 ; CHECK-NEXT: %10 = or <8 x i16> %3, %6

	8558 ; CHECK-NEXT: %11 = or <8 x i16> %4, %7

	8559 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8560 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8561 ; CHECK-NEXT: ret <8 x i16> %9

	8562

	8563 define <20 x i16> @urem_binop_20xi16(<20 x i16>, <20 x i16>) {

	8564 %3 = urem <20 x i16> %0, %1

	8565 ret <20 x i16> %3

	8566 }

	8567 ; CHECK-LABEL: define <8 x i16> @urem_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8568 ; CHECK-NEXT: %9 = urem <8 x i16> %2, %5

	8569 ; CHECK-NEXT: %10 = urem <8 x i16> %3, %6

	8570 ; CHECK-NEXT: %11 = urem <8 x i16> %4, %7

	8571 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8572 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8573 ; CHECK-NEXT: ret <8 x i16> %9

	8574

	8575 define <20 x i16> @srem_binop_20xi16(<20 x i16>, <20 x i16>) {

	8576 %3 = srem <20 x i16> %0, %1

	8577 ret <20 x i16> %3

	8578 }

	8579 ; CHECK-LABEL: define <8 x i16> @srem_binop_20xi16(<8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16>* nocapture nonnull dereferenceable(16), <8 x i16> , <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16>)

	8580 ; CHECK-NEXT: %9 = srem <8 x i16> %2, %5

	8581 ; CHECK-NEXT: %10 = srem <8 x i16> %3, %6

	8582 ; CHECK-NEXT: %11 = srem <8 x i16> %4, %7

	8583 ; CHECK-NEXT: store <8 x i16> %10, <8 x i16>* %0, align 16

	8584 ; CHECK-NEXT: store <8 x i16> %11, <8 x i16>* %1, align 16

	8585 ; CHECK-NEXT: ret <8 x i16> %9

	8586

	8587 define <20 x i32> @add_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {

	8588 %3 = add nuw <20 x i32> %0, %1

	8589 ret <20 x i32> %3

	8590 }

	8591 ; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8592 ; CHECK-NEXT: %15 = add nuw <4 x i32> %4, %9

	8593 ; CHECK-NEXT: %16 = add nuw <4 x i32> %5, %10

	8594 ; CHECK-NEXT: %17 = add nuw <4 x i32> %6, %11

	8595 ; CHECK-NEXT: %18 = add nuw <4 x i32> %7, %12

	8596 ; CHECK-NEXT: %19 = add nuw <4 x i32> %8, %13

	8597 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8598 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8599 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8600 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8601 ; CHECK-NEXT: ret <4 x i32> %15

	8602

	8603 define <20 x i32> @add_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {

	8604 %3 = add nsw <20 x i32> %0, %1

	8605 ret <20 x i32> %3

	8606 }

	8607 ; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8608 ; CHECK-NEXT: %15 = add nsw <4 x i32> %4, %9

	8609 ; CHECK-NEXT: %16 = add nsw <4 x i32> %5, %10

	8610 ; CHECK-NEXT: %17 = add nsw <4 x i32> %6, %11

	8611 ; CHECK-NEXT: %18 = add nsw <4 x i32> %7, %12

	8612 ; CHECK-NEXT: %19 = add nsw <4 x i32> %8, %13

	8613 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8614 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8615 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8616 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8617 ; CHECK-NEXT: ret <4 x i32> %15

	8618

	8619 define <20 x i32> @add_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {

	8620 %3 = add nuw nsw <20 x i32> %0, %1

	8621 ret <20 x i32> %3

	8622 }

	8623 ; CHECK-LABEL: define <4 x i32> @add_binop_20xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8624 ; CHECK-NEXT: %15 = add nuw nsw <4 x i32> %4, %9

	8625 ; CHECK-NEXT: %16 = add nuw nsw <4 x i32> %5, %10

	8626 ; CHECK-NEXT: %17 = add nuw nsw <4 x i32> %6, %11

	8627 ; CHECK-NEXT: %18 = add nuw nsw <4 x i32> %7, %12

	8628 ; CHECK-NEXT: %19 = add nuw nsw <4 x i32> %8, %13

	8629 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8630 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8631 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8632 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8633 ; CHECK-NEXT: ret <4 x i32> %15

	8634

	8635 define <20 x i32> @sub_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {

	8636 %3 = sub nuw <20 x i32> %0, %1

	8637 ret <20 x i32> %3

	8638 }

	8639 ; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8640 ; CHECK-NEXT: %15 = sub nuw <4 x i32> %4, %9

	8641 ; CHECK-NEXT: %16 = sub nuw <4 x i32> %5, %10

	8642 ; CHECK-NEXT: %17 = sub nuw <4 x i32> %6, %11

	8643 ; CHECK-NEXT: %18 = sub nuw <4 x i32> %7, %12

	8644 ; CHECK-NEXT: %19 = sub nuw <4 x i32> %8, %13

	8645 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8646 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8647 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8648 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8649 ; CHECK-NEXT: ret <4 x i32> %15

	8650

	8651 define <20 x i32> @sub_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {

	8652 %3 = sub nsw <20 x i32> %0, %1

	8653 ret <20 x i32> %3

	8654 }

	8655 ; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8656 ; CHECK-NEXT: %15 = sub nsw <4 x i32> %4, %9

	8657 ; CHECK-NEXT: %16 = sub nsw <4 x i32> %5, %10

	8658 ; CHECK-NEXT: %17 = sub nsw <4 x i32> %6, %11

	8659 ; CHECK-NEXT: %18 = sub nsw <4 x i32> %7, %12

	8660 ; CHECK-NEXT: %19 = sub nsw <4 x i32> %8, %13

	8661 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8662 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8663 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8664 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8665 ; CHECK-NEXT: ret <4 x i32> %15

	8666

	8667 define <20 x i32> @sub_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {

	8668 %3 = sub nuw nsw <20 x i32> %0, %1

	8669 ret <20 x i32> %3

	8670 }

	8671 ; CHECK-LABEL: define <4 x i32> @sub_binop_20xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8672 ; CHECK-NEXT: %15 = sub nuw nsw <4 x i32> %4, %9

	8673 ; CHECK-NEXT: %16 = sub nuw nsw <4 x i32> %5, %10

	8674 ; CHECK-NEXT: %17 = sub nuw nsw <4 x i32> %6, %11

	8675 ; CHECK-NEXT: %18 = sub nuw nsw <4 x i32> %7, %12

	8676 ; CHECK-NEXT: %19 = sub nuw nsw <4 x i32> %8, %13

	8677 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8678 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8679 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8680 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8681 ; CHECK-NEXT: ret <4 x i32> %15

	8682

	8683 define <20 x i32> @mul_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {

	8684 %3 = mul nuw <20 x i32> %0, %1

	8685 ret <20 x i32> %3

	8686 }

	8687 ; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8688 ; CHECK-NEXT: %15 = mul nuw <4 x i32> %4, %9

	8689 ; CHECK-NEXT: %16 = mul nuw <4 x i32> %5, %10

	8690 ; CHECK-NEXT: %17 = mul nuw <4 x i32> %6, %11

	8691 ; CHECK-NEXT: %18 = mul nuw <4 x i32> %7, %12

	8692 ; CHECK-NEXT: %19 = mul nuw <4 x i32> %8, %13

	8693 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8694 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8695 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8696 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8697 ; CHECK-NEXT: ret <4 x i32> %15

	8698

	8699 define <20 x i32> @mul_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {

	8700 %3 = mul nsw <20 x i32> %0, %1

	8701 ret <20 x i32> %3

	8702 }

	8703 ; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8704 ; CHECK-NEXT: %15 = mul nsw <4 x i32> %4, %9

	8705 ; CHECK-NEXT: %16 = mul nsw <4 x i32> %5, %10

	8706 ; CHECK-NEXT: %17 = mul nsw <4 x i32> %6, %11

	8707 ; CHECK-NEXT: %18 = mul nsw <4 x i32> %7, %12

	8708 ; CHECK-NEXT: %19 = mul nsw <4 x i32> %8, %13

	8709 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8710 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8711 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8712 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8713 ; CHECK-NEXT: ret <4 x i32> %15

	8714

	8715 define <20 x i32> @mul_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {

	8716 %3 = mul nuw nsw <20 x i32> %0, %1

	8717 ret <20 x i32> %3

	8718 }

	8719 ; CHECK-LABEL: define <4 x i32> @mul_binop_20xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8720 ; CHECK-NEXT: %15 = mul nuw nsw <4 x i32> %4, %9

	8721 ; CHECK-NEXT: %16 = mul nuw nsw <4 x i32> %5, %10

	8722 ; CHECK-NEXT: %17 = mul nuw nsw <4 x i32> %6, %11

	8723 ; CHECK-NEXT: %18 = mul nuw nsw <4 x i32> %7, %12

	8724 ; CHECK-NEXT: %19 = mul nuw nsw <4 x i32> %8, %13

	8725 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8726 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8727 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8728 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8729 ; CHECK-NEXT: ret <4 x i32> %15

	8730

	8731 define <20 x i32> @shl_binop_20xi32_nuw(<20 x i32>, <20 x i32>) {

	8732 %3 = shl nuw <20 x i32> %0, %1

	8733 ret <20 x i32> %3

	8734 }

	8735 ; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nuw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8736 ; CHECK-NEXT: %15 = shl nuw <4 x i32> %4, %9

	8737 ; CHECK-NEXT: %16 = shl nuw <4 x i32> %5, %10

	8738 ; CHECK-NEXT: %17 = shl nuw <4 x i32> %6, %11

	8739 ; CHECK-NEXT: %18 = shl nuw <4 x i32> %7, %12

	8740 ; CHECK-NEXT: %19 = shl nuw <4 x i32> %8, %13

	8741 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8742 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8743 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8744 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8745 ; CHECK-NEXT: ret <4 x i32> %15

	8746

	8747 define <20 x i32> @shl_binop_20xi32_nsw(<20 x i32>, <20 x i32>) {

	8748 %3 = shl nsw <20 x i32> %0, %1

	8749 ret <20 x i32> %3

	8750 }

	8751 ; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nsw(<4 x i32>* nocapture nonnu ll dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i 32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull derefer enceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8752 ; CHECK-NEXT: %15 = shl nsw <4 x i32> %4, %9

	8753 ; CHECK-NEXT: %16 = shl nsw <4 x i32> %5, %10

	8754 ; CHECK-NEXT: %17 = shl nsw <4 x i32> %6, %11

	8755 ; CHECK-NEXT: %18 = shl nsw <4 x i32> %7, %12

	8756 ; CHECK-NEXT: %19 = shl nsw <4 x i32> %8, %13

	8757 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8758 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8759 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8760 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8761 ; CHECK-NEXT: ret <4 x i32> %15

	8762

	8763 define <20 x i32> @shl_binop_20xi32_nuw_nsw(<20 x i32>, <20 x i32>) {

	8764 %3 = shl nuw nsw <20 x i32> %0, %1

	8765 ret <20 x i32> %3

	8766 }

	8767 ; CHECK-LABEL: define <4 x i32> @shl_binop_20xi32_nuw_nsw(<4 x i32>* nocapture n onnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull der eferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i3 2>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8768 ; CHECK-NEXT: %15 = shl nuw nsw <4 x i32> %4, %9

	8769 ; CHECK-NEXT: %16 = shl nuw nsw <4 x i32> %5, %10

	8770 ; CHECK-NEXT: %17 = shl nuw nsw <4 x i32> %6, %11

	8771 ; CHECK-NEXT: %18 = shl nuw nsw <4 x i32> %7, %12

	8772 ; CHECK-NEXT: %19 = shl nuw nsw <4 x i32> %8, %13

	8773 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8774 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8775 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8776 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8777 ; CHECK-NEXT: ret <4 x i32> %15

	8778

	8779 define <20 x i32> @udiv_binop_20xi32(<20 x i32>, <20 x i32>) {

	8780 %3 = udiv <20 x i32> %0, %1

	8781 ret <20 x i32> %3

	8782 }

	8783 ; CHECK-LABEL: define <4 x i32> @udiv_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8784 ; CHECK-NEXT: %15 = udiv <4 x i32> %4, %9

	8785 ; CHECK-NEXT: %16 = udiv <4 x i32> %5, %10

	8786 ; CHECK-NEXT: %17 = udiv <4 x i32> %6, %11

	8787 ; CHECK-NEXT: %18 = udiv <4 x i32> %7, %12

	8788 ; CHECK-NEXT: %19 = udiv <4 x i32> %8, %13

	8789 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8790 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8791 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8792 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8793 ; CHECK-NEXT: ret <4 x i32> %15

	8794

	8795 define <20 x i32> @udiv_binop_20xi32_exact(<20 x i32>, <20 x i32>) {

	8796 %3 = udiv exact <20 x i32> %0, %1

	8797 ret <20 x i32> %3

	8798 }

	8799 ; CHECK-LABEL: define <4 x i32> @udiv_binop_20xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dere ferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8800 ; CHECK-NEXT: %15 = udiv exact <4 x i32> %4, %9

	8801 ; CHECK-NEXT: %16 = udiv exact <4 x i32> %5, %10

	8802 ; CHECK-NEXT: %17 = udiv exact <4 x i32> %6, %11

	8803 ; CHECK-NEXT: %18 = udiv exact <4 x i32> %7, %12

	8804 ; CHECK-NEXT: %19 = udiv exact <4 x i32> %8, %13

	8805 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8806 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8807 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8808 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8809 ; CHECK-NEXT: ret <4 x i32> %15

	8810

	8811 define <20 x i32> @sdiv_binop_20xi32(<20 x i32>, <20 x i32>) {

	8812 %3 = sdiv <20 x i32> %0, %1

	8813 ret <20 x i32> %3

	8814 }

	8815 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8816 ; CHECK-NEXT: %15 = sdiv <4 x i32> %4, %9

	8817 ; CHECK-NEXT: %16 = sdiv <4 x i32> %5, %10

	8818 ; CHECK-NEXT: %17 = sdiv <4 x i32> %6, %11

	8819 ; CHECK-NEXT: %18 = sdiv <4 x i32> %7, %12

	8820 ; CHECK-NEXT: %19 = sdiv <4 x i32> %8, %13

	8821 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8822 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8823 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8824 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8825 ; CHECK-NEXT: ret <4 x i32> %15

	8826

	8827 define <20 x i32> @sdiv_binop_20xi32_exact(<20 x i32>, <20 x i32>) {

	8828 %3 = sdiv exact <20 x i32> %0, %1

	8829 ret <20 x i32> %3

	8830 }

	8831 ; CHECK-LABEL: define <4 x i32> @sdiv_binop_20xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dere ferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8832 ; CHECK-NEXT: %15 = sdiv exact <4 x i32> %4, %9

	8833 ; CHECK-NEXT: %16 = sdiv exact <4 x i32> %5, %10

	8834 ; CHECK-NEXT: %17 = sdiv exact <4 x i32> %6, %11

	8835 ; CHECK-NEXT: %18 = sdiv exact <4 x i32> %7, %12

	8836 ; CHECK-NEXT: %19 = sdiv exact <4 x i32> %8, %13

	8837 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8838 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8839 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8840 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8841 ; CHECK-NEXT: ret <4 x i32> %15

	8842

	8843 define <20 x i32> @lshr_binop_20xi32(<20 x i32>, <20 x i32>) {

	8844 %3 = lshr <20 x i32> %0, %1

	8845 ret <20 x i32> %3

	8846 }

	8847 ; CHECK-LABEL: define <4 x i32> @lshr_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8848 ; CHECK-NEXT: %15 = lshr <4 x i32> %4, %9

	8849 ; CHECK-NEXT: %16 = lshr <4 x i32> %5, %10

	8850 ; CHECK-NEXT: %17 = lshr <4 x i32> %6, %11

	8851 ; CHECK-NEXT: %18 = lshr <4 x i32> %7, %12

	8852 ; CHECK-NEXT: %19 = lshr <4 x i32> %8, %13

	8853 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8854 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8855 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8856 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8857 ; CHECK-NEXT: ret <4 x i32> %15

	8858

	8859 define <20 x i32> @lshr_binop_20xi32_exact(<20 x i32>, <20 x i32>) {

	8860 %3 = lshr exact <20 x i32> %0, %1

	8861 ret <20 x i32> %3

	8862 }

	8863 ; CHECK-LABEL: define <4 x i32> @lshr_binop_20xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dere ferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8864 ; CHECK-NEXT: %15 = lshr exact <4 x i32> %4, %9

	8865 ; CHECK-NEXT: %16 = lshr exact <4 x i32> %5, %10

	8866 ; CHECK-NEXT: %17 = lshr exact <4 x i32> %6, %11

	8867 ; CHECK-NEXT: %18 = lshr exact <4 x i32> %7, %12

	8868 ; CHECK-NEXT: %19 = lshr exact <4 x i32> %8, %13

	8869 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8870 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8871 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8872 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8873 ; CHECK-NEXT: ret <4 x i32> %15

	8874

	8875 define <20 x i32> @ashr_binop_20xi32(<20 x i32>, <20 x i32>) {

	8876 %3 = ashr <20 x i32> %0, %1

	8877 ret <20 x i32> %3

	8878 }

	8879 ; CHECK-LABEL: define <4 x i32> @ashr_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8880 ; CHECK-NEXT: %15 = ashr <4 x i32> %4, %9

	8881 ; CHECK-NEXT: %16 = ashr <4 x i32> %5, %10

	8882 ; CHECK-NEXT: %17 = ashr <4 x i32> %6, %11

	8883 ; CHECK-NEXT: %18 = ashr <4 x i32> %7, %12

	8884 ; CHECK-NEXT: %19 = ashr <4 x i32> %8, %13

	8885 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8886 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8887 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8888 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8889 ; CHECK-NEXT: ret <4 x i32> %15

	8890

	8891 define <20 x i32> @ashr_binop_20xi32_exact(<20 x i32>, <20 x i32>) {

	8892 %3 = ashr exact <20 x i32> %0, %1

	8893 ret <20 x i32> %3

	8894 }

	8895 ; CHECK-LABEL: define <4 x i32> @ashr_binop_20xi32_exact(<4 x i32>* nocapture no nnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dere ferenceable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32 >, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8896 ; CHECK-NEXT: %15 = ashr exact <4 x i32> %4, %9

	8897 ; CHECK-NEXT: %16 = ashr exact <4 x i32> %5, %10

	8898 ; CHECK-NEXT: %17 = ashr exact <4 x i32> %6, %11

	8899 ; CHECK-NEXT: %18 = ashr exact <4 x i32> %7, %12

	8900 ; CHECK-NEXT: %19 = ashr exact <4 x i32> %8, %13

	8901 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8902 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8903 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8904 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8905 ; CHECK-NEXT: ret <4 x i32> %15

	8906

	8907 define <20 x i32> @and_binop_20xi32(<20 x i32>, <20 x i32>) {

	8908 %3 = and <20 x i32> %0, %1

	8909 ret <20 x i32> %3

	8910 }

	8911 ; CHECK-LABEL: define <4 x i32> @and_binop_20xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereference able(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8912 ; CHECK-NEXT: %15 = and <4 x i32> %4, %9

	8913 ; CHECK-NEXT: %16 = and <4 x i32> %5, %10

	8914 ; CHECK-NEXT: %17 = and <4 x i32> %6, %11

	8915 ; CHECK-NEXT: %18 = and <4 x i32> %7, %12

	8916 ; CHECK-NEXT: %19 = and <4 x i32> %8, %13

	8917 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8918 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8919 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8920 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8921 ; CHECK-NEXT: ret <4 x i32> %15

	8922

	8923 define <20 x i32> @xor_binop_20xi32(<20 x i32>, <20 x i32>) {

	8924 %3 = xor <20 x i32> %0, %1

	8925 ret <20 x i32> %3

	8926 }

	8927 ; CHECK-LABEL: define <4 x i32> @xor_binop_20xi32(<4 x i32>* nocapture nonnull d ereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereference able(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8928 ; CHECK-NEXT: %15 = xor <4 x i32> %4, %9

	8929 ; CHECK-NEXT: %16 = xor <4 x i32> %5, %10

	8930 ; CHECK-NEXT: %17 = xor <4 x i32> %6, %11

	8931 ; CHECK-NEXT: %18 = xor <4 x i32> %7, %12

	8932 ; CHECK-NEXT: %19 = xor <4 x i32> %8, %13

	8933 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8934 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8935 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8936 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8937 ; CHECK-NEXT: ret <4 x i32> %15

	8938

	8939 define <20 x i32> @or_binop_20xi32(<20 x i32>, <20 x i32>) {

	8940 %3 = or <20 x i32> %0, %1

	8941 ret <20 x i32> %3

	8942 }

	8943 ; CHECK-LABEL: define <4 x i32> @or_binop_20xi32(<4 x i32>* nocapture nonnull de referenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferencea ble(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8944 ; CHECK-NEXT: %15 = or <4 x i32> %4, %9

	8945 ; CHECK-NEXT: %16 = or <4 x i32> %5, %10

	8946 ; CHECK-NEXT: %17 = or <4 x i32> %6, %11

	8947 ; CHECK-NEXT: %18 = or <4 x i32> %7, %12

	8948 ; CHECK-NEXT: %19 = or <4 x i32> %8, %13

	8949 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8950 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8951 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8952 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8953 ; CHECK-NEXT: ret <4 x i32> %15

	8954

	8955 define <20 x i32> @urem_binop_20xi32(<20 x i32>, <20 x i32>) {

	8956 %3 = urem <20 x i32> %0, %1

	8957 ret <20 x i32> %3

	8958 }

	8959 ; CHECK-LABEL: define <4 x i32> @urem_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8960 ; CHECK-NEXT: %15 = urem <4 x i32> %4, %9

	8961 ; CHECK-NEXT: %16 = urem <4 x i32> %5, %10

	8962 ; CHECK-NEXT: %17 = urem <4 x i32> %6, %11

	8963 ; CHECK-NEXT: %18 = urem <4 x i32> %7, %12

	8964 ; CHECK-NEXT: %19 = urem <4 x i32> %8, %13

	8965 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8966 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8967 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8968 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8969 ; CHECK-NEXT: ret <4 x i32> %15

	8970

	8971 define <20 x i32> @srem_binop_20xi32(<20 x i32>, <20 x i32>) {

	8972 %3 = srem <20 x i32> %0, %1

	8973 ret <20 x i32> %3

	8974 }

	8975 ; CHECK-LABEL: define <4 x i32> @srem_binop_20xi32(<4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenceable(16), <4 x i32> * nocapture nonnull dereferenceable(16), <4 x i32>* nocapture nonnull dereferenc eable(16), <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32>)

	8976 ; CHECK-NEXT: %15 = srem <4 x i32> %4, %9

	8977 ; CHECK-NEXT: %16 = srem <4 x i32> %5, %10

	8978 ; CHECK-NEXT: %17 = srem <4 x i32> %6, %11

	8979 ; CHECK-NEXT: %18 = srem <4 x i32> %7, %12

	8980 ; CHECK-NEXT: %19 = srem <4 x i32> %8, %13

	8981 ; CHECK-NEXT: store <4 x i32> %16, <4 x i32>* %0, align 16

	8982 ; CHECK-NEXT: store <4 x i32> %17, <4 x i32>* %1, align 16

	8983 ; CHECK-NEXT: store <4 x i32> %18, <4 x i32>* %2, align 16

	8984 ; CHECK-NEXT: store <4 x i32> %19, <4 x i32>* %3, align 16

	8985 ; CHECK-NEXT: ret <4 x i32> %15

	8986

	8987 define <20 x i64> @add_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {

	8988 %3 = add nuw <20 x i64> %0, %1

	8989 ret <20 x i64> %3

	8990 }

	8991 ; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	8992 ; CHECK-NEXT: %30 = add nuw <2 x i64> %9, %19

	8993 ; CHECK-NEXT: %31 = add nuw <2 x i64> %10, %20

	8994 ; CHECK-NEXT: %32 = add nuw <2 x i64> %11, %21

	8995 ; CHECK-NEXT: %33 = add nuw <2 x i64> %12, %22

	8996 ; CHECK-NEXT: %34 = add nuw <2 x i64> %13, %23

	8997 ; CHECK-NEXT: %35 = add nuw <2 x i64> %14, %24

	8998 ; CHECK-NEXT: %36 = add nuw <2 x i64> %15, %25

	8999 ; CHECK-NEXT: %37 = add nuw <2 x i64> %16, %26

	9000 ; CHECK-NEXT: %38 = add nuw <2 x i64> %17, %27

	9001 ; CHECK-NEXT: %39 = add nuw <2 x i64> %18, %28

	9002 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9003 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9004 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9005 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9006 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9007 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9008 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9009 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9010 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9011 ; CHECK-NEXT: ret <2 x i64> %30

	9012

	9013 define <20 x i64> @add_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {

	9014 %3 = add nsw <20 x i64> %0, %1

	9015 ret <20 x i64> %3

	9016 }

	9017 ; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9018 ; CHECK-NEXT: %30 = add nsw <2 x i64> %9, %19

	9019 ; CHECK-NEXT: %31 = add nsw <2 x i64> %10, %20

	9020 ; CHECK-NEXT: %32 = add nsw <2 x i64> %11, %21

	9021 ; CHECK-NEXT: %33 = add nsw <2 x i64> %12, %22

	9022 ; CHECK-NEXT: %34 = add nsw <2 x i64> %13, %23

	9023 ; CHECK-NEXT: %35 = add nsw <2 x i64> %14, %24

	9024 ; CHECK-NEXT: %36 = add nsw <2 x i64> %15, %25

	9025 ; CHECK-NEXT: %37 = add nsw <2 x i64> %16, %26

	9026 ; CHECK-NEXT: %38 = add nsw <2 x i64> %17, %27

	9027 ; CHECK-NEXT: %39 = add nsw <2 x i64> %18, %28

	9028 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9029 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9030 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9031 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9032 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9033 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9034 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9035 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9036 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9037 ; CHECK-NEXT: ret <2 x i64> %30

	9038

	9039 define <20 x i64> @add_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {

	9040 %3 = add nuw nsw <20 x i64> %0, %1

	9041 ret <20 x i64> %3

	9042 }

	9043 ; CHECK-LABEL: define <2 x i64> @add_binop_20xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9044 ; CHECK-NEXT: %30 = add nuw nsw <2 x i64> %9, %19

	9045 ; CHECK-NEXT: %31 = add nuw nsw <2 x i64> %10, %20

	9046 ; CHECK-NEXT: %32 = add nuw nsw <2 x i64> %11, %21

	9047 ; CHECK-NEXT: %33 = add nuw nsw <2 x i64> %12, %22

	9048 ; CHECK-NEXT: %34 = add nuw nsw <2 x i64> %13, %23

	9049 ; CHECK-NEXT: %35 = add nuw nsw <2 x i64> %14, %24

	9050 ; CHECK-NEXT: %36 = add nuw nsw <2 x i64> %15, %25

	9051 ; CHECK-NEXT: %37 = add nuw nsw <2 x i64> %16, %26

	9052 ; CHECK-NEXT: %38 = add nuw nsw <2 x i64> %17, %27

	9053 ; CHECK-NEXT: %39 = add nuw nsw <2 x i64> %18, %28

	9054 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9055 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9056 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9057 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9058 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9059 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9060 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9061 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9062 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9063 ; CHECK-NEXT: ret <2 x i64> %30

	9064

	9065 define <20 x i64> @sub_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {

	9066 %3 = sub nuw <20 x i64> %0, %1

	9067 ret <20 x i64> %3

	9068 }

	9069 ; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9070 ; CHECK-NEXT: %30 = sub nuw <2 x i64> %9, %19

	9071 ; CHECK-NEXT: %31 = sub nuw <2 x i64> %10, %20

	9072 ; CHECK-NEXT: %32 = sub nuw <2 x i64> %11, %21

	9073 ; CHECK-NEXT: %33 = sub nuw <2 x i64> %12, %22

	9074 ; CHECK-NEXT: %34 = sub nuw <2 x i64> %13, %23

	9075 ; CHECK-NEXT: %35 = sub nuw <2 x i64> %14, %24

	9076 ; CHECK-NEXT: %36 = sub nuw <2 x i64> %15, %25

	9077 ; CHECK-NEXT: %37 = sub nuw <2 x i64> %16, %26

	9078 ; CHECK-NEXT: %38 = sub nuw <2 x i64> %17, %27

	9079 ; CHECK-NEXT: %39 = sub nuw <2 x i64> %18, %28

	9080 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9081 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9082 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9083 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9084 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9085 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9086 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9087 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9088 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9089 ; CHECK-NEXT: ret <2 x i64> %30

	9090

	9091 define <20 x i64> @sub_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {

	9092 %3 = sub nsw <20 x i64> %0, %1

	9093 ret <20 x i64> %3

	9094 }

	9095 ; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9096 ; CHECK-NEXT: %30 = sub nsw <2 x i64> %9, %19

	9097 ; CHECK-NEXT: %31 = sub nsw <2 x i64> %10, %20

	9098 ; CHECK-NEXT: %32 = sub nsw <2 x i64> %11, %21

	9099 ; CHECK-NEXT: %33 = sub nsw <2 x i64> %12, %22

	9100 ; CHECK-NEXT: %34 = sub nsw <2 x i64> %13, %23

	9101 ; CHECK-NEXT: %35 = sub nsw <2 x i64> %14, %24

	9102 ; CHECK-NEXT: %36 = sub nsw <2 x i64> %15, %25

	9103 ; CHECK-NEXT: %37 = sub nsw <2 x i64> %16, %26

	9104 ; CHECK-NEXT: %38 = sub nsw <2 x i64> %17, %27

	9105 ; CHECK-NEXT: %39 = sub nsw <2 x i64> %18, %28

	9106 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9107 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9108 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9109 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9110 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9111 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9112 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9113 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9114 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9115 ; CHECK-NEXT: ret <2 x i64> %30

	9116

	9117 define <20 x i64> @sub_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {

	9118 %3 = sub nuw nsw <20 x i64> %0, %1

	9119 ret <20 x i64> %3

	9120 }

	9121 ; CHECK-LABEL: define <2 x i64> @sub_binop_20xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9122 ; CHECK-NEXT: %30 = sub nuw nsw <2 x i64> %9, %19

	9123 ; CHECK-NEXT: %31 = sub nuw nsw <2 x i64> %10, %20

	9124 ; CHECK-NEXT: %32 = sub nuw nsw <2 x i64> %11, %21

	9125 ; CHECK-NEXT: %33 = sub nuw nsw <2 x i64> %12, %22

	9126 ; CHECK-NEXT: %34 = sub nuw nsw <2 x i64> %13, %23

	9127 ; CHECK-NEXT: %35 = sub nuw nsw <2 x i64> %14, %24

	9128 ; CHECK-NEXT: %36 = sub nuw nsw <2 x i64> %15, %25

	9129 ; CHECK-NEXT: %37 = sub nuw nsw <2 x i64> %16, %26

	9130 ; CHECK-NEXT: %38 = sub nuw nsw <2 x i64> %17, %27

	9131 ; CHECK-NEXT: %39 = sub nuw nsw <2 x i64> %18, %28

	9132 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9133 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9134 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9135 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9136 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9137 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9138 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9139 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9140 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9141 ; CHECK-NEXT: ret <2 x i64> %30

	9142

	9143 define <20 x i64> @mul_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {

	9144 %3 = mul nuw <20 x i64> %0, %1

	9145 ret <20 x i64> %3

	9146 }

	9147 ; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9148 ; CHECK-NEXT: %30 = mul nuw <2 x i64> %9, %19

	9149 ; CHECK-NEXT: %31 = mul nuw <2 x i64> %10, %20

	9150 ; CHECK-NEXT: %32 = mul nuw <2 x i64> %11, %21

	9151 ; CHECK-NEXT: %33 = mul nuw <2 x i64> %12, %22

	9152 ; CHECK-NEXT: %34 = mul nuw <2 x i64> %13, %23

	9153 ; CHECK-NEXT: %35 = mul nuw <2 x i64> %14, %24

	9154 ; CHECK-NEXT: %36 = mul nuw <2 x i64> %15, %25

	9155 ; CHECK-NEXT: %37 = mul nuw <2 x i64> %16, %26

	9156 ; CHECK-NEXT: %38 = mul nuw <2 x i64> %17, %27

	9157 ; CHECK-NEXT: %39 = mul nuw <2 x i64> %18, %28

	9158 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9159 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9160 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9161 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9162 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9163 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9164 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9165 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9166 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9167 ; CHECK-NEXT: ret <2 x i64> %30

	9168

	9169 define <20 x i64> @mul_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {

	9170 %3 = mul nsw <20 x i64> %0, %1

	9171 ret <20 x i64> %3

	9172 }

	9173 ; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9174 ; CHECK-NEXT: %30 = mul nsw <2 x i64> %9, %19

	9175 ; CHECK-NEXT: %31 = mul nsw <2 x i64> %10, %20

	9176 ; CHECK-NEXT: %32 = mul nsw <2 x i64> %11, %21

	9177 ; CHECK-NEXT: %33 = mul nsw <2 x i64> %12, %22

	9178 ; CHECK-NEXT: %34 = mul nsw <2 x i64> %13, %23

	9179 ; CHECK-NEXT: %35 = mul nsw <2 x i64> %14, %24

	9180 ; CHECK-NEXT: %36 = mul nsw <2 x i64> %15, %25

	9181 ; CHECK-NEXT: %37 = mul nsw <2 x i64> %16, %26

	9182 ; CHECK-NEXT: %38 = mul nsw <2 x i64> %17, %27

	9183 ; CHECK-NEXT: %39 = mul nsw <2 x i64> %18, %28

	9184 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9185 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9186 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9187 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9188 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9189 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9190 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9191 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9192 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9193 ; CHECK-NEXT: ret <2 x i64> %30

	9194

	9195 define <20 x i64> @mul_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {

	9196 %3 = mul nuw nsw <20 x i64> %0, %1

	9197 ret <20 x i64> %3

	9198 }

	9199 ; CHECK-LABEL: define <2 x i64> @mul_binop_20xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9200 ; CHECK-NEXT: %30 = mul nuw nsw <2 x i64> %9, %19

	9201 ; CHECK-NEXT: %31 = mul nuw nsw <2 x i64> %10, %20

	9202 ; CHECK-NEXT: %32 = mul nuw nsw <2 x i64> %11, %21

	9203 ; CHECK-NEXT: %33 = mul nuw nsw <2 x i64> %12, %22

	9204 ; CHECK-NEXT: %34 = mul nuw nsw <2 x i64> %13, %23

	9205 ; CHECK-NEXT: %35 = mul nuw nsw <2 x i64> %14, %24

	9206 ; CHECK-NEXT: %36 = mul nuw nsw <2 x i64> %15, %25

	9207 ; CHECK-NEXT: %37 = mul nuw nsw <2 x i64> %16, %26

	9208 ; CHECK-NEXT: %38 = mul nuw nsw <2 x i64> %17, %27

	9209 ; CHECK-NEXT: %39 = mul nuw nsw <2 x i64> %18, %28

	9210 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9211 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9212 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9213 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9214 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9215 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9216 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9217 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9218 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9219 ; CHECK-NEXT: ret <2 x i64> %30

	9220

	9221 define <20 x i64> @shl_binop_20xi64_nuw(<20 x i64>, <20 x i64>) {

	9222 %3 = shl nuw <20 x i64> %0, %1

	9223 ret <20 x i64> %3

	9224 }

	9225 ; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nuw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9226 ; CHECK-NEXT: %30 = shl nuw <2 x i64> %9, %19

	9227 ; CHECK-NEXT: %31 = shl nuw <2 x i64> %10, %20

	9228 ; CHECK-NEXT: %32 = shl nuw <2 x i64> %11, %21

	9229 ; CHECK-NEXT: %33 = shl nuw <2 x i64> %12, %22

	9230 ; CHECK-NEXT: %34 = shl nuw <2 x i64> %13, %23

	9231 ; CHECK-NEXT: %35 = shl nuw <2 x i64> %14, %24

	9232 ; CHECK-NEXT: %36 = shl nuw <2 x i64> %15, %25

	9233 ; CHECK-NEXT: %37 = shl nuw <2 x i64> %16, %26

	9234 ; CHECK-NEXT: %38 = shl nuw <2 x i64> %17, %27

	9235 ; CHECK-NEXT: %39 = shl nuw <2 x i64> %18, %28

	9236 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9237 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9238 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9239 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9240 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9241 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9242 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9243 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9244 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9245 ; CHECK-NEXT: ret <2 x i64> %30

	9246

	9247 define <20 x i64> @shl_binop_20xi64_nsw(<20 x i64>, <20 x i64>) {

	9248 %3 = shl nsw <20 x i64> %0, %1

	9249 ret <20 x i64> %3

	9250 }

	9251 ; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nsw(<2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i 64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull derefer enceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocap ture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(1 6), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnu ll dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>)

	9252 ; CHECK-NEXT: %30 = shl nsw <2 x i64> %9, %19

	9253 ; CHECK-NEXT: %31 = shl nsw <2 x i64> %10, %20

	9254 ; CHECK-NEXT: %32 = shl nsw <2 x i64> %11, %21

	9255 ; CHECK-NEXT: %33 = shl nsw <2 x i64> %12, %22

	9256 ; CHECK-NEXT: %34 = shl nsw <2 x i64> %13, %23

	9257 ; CHECK-NEXT: %35 = shl nsw <2 x i64> %14, %24

	9258 ; CHECK-NEXT: %36 = shl nsw <2 x i64> %15, %25

	9259 ; CHECK-NEXT: %37 = shl nsw <2 x i64> %16, %26

	9260 ; CHECK-NEXT: %38 = shl nsw <2 x i64> %17, %27

	9261 ; CHECK-NEXT: %39 = shl nsw <2 x i64> %18, %28

	9262 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9263 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9264 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9265 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9266 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9267 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9268 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9269 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9270 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9271 ; CHECK-NEXT: ret <2 x i64> %30

	9272

	9273 define <20 x i64> @shl_binop_20xi64_nuw_nsw(<20 x i64>, <20 x i64>) {

	9274 %3 = shl nuw nsw <20 x i64> %0, %1

	9275 ret <20 x i64> %3

	9276 }

	9277 ; CHECK-LABEL: define <2 x i64> @shl_binop_20xi64_nuw_nsw(<2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull der eferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* n ocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceab le(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture n onnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9278 ; CHECK-NEXT: %30 = shl nuw nsw <2 x i64> %9, %19

	9279 ; CHECK-NEXT: %31 = shl nuw nsw <2 x i64> %10, %20

	9280 ; CHECK-NEXT: %32 = shl nuw nsw <2 x i64> %11, %21

	9281 ; CHECK-NEXT: %33 = shl nuw nsw <2 x i64> %12, %22

	9282 ; CHECK-NEXT: %34 = shl nuw nsw <2 x i64> %13, %23

	9283 ; CHECK-NEXT: %35 = shl nuw nsw <2 x i64> %14, %24

	9284 ; CHECK-NEXT: %36 = shl nuw nsw <2 x i64> %15, %25

	9285 ; CHECK-NEXT: %37 = shl nuw nsw <2 x i64> %16, %26

	9286 ; CHECK-NEXT: %38 = shl nuw nsw <2 x i64> %17, %27

	9287 ; CHECK-NEXT: %39 = shl nuw nsw <2 x i64> %18, %28

	9288 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9289 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9290 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9291 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9292 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9293 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9294 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9295 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9296 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9297 ; CHECK-NEXT: ret <2 x i64> %30

	9298

	9299 define <20 x i64> @udiv_binop_20xi64(<20 x i64>, <20 x i64>) {

	9300 %3 = udiv <20 x i64> %0, %1

	9301 ret <20 x i64> %3

	9302 }

	9303 ; CHECK-LABEL: define <2 x i64> @udiv_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9304 ; CHECK-NEXT: %30 = udiv <2 x i64> %9, %19

	9305 ; CHECK-NEXT: %31 = udiv <2 x i64> %10, %20

	9306 ; CHECK-NEXT: %32 = udiv <2 x i64> %11, %21

	9307 ; CHECK-NEXT: %33 = udiv <2 x i64> %12, %22

	9308 ; CHECK-NEXT: %34 = udiv <2 x i64> %13, %23

	9309 ; CHECK-NEXT: %35 = udiv <2 x i64> %14, %24

	9310 ; CHECK-NEXT: %36 = udiv <2 x i64> %15, %25

	9311 ; CHECK-NEXT: %37 = udiv <2 x i64> %16, %26

	9312 ; CHECK-NEXT: %38 = udiv <2 x i64> %17, %27

	9313 ; CHECK-NEXT: %39 = udiv <2 x i64> %18, %28

	9314 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9315 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9316 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9317 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9318 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9319 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9320 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9321 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9322 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9323 ; CHECK-NEXT: ret <2 x i64> %30

	9324

	9325 define <20 x i64> @udiv_binop_20xi64_exact(<20 x i64>, <20 x i64>) {

	9326 %3 = udiv exact <20 x i64> %0, %1

	9327 ret <20 x i64> %3

	9328 }

	9329 ; CHECK-LABEL: define <2 x i64> @udiv_binop_20xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9330 ; CHECK-NEXT: %30 = udiv exact <2 x i64> %9, %19

	9331 ; CHECK-NEXT: %31 = udiv exact <2 x i64> %10, %20

	9332 ; CHECK-NEXT: %32 = udiv exact <2 x i64> %11, %21

	9333 ; CHECK-NEXT: %33 = udiv exact <2 x i64> %12, %22

	9334 ; CHECK-NEXT: %34 = udiv exact <2 x i64> %13, %23

	9335 ; CHECK-NEXT: %35 = udiv exact <2 x i64> %14, %24

	9336 ; CHECK-NEXT: %36 = udiv exact <2 x i64> %15, %25

	9337 ; CHECK-NEXT: %37 = udiv exact <2 x i64> %16, %26

	9338 ; CHECK-NEXT: %38 = udiv exact <2 x i64> %17, %27

	9339 ; CHECK-NEXT: %39 = udiv exact <2 x i64> %18, %28

	9340 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9341 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9342 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9343 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9344 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9345 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9346 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9347 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9348 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9349 ; CHECK-NEXT: ret <2 x i64> %30

	9350

	9351 define <20 x i64> @sdiv_binop_20xi64(<20 x i64>, <20 x i64>) {

	9352 %3 = sdiv <20 x i64> %0, %1

	9353 ret <20 x i64> %3

	9354 }

	9355 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9356 ; CHECK-NEXT: %30 = sdiv <2 x i64> %9, %19

	9357 ; CHECK-NEXT: %31 = sdiv <2 x i64> %10, %20

	9358 ; CHECK-NEXT: %32 = sdiv <2 x i64> %11, %21

	9359 ; CHECK-NEXT: %33 = sdiv <2 x i64> %12, %22

	9360 ; CHECK-NEXT: %34 = sdiv <2 x i64> %13, %23

	9361 ; CHECK-NEXT: %35 = sdiv <2 x i64> %14, %24

	9362 ; CHECK-NEXT: %36 = sdiv <2 x i64> %15, %25

	9363 ; CHECK-NEXT: %37 = sdiv <2 x i64> %16, %26

	9364 ; CHECK-NEXT: %38 = sdiv <2 x i64> %17, %27

	9365 ; CHECK-NEXT: %39 = sdiv <2 x i64> %18, %28

	9366 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9367 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9368 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9369 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9370 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9371 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9372 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9373 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9374 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9375 ; CHECK-NEXT: ret <2 x i64> %30

	9376

	9377 define <20 x i64> @sdiv_binop_20xi64_exact(<20 x i64>, <20 x i64>) {

	9378 %3 = sdiv exact <20 x i64> %0, %1

	9379 ret <20 x i64> %3

	9380 }

	9381 ; CHECK-LABEL: define <2 x i64> @sdiv_binop_20xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9382 ; CHECK-NEXT: %30 = sdiv exact <2 x i64> %9, %19

	9383 ; CHECK-NEXT: %31 = sdiv exact <2 x i64> %10, %20

	9384 ; CHECK-NEXT: %32 = sdiv exact <2 x i64> %11, %21

	9385 ; CHECK-NEXT: %33 = sdiv exact <2 x i64> %12, %22

	9386 ; CHECK-NEXT: %34 = sdiv exact <2 x i64> %13, %23

	9387 ; CHECK-NEXT: %35 = sdiv exact <2 x i64> %14, %24

	9388 ; CHECK-NEXT: %36 = sdiv exact <2 x i64> %15, %25

	9389 ; CHECK-NEXT: %37 = sdiv exact <2 x i64> %16, %26

	9390 ; CHECK-NEXT: %38 = sdiv exact <2 x i64> %17, %27

	9391 ; CHECK-NEXT: %39 = sdiv exact <2 x i64> %18, %28

	9392 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9393 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9394 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9395 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9396 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9397 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9398 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9399 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9400 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9401 ; CHECK-NEXT: ret <2 x i64> %30

	9402

	9403 define <20 x i64> @lshr_binop_20xi64(<20 x i64>, <20 x i64>) {

	9404 %3 = lshr <20 x i64> %0, %1

	9405 ret <20 x i64> %3

	9406 }

	9407 ; CHECK-LABEL: define <2 x i64> @lshr_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9408 ; CHECK-NEXT: %30 = lshr <2 x i64> %9, %19

	9409 ; CHECK-NEXT: %31 = lshr <2 x i64> %10, %20

	9410 ; CHECK-NEXT: %32 = lshr <2 x i64> %11, %21

	9411 ; CHECK-NEXT: %33 = lshr <2 x i64> %12, %22

	9412 ; CHECK-NEXT: %34 = lshr <2 x i64> %13, %23

	9413 ; CHECK-NEXT: %35 = lshr <2 x i64> %14, %24

	9414 ; CHECK-NEXT: %36 = lshr <2 x i64> %15, %25

	9415 ; CHECK-NEXT: %37 = lshr <2 x i64> %16, %26

	9416 ; CHECK-NEXT: %38 = lshr <2 x i64> %17, %27

	9417 ; CHECK-NEXT: %39 = lshr <2 x i64> %18, %28

	9418 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9419 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9420 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9421 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9422 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9423 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9424 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9425 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9426 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9427 ; CHECK-NEXT: ret <2 x i64> %30

	9428

	9429 define <20 x i64> @lshr_binop_20xi64_exact(<20 x i64>, <20 x i64>) {

	9430 %3 = lshr exact <20 x i64> %0, %1

	9431 ret <20 x i64> %3

	9432 }

	9433 ; CHECK-LABEL: define <2 x i64> @lshr_binop_20xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9434 ; CHECK-NEXT: %30 = lshr exact <2 x i64> %9, %19

	9435 ; CHECK-NEXT: %31 = lshr exact <2 x i64> %10, %20

	9436 ; CHECK-NEXT: %32 = lshr exact <2 x i64> %11, %21

	9437 ; CHECK-NEXT: %33 = lshr exact <2 x i64> %12, %22

	9438 ; CHECK-NEXT: %34 = lshr exact <2 x i64> %13, %23

	9439 ; CHECK-NEXT: %35 = lshr exact <2 x i64> %14, %24

	9440 ; CHECK-NEXT: %36 = lshr exact <2 x i64> %15, %25

	9441 ; CHECK-NEXT: %37 = lshr exact <2 x i64> %16, %26

	9442 ; CHECK-NEXT: %38 = lshr exact <2 x i64> %17, %27

	9443 ; CHECK-NEXT: %39 = lshr exact <2 x i64> %18, %28

	9444 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9445 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9446 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9447 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9448 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9449 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9450 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9451 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9452 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9453 ; CHECK-NEXT: ret <2 x i64> %30

	9454

	9455 define <20 x i64> @ashr_binop_20xi64(<20 x i64>, <20 x i64>) {

	9456 %3 = ashr <20 x i64> %0, %1

	9457 ret <20 x i64> %3

	9458 }

	9459 ; CHECK-LABEL: define <2 x i64> @ashr_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9460 ; CHECK-NEXT: %30 = ashr <2 x i64> %9, %19

	9461 ; CHECK-NEXT: %31 = ashr <2 x i64> %10, %20

	9462 ; CHECK-NEXT: %32 = ashr <2 x i64> %11, %21

	9463 ; CHECK-NEXT: %33 = ashr <2 x i64> %12, %22

	9464 ; CHECK-NEXT: %34 = ashr <2 x i64> %13, %23

	9465 ; CHECK-NEXT: %35 = ashr <2 x i64> %14, %24

	9466 ; CHECK-NEXT: %36 = ashr <2 x i64> %15, %25

	9467 ; CHECK-NEXT: %37 = ashr <2 x i64> %16, %26

	9468 ; CHECK-NEXT: %38 = ashr <2 x i64> %17, %27

	9469 ; CHECK-NEXT: %39 = ashr <2 x i64> %18, %28

	9470 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9471 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9472 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9473 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9474 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9475 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9476 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9477 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9478 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9479 ; CHECK-NEXT: ret <2 x i64> %30

	9480

	9481 define <20 x i64> @ashr_binop_20xi64_exact(<20 x i64>, <20 x i64>) {

	9482 %3 = ashr exact <20 x i64> %0, %1

	9483 ret <20 x i64> %3

	9484 }

	9485 ; CHECK-LABEL: define <2 x i64> @ashr_binop_20xi64_exact(<2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dere ferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* no capture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceabl e(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture no nnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, < 2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9486 ; CHECK-NEXT: %30 = ashr exact <2 x i64> %9, %19

	9487 ; CHECK-NEXT: %31 = ashr exact <2 x i64> %10, %20

	9488 ; CHECK-NEXT: %32 = ashr exact <2 x i64> %11, %21

	9489 ; CHECK-NEXT: %33 = ashr exact <2 x i64> %12, %22

	9490 ; CHECK-NEXT: %34 = ashr exact <2 x i64> %13, %23

	9491 ; CHECK-NEXT: %35 = ashr exact <2 x i64> %14, %24

	9492 ; CHECK-NEXT: %36 = ashr exact <2 x i64> %15, %25

	9493 ; CHECK-NEXT: %37 = ashr exact <2 x i64> %16, %26

	9494 ; CHECK-NEXT: %38 = ashr exact <2 x i64> %17, %27

	9495 ; CHECK-NEXT: %39 = ashr exact <2 x i64> %18, %28

	9496 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9497 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9498 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9499 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9500 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9501 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9502 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9503 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9504 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9505 ; CHECK-NEXT: ret <2 x i64> %30

	9506

	9507 define <20 x i64> @and_binop_20xi64(<20 x i64>, <20 x i64>) {

	9508 %3 = and <20 x i64> %0, %1

	9509 ret <20 x i64> %3

	9510 }

	9511 ; CHECK-LABEL: define <2 x i64> @and_binop_20xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9512 ; CHECK-NEXT: %30 = and <2 x i64> %9, %19

	9513 ; CHECK-NEXT: %31 = and <2 x i64> %10, %20

	9514 ; CHECK-NEXT: %32 = and <2 x i64> %11, %21

	9515 ; CHECK-NEXT: %33 = and <2 x i64> %12, %22

	9516 ; CHECK-NEXT: %34 = and <2 x i64> %13, %23

	9517 ; CHECK-NEXT: %35 = and <2 x i64> %14, %24

	9518 ; CHECK-NEXT: %36 = and <2 x i64> %15, %25

	9519 ; CHECK-NEXT: %37 = and <2 x i64> %16, %26

	9520 ; CHECK-NEXT: %38 = and <2 x i64> %17, %27

	9521 ; CHECK-NEXT: %39 = and <2 x i64> %18, %28

	9522 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9523 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9524 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9525 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9526 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9527 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9528 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9529 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9530 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9531 ; CHECK-NEXT: ret <2 x i64> %30

	9532

	9533 define <20 x i64> @xor_binop_20xi64(<20 x i64>, <20 x i64>) {

	9534 %3 = xor <20 x i64> %0, %1

	9535 ret <20 x i64> %3

	9536 }

	9537 ; CHECK-LABEL: define <2 x i64> @xor_binop_20xi64(<2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereference able(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull d ereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64 >, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9538 ; CHECK-NEXT: %30 = xor <2 x i64> %9, %19

	9539 ; CHECK-NEXT: %31 = xor <2 x i64> %10, %20

	9540 ; CHECK-NEXT: %32 = xor <2 x i64> %11, %21

	9541 ; CHECK-NEXT: %33 = xor <2 x i64> %12, %22

	9542 ; CHECK-NEXT: %34 = xor <2 x i64> %13, %23

	9543 ; CHECK-NEXT: %35 = xor <2 x i64> %14, %24

	9544 ; CHECK-NEXT: %36 = xor <2 x i64> %15, %25

	9545 ; CHECK-NEXT: %37 = xor <2 x i64> %16, %26

	9546 ; CHECK-NEXT: %38 = xor <2 x i64> %17, %27

	9547 ; CHECK-NEXT: %39 = xor <2 x i64> %18, %28

	9548 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9549 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9550 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9551 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9552 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9553 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9554 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9555 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9556 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9557 ; CHECK-NEXT: ret <2 x i64> %30

	9558

	9559 define <20 x i64> @or_binop_20xi64(<20 x i64>, <20 x i64>) {

	9560 %3 = or <20 x i64> %0, %1

	9561 ret <20 x i64> %3

	9562 }

	9563 ; CHECK-LABEL: define <2 x i64> @or_binop_20xi64(<2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferencea ble(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), < 2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull de referenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i 64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> , <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9564 ; CHECK-NEXT: %30 = or <2 x i64> %9, %19

	9565 ; CHECK-NEXT: %31 = or <2 x i64> %10, %20

	9566 ; CHECK-NEXT: %32 = or <2 x i64> %11, %21

	9567 ; CHECK-NEXT: %33 = or <2 x i64> %12, %22

	9568 ; CHECK-NEXT: %34 = or <2 x i64> %13, %23

	9569 ; CHECK-NEXT: %35 = or <2 x i64> %14, %24

	9570 ; CHECK-NEXT: %36 = or <2 x i64> %15, %25

	9571 ; CHECK-NEXT: %37 = or <2 x i64> %16, %26

	9572 ; CHECK-NEXT: %38 = or <2 x i64> %17, %27

	9573 ; CHECK-NEXT: %39 = or <2 x i64> %18, %28

	9574 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9575 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9576 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9577 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9578 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9579 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9580 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9581 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9582 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9583 ; CHECK-NEXT: ret <2 x i64> %30

	9584

	9585 define <20 x i64> @urem_binop_20xi64(<20 x i64>, <20 x i64>) {

	9586 %3 = urem <20 x i64> %0, %1

	9587 ret <20 x i64> %3

	9588 }

	9589 ; CHECK-LABEL: define <2 x i64> @urem_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9590 ; CHECK-NEXT: %30 = urem <2 x i64> %9, %19

	9591 ; CHECK-NEXT: %31 = urem <2 x i64> %10, %20

	9592 ; CHECK-NEXT: %32 = urem <2 x i64> %11, %21

	9593 ; CHECK-NEXT: %33 = urem <2 x i64> %12, %22

	9594 ; CHECK-NEXT: %34 = urem <2 x i64> %13, %23

	9595 ; CHECK-NEXT: %35 = urem <2 x i64> %14, %24

	9596 ; CHECK-NEXT: %36 = urem <2 x i64> %15, %25

	9597 ; CHECK-NEXT: %37 = urem <2 x i64> %16, %26

	9598 ; CHECK-NEXT: %38 = urem <2 x i64> %17, %27

	9599 ; CHECK-NEXT: %39 = urem <2 x i64> %18, %28

	9600 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9601 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9602 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9603 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9604 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9605 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9606 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9607 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9608 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9609 ; CHECK-NEXT: ret <2 x i64> %30

	9610

	9611 define <20 x i64> @srem_binop_20xi64(<20 x i64>, <20 x i64>) {

	9612 %3 = srem <20 x i64> %0, %1

	9613 ret <20 x i64> %3

	9614 }

	9615 ; CHECK-LABEL: define <2 x i64> @srem_binop_20xi64(<2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64> * nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenc eable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocaptur e nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>* nocapture nonnull dereferenceable(16), <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i6 4>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>)

	9616 ; CHECK-NEXT: %30 = srem <2 x i64> %9, %19

	9617 ; CHECK-NEXT: %31 = srem <2 x i64> %10, %20

	9618 ; CHECK-NEXT: %32 = srem <2 x i64> %11, %21

	9619 ; CHECK-NEXT: %33 = srem <2 x i64> %12, %22

	9620 ; CHECK-NEXT: %34 = srem <2 x i64> %13, %23

	9621 ; CHECK-NEXT: %35 = srem <2 x i64> %14, %24

	9622 ; CHECK-NEXT: %36 = srem <2 x i64> %15, %25

	9623 ; CHECK-NEXT: %37 = srem <2 x i64> %16, %26

	9624 ; CHECK-NEXT: %38 = srem <2 x i64> %17, %27

	9625 ; CHECK-NEXT: %39 = srem <2 x i64> %18, %28

	9626 ; CHECK-NEXT: store <2 x i64> %31, <2 x i64>* %0, align 16

	9627 ; CHECK-NEXT: store <2 x i64> %32, <2 x i64>* %1, align 16

	9628 ; CHECK-NEXT: store <2 x i64> %33, <2 x i64>* %2, align 16

	9629 ; CHECK-NEXT: store <2 x i64> %34, <2 x i64>* %3, align 16

	9630 ; CHECK-NEXT: store <2 x i64> %35, <2 x i64>* %4, align 16

	9631 ; CHECK-NEXT: store <2 x i64> %36, <2 x i64>* %5, align 16

	9632 ; CHECK-NEXT: store <2 x i64> %37, <2 x i64>* %6, align 16

	9633 ; CHECK-NEXT: store <2 x i64> %38, <2 x i64>* %7, align 16

	9634 ; CHECK-NEXT: store <2 x i64> %39, <2 x i64>* %8, align 16

	9635 ; CHECK-NEXT: ret <2 x i64> %30

	9636

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