MIPS: Fix unaligned read of bytecodes in interpreter.

src/utils.h

Index: src/utils.h
diff --git a/src/utils.h b/src/utils.h
index 0426ce51cb7dd1ea5e49663fb4c71dcc1a6a8b2f..b80403a31e058125e51383b5eda8e56f6687607a 100644
--- a/src/utils.h
+++ b/src/utils.h
@@ -1734,6 +1734,42 @@ static inline void WriteDoubleValue(void* p, double value) {
 #endif  // V8_TARGET_ARCH_MIPS
 }
 
+
+static inline uint16_t ReadShortValue(const void* p) {
+#ifndef V8_TARGET_ARCH_MIPS

[paul.l..., 2015/10/30 17:40:32]

This needs to be done for MIPS64 also (unlike the ReadDoubleValue() which is
needed only on 32-bit MIPS.)

[akos.palfi.imgtec, 2015/10/30 22:26:32]

Done.

+  return *reinterpret_cast<uint6_t*>(p);
+#else   // V8_TARGET_ARCH_MIPS
+  // Prevent compiler from using load-half (mips lh) on (possibly)
+  // non-16-bit aligned address.
+  union conversion {
+    uint16_t d;
+    uint8_t u[2];

[paul.l..., 2015/10/30 17:40:32]

the field names should be h and b (for half-word and byte). Here and below.

[akos.palfi.imgtec, 2015/10/30 22:26:32]

Done.

+  } c;
+  const uint8_t* ptr = reinterpret_cast<const uint8_t*>(p);
+  c.u[0] = *ptr;
+  c.u[1] = *(ptr + 1);
+  return c.d;
+#endif  // V8_TARGET_ARCH_MIPS
+}
+
+
+static inline void WriteShortValue(void* p, uint16_t value) {
+#ifndef V8_TARGET_ARCH_MIPS
+  *(reinterpret_cast<uint16_t*>(p)) = value;
+#else   // V8_TARGET_ARCH_MIPS
+  // Prevent compiler from using store-half (mips sh) on (possibly)
+  // non-16-bit aligned address.
+  union conversion {
+    uint16_t d;
+    uint8_t u[2];
+  } c;
+  c.d = value;
+  uint8_t* ptr = reinterpret_cast<uint8_t*>(p);
+  *ptr = c.u[0];
+  *(ptr + 1) = c.u[1];
+#endif  // V8_TARGET_ARCH_MIPS
+}
+
 }  // namespace internal
 }  // namespace v8