Subzero. ARM32. Address mode formation.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 15 matching lines @@
 namespace Ice {
 
 namespace {
 
 const struct TypeARM32Attributes_ {
   const char *WidthString;    // b, h, <blank>, or d
   const char *VecWidthString; // i8, i16, i32, f32, f64
   int8_t SExtAddrOffsetBits;
   int8_t ZExtAddrOffsetBits;
 } TypeARM32Attributes[] = {
-#define X(tag, elementty, int_width, vec_width, sbits, ubits, rraddr)          \
+#define X(tag, elementty, int_width, vec_width, sbits, ubits, rraddr, shaddr)  \
   { int_width, vec_width, sbits, ubits }                                       \
   ,
     ICETYPEARM32_TABLE
 #undef X
 };
 
 const struct InstARM32ShiftAttributes_ {
   const char *EmitString;
 } InstARM32ShiftAttributes[] = {
 #define X(tag, emit)                                                           \
@@ skipping 1655 matching lines @@
 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice