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| 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// | 1 //===- subzero/src/IceAssemblerARM32.h - Assembler for ARM32 ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 3 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 4 // for details. All rights reserved. Use of this source code is governed by a | 4 // for details. All rights reserved. Use of this source code is governed by a |
| 5 // BSD-style license that can be found in the LICENSE file. | 5 // BSD-style license that can be found in the LICENSE file. |
| 6 // | 6 // |
| 7 // Modified by the Subzero authors. | 7 // Modified by the Subzero authors. |
| 8 // | 8 // |
| 9 //===----------------------------------------------------------------------===// | 9 //===----------------------------------------------------------------------===// |
| 10 // | 10 // |
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| 203 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); | 203 void str(const Operand *OpRt, const Operand *OpAddress, CondARM32::Cond Cond); |
| 204 | 204 |
| 205 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 205 void sub(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 206 bool SetFlags, CondARM32::Cond Cond); | 206 bool SetFlags, CondARM32::Cond Cond); |
| 207 | 207 |
| 208 void tst(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); | 208 void tst(const Operand *OpRn, const Operand *OpSrc1, CondARM32::Cond Cond); |
| 209 | 209 |
| 210 void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, | 210 void udiv(const Operand *OpRd, const Operand *OpRn, const Operand *OpSrc1, |
| 211 CondARM32::Cond Cond); | 211 CondARM32::Cond Cond); |
| 212 | 212 |
| 213 void umull(const Operand *OpRdLo, const Operand *OpRdHi, const Operand *OpRn, |
| 214 const Operand *OpRm, CondARM32::Cond Cond); |
| 215 |
| 213 static bool classof(const Assembler *Asm) { | 216 static bool classof(const Assembler *Asm) { |
| 214 return Asm->getKind() == Asm_ARM32; | 217 return Asm->getKind() == Asm_ARM32; |
| 215 } | 218 } |
| 216 | 219 |
| 217 void emitTextInst(const std::string &Text, SizeT InstSize); | 220 void emitTextInst(const std::string &Text, SizeT InstSize); |
| 218 | 221 |
| 219 private: | 222 private: |
| 220 // A vector of pool-allocated x86 labels for CFG nodes. | 223 // A vector of pool-allocated x86 labels for CFG nodes. |
| 221 using LabelVector = std::vector<Label *>; | 224 using LabelVector = std::vector<Label *>; |
| 222 LabelVector CfgNodeLabels; | 225 LabelVector CfgNodeLabels; |
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| 305 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); | 308 IValueT encodeBranchOffset(IOffsetT Offset, IValueT Inst); |
| 306 | 309 |
| 307 // Returns the offset encoded in the branch instruction Inst. | 310 // Returns the offset encoded in the branch instruction Inst. |
| 308 static IOffsetT decodeBranchOffset(IValueT Inst); | 311 static IOffsetT decodeBranchOffset(IValueT Inst); |
| 309 }; | 312 }; |
| 310 | 313 |
| 311 } // end of namespace ARM32 | 314 } // end of namespace ARM32 |
| 312 } // end of namespace Ice | 315 } // end of namespace Ice |
| 313 | 316 |
| 314 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H | 317 #endif // SUBZERO_SRC_ICEASSEMBLERARM32_H |
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