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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/disassembler.h" | 5 #include "vm/disassembler.h" |
6 | 6 |
7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. | 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM. |
8 #if defined(TARGET_ARCH_ARM) | 8 #if defined(TARGET_ARCH_ARM) |
9 | 9 |
10 #include "platform/assert.h" | 10 #include "platform/assert.h" |
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105 // Print the condition guarding the instruction. | 105 // Print the condition guarding the instruction. |
106 void ARMDecoder::PrintCondition(Instr* instr) { | 106 void ARMDecoder::PrintCondition(Instr* instr) { |
107 Print(cond_names[instr->ConditionField()]); | 107 Print(cond_names[instr->ConditionField()]); |
108 } | 108 } |
109 | 109 |
110 | 110 |
111 // These register names are defined in a way to match the native disassembler | 111 // These register names are defined in a way to match the native disassembler |
112 // formatting, except for register alias pp (r5). | 112 // formatting, except for register alias pp (r5). |
113 // See for example the command "objdump -d <binary file>". | 113 // See for example the command "objdump -d <binary file>". |
114 static const char* reg_names[kNumberOfCpuRegisters] = { | 114 static const char* reg_names[kNumberOfCpuRegisters] = { |
| 115 #if defined(TARGET_OS_MACOS) |
| 116 "r0", "r1", "r2", "r3", "r4", "pp", "r6", "fp", |
| 117 "r8", "r9", "r10", "r11", "ip", "sp", "lr", "pc", |
| 118 #else |
115 "r0", "r1", "r2", "r3", "r4", "pp", "r6", "r7", | 119 "r0", "r1", "r2", "r3", "r4", "pp", "r6", "r7", |
116 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", | 120 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", |
| 121 #endif |
117 }; | 122 }; |
118 | 123 |
119 | 124 |
120 // Print the register name according to the active name converter. | 125 // Print the register name according to the active name converter. |
121 void ARMDecoder::PrintRegister(int reg) { | 126 void ARMDecoder::PrintRegister(int reg) { |
122 ASSERT(0 <= reg); | 127 ASSERT(0 <= reg); |
123 ASSERT(reg < kNumberOfCpuRegisters); | 128 ASSERT(reg < kNumberOfCpuRegisters); |
124 Print(reg_names[reg]); | 129 Print(reg_names[reg]); |
125 } | 130 } |
126 | 131 |
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1531 int32_t instruction_bits = Instr::At(pc)->InstructionBits(); | 1536 int32_t instruction_bits = Instr::At(pc)->InstructionBits(); |
1532 OS::SNPrint(hex_buffer, hex_size, "%08x", instruction_bits); | 1537 OS::SNPrint(hex_buffer, hex_size, "%08x", instruction_bits); |
1533 if (out_instr_size) { | 1538 if (out_instr_size) { |
1534 *out_instr_size = Instr::kInstrSize; | 1539 *out_instr_size = Instr::kInstrSize; |
1535 } | 1540 } |
1536 } | 1541 } |
1537 | 1542 |
1538 } // namespace dart | 1543 } // namespace dart |
1539 | 1544 |
1540 #endif // defined TARGET_ARCH_ARM | 1545 #endif // defined TARGET_ARCH_ARM |
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