arm64: clang assembler compatability

dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix8_fs_s.S

 //
 //  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
 //
 //  Use of this source code is governed by a BSD-style license
 //  that can be found in the LICENSE file in the root of the source
 //  tree. An additional intellectual property rights grant can be found
 //  in the file PATENTS.  All contributing project authors may
 //  be found in the AUTHORS file in the root of the source tree.
 //
 //  This is a modification of armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.s
@@ skipping 334 matching lines @@
         fadd    dVi5,dUi3,dUr7
         fadd    dVr7,dUr3,dUi7
         ld2     {dXr3,dXi3},[pSrc],pointStep     //  data[3]
         fsub    dVi7,dUi3,dUr7
 
         // finish third stage of 8 point FFT
 
         .ifeqs  "\inverse", "TRUE"
 
             // calculate a*v5
-            fmul    dT1,dVr5,dT0[0]              // use dVi0 for dT1
+            fmul    dT1,dVr5,dT0s[0]              // use dVi0 for dT1
 
             ld2     {dXr4,dXi4},[pSrc],pointStep //  data[4]
-            fmul    dVi5,dVi5,dT0[0]
+            fmul    dVi5,dVi5,dT0s[0]
 
             ld2     {dXr5,dXi5},[pSrc],pointStep //  data[5]
             fsub    dVr5,dT1,dVi5                // a * V5
             fadd    dVi5,dT1,dVi5
 
             ld2     {dXr6,dXi6},[pSrc],pointStep //  data[6]
 
             // calculate  b*v7
-            fmul    dT1,dVr7,dT0[0]
-            fmul    dVi7,dVi7,dT0[0]
+            fmul    dT1,dVr7,dT0s[0]
+            fmul    dVi7,dVi7,dT0s[0]
 
             // fadd    qY1,qV1,qV5
             // fsub    qY5,qV1,qV5
             fadd    dYr1,dVr1,dVr5
             fsub    dYr5,dVr1,dVr5
             fadd    dYi1,dVi1,dVi5
             fsub    dYi5,dVi1,dVi5
 
             fadd    dVr7,dT1,dVi7                // b * V7
             fsub    dVi7,dVi7,dT1
@@ skipping 13 matching lines @@
 
 
             st2     {dYr3,dYi3},[pDst],step1     // store y3
             st2     {dYr5,dYi5},[pDst],step1     // store y5
             st2     {dYr7,dYi7},[pDst]           // store y7
             ADD pDst, pDst, #16
 
         .else
 
             // calculate  b*v7
-            fmul    dT1,dVr7,dT0[0]
+            fmul    dT1,dVr7,dT0s[0]
             ld2     {dXr4,dXi4},[pSrc],pointStep //  data[4]
-            fmul    dVi7,dVi7,dT0[0]
+            fmul    dVi7,dVi7,dT0s[0]
 
             ld2     {dXr5,dXi5},[pSrc],pointStep //  data[5]
             fadd    dVr7,dT1,dVi7                     // b * V7
             fsub    dVi7,dVi7,dT1
 
             ld2     {dXr6,dXi6},[pSrc],pointStep //  data[6]
 
             // calculate a*v5
-            fmul    dT1,dVr5,dT0[0]              // use dVi0 for dT1
-            fmul    dVi5,dVi5,dT0[0]
+            fmul    dT1,dVr5,dT0s[0]              // use dVi0 for dT1
+            fmul    dVi5,dVi5,dT0s[0]
 
             fadd    dYr7,dVr3,dVr7
             fadd    dYi7,dVi3,dVi7
             SUB     pDst, pDst, step2            // set pDst to y1
 
             fsub    dVr5,dT1,dVi5                // a * V5
             fadd    dVi5,dT1,dVi5
 
             // On the last iteration,  this will read past the end of pSrc, 
             // so skip this read.
@@ skipping 39 matching lines @@
         M_END
 
 
         M_START armSP_FFTInv_CToC_FC32_Radix8_fs_OutOfPlace,,d15
             FFTSTAGE "FALSE","TRUE",INV
         M_END
 
 
 
         .end