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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 // Declares a Simulator for MIPS instructions if we are not generating a native | 5 // Declares a Simulator for MIPS instructions if we are not generating a native |
| 6 // MIPS binary. This Simulator allows us to run and debug MIPS code generation | 6 // MIPS binary. This Simulator allows us to run and debug MIPS code generation |
| 7 // on regular desktop machines. | 7 // on regular desktop machines. |
| 8 // Dart calls into generated code by "calling" the InvokeDartCode stub, | 8 // Dart calls into generated code by "calling" the InvokeDartCode stub, |
| 9 // which will start execution in the Simulator or forwards to the real entry | 9 // which will start execution in the Simulator or forwards to the real entry |
| 10 // on a MIPS HW platform. | 10 // on a MIPS HW platform. |
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| 32 | 32 |
| 33 // The currently executing Simulator instance, which is associated to the | 33 // The currently executing Simulator instance, which is associated to the |
| 34 // current isolate | 34 // current isolate |
| 35 static Simulator* Current(); | 35 static Simulator* Current(); |
| 36 | 36 |
| 37 // Accessors for register state. | 37 // Accessors for register state. |
| 38 void set_register(Register reg, int32_t value); | 38 void set_register(Register reg, int32_t value); |
| 39 int32_t get_register(Register reg) const; | 39 int32_t get_register(Register reg) const; |
| 40 | 40 |
| 41 // Accessors for floating point register state. | 41 // Accessors for floating point register state. |
| 42 void set_fregister(FRegister freg, double value); | 42 void set_fregister(FRegister freg, int32_t value); |
| 43 double get_fregister(FRegister) const; | 43 void set_fregister_float(FRegister freg, float value); |
| 44 void set_fregister_double(FRegister freg, double value); |
| 45 void set_fregister_long(FRegister freg, int64_t value); |
| 46 |
| 47 int32_t get_fregister(FRegister freg) const; |
| 48 float get_fregister_float(FRegister freg) const; |
| 49 double get_fregister_double(FRegister freg) const; |
| 50 int64_t get_fregister_long(FRegister freg) const; |
| 51 |
| 44 | 52 |
| 45 // Accessor for the pc. | 53 // Accessor for the pc. |
| 46 void set_pc(int32_t value) { pc_ = value; } | 54 void set_pc(int32_t value) { pc_ = value; } |
| 47 int32_t get_pc() const { return pc_; } | 55 int32_t get_pc() const { return pc_; } |
| 48 | 56 |
| 49 // Accessors for hi, lo registers. | 57 // Accessors for hi, lo registers. |
| 50 void set_hi_register(int32_t value) { hi_reg_ = value; } | 58 void set_hi_register(int32_t value) { hi_reg_ = value; } |
| 51 void set_lo_register(int32_t value) { lo_reg_ = value; } | 59 void set_lo_register(int32_t value) { lo_reg_ = value; } |
| 52 int32_t get_hi_register() const { return hi_reg_; } | 60 int32_t get_hi_register() const { return hi_reg_; } |
| 53 int32_t get_lo_register() const { return lo_reg_; } | 61 int32_t get_lo_register() const { return lo_reg_; } |
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| 86 // the ra is set to this value on transition from native C code to | 94 // the ra is set to this value on transition from native C code to |
| 87 // simulated execution, so that the simulator can "return" to the native | 95 // simulated execution, so that the simulator can "return" to the native |
| 88 // C code. | 96 // C code. |
| 89 static const uword kEndSimulatingPC = -1; | 97 static const uword kEndSimulatingPC = -1; |
| 90 | 98 |
| 91 // Special registers for the results of div, divu. | 99 // Special registers for the results of div, divu. |
| 92 int32_t hi_reg_; | 100 int32_t hi_reg_; |
| 93 int32_t lo_reg_; | 101 int32_t lo_reg_; |
| 94 | 102 |
| 95 int32_t registers_[kNumberOfCpuRegisters]; | 103 int32_t registers_[kNumberOfCpuRegisters]; |
| 96 double fregisters_[kNumberOfFRegisters]; | 104 int32_t fregisters_[kNumberOfFRegisters]; |
| 97 uword pc_; | 105 uword pc_; |
| 98 | 106 |
| 99 // Simulator support. | 107 // Simulator support. |
| 100 char* stack_; | 108 char* stack_; |
| 101 int icount_; | 109 int icount_; |
| 102 bool delay_slot_; | 110 bool delay_slot_; |
| 103 SimulatorSetjmpBuffer* last_setjmp_buffer_; | 111 SimulatorSetjmpBuffer* last_setjmp_buffer_; |
| 104 uword top_exit_frame_info_; | 112 uword top_exit_frame_info_; |
| 105 | 113 |
| 106 // Registered breakpoints. | 114 // Registered breakpoints. |
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| 131 inline int8_t ReadB(uword addr); | 139 inline int8_t ReadB(uword addr); |
| 132 inline uint8_t ReadBU(uword addr); | 140 inline uint8_t ReadBU(uword addr); |
| 133 inline int16_t ReadH(uword addr, Instr* instr); | 141 inline int16_t ReadH(uword addr, Instr* instr); |
| 134 inline uint16_t ReadHU(uword addr, Instr *instr); | 142 inline uint16_t ReadHU(uword addr, Instr *instr); |
| 135 inline int ReadW(uword addr, Instr* instr); | 143 inline int ReadW(uword addr, Instr* instr); |
| 136 | 144 |
| 137 inline void WriteB(uword addr, uint8_t value); | 145 inline void WriteB(uword addr, uint8_t value); |
| 138 inline void WriteH(uword addr, uint16_t value, Instr* isntr); | 146 inline void WriteH(uword addr, uint16_t value, Instr* isntr); |
| 139 inline void WriteW(uword addr, int value, Instr* instr); | 147 inline void WriteW(uword addr, int value, Instr* instr); |
| 140 | 148 |
| 149 inline double ReadD(uword addr, Instr* instr); |
| 150 inline void WriteD(uword addr, double value, Instr* instr); |
| 151 |
| 141 void DoBranch(Instr* instr, bool taken, bool likely); | 152 void DoBranch(Instr* instr, bool taken, bool likely); |
| 142 void DoBreak(Instr *instr); | 153 void DoBreak(Instr *instr); |
| 143 | 154 |
| 144 void DecodeSpecial(Instr* instr); | 155 void DecodeSpecial(Instr* instr); |
| 145 void DecodeSpecial2(Instr* instr); | 156 void DecodeSpecial2(Instr* instr); |
| 146 void DecodeRegImm(Instr* instr); | 157 void DecodeRegImm(Instr* instr); |
| 158 void DecodeCop1(Instr* instr); |
| 147 void InstructionDecode(Instr* instr); | 159 void InstructionDecode(Instr* instr); |
| 148 | 160 |
| 149 void Execute(); | 161 void Execute(); |
| 150 void ExecuteDelaySlot(); | 162 void ExecuteDelaySlot(); |
| 151 | 163 |
| 152 // Longjmp support for exceptions. | 164 // Longjmp support for exceptions. |
| 153 SimulatorSetjmpBuffer* last_setjmp_buffer() { | 165 SimulatorSetjmpBuffer* last_setjmp_buffer() { |
| 154 return last_setjmp_buffer_; | 166 return last_setjmp_buffer_; |
| 155 } | 167 } |
| 156 void set_last_setjmp_buffer(SimulatorSetjmpBuffer* buffer) { | 168 void set_last_setjmp_buffer(SimulatorSetjmpBuffer* buffer) { |
| 157 last_setjmp_buffer_ = buffer; | 169 last_setjmp_buffer_ = buffer; |
| 158 } | 170 } |
| 159 | 171 |
| 160 friend class SimulatorDebugger; | 172 friend class SimulatorDebugger; |
| 161 friend class SimulatorSetjmpBuffer; | 173 friend class SimulatorSetjmpBuffer; |
| 162 }; | 174 }; |
| 163 | 175 |
| 164 } // namespace dart | 176 } // namespace dart |
| 165 | 177 |
| 166 #endif // VM_SIMULATOR_MIPS_H_ | 178 #endif // VM_SIMULATOR_MIPS_H_ |
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