Subzero: Refactor x86 register definitions to use the alias mechanism.

src/IceAssemblerX86Base.h

Index: src/IceAssemblerX86Base.h
diff --git a/src/IceAssemblerX86Base.h b/src/IceAssemblerX86Base.h
index b1c70e082ad1700ab780d86de7819a5c561b11e5..1bd68f12be19ad5bdcce8c7fba953079f9c43346 100644
--- a/src/IceAssemblerX86Base.h
+++ b/src/IceAssemblerX86Base.h
@@ -115,9 +115,8 @@ template <class Machine> class AssemblerX86Base : public Assembler {
   AssemblerX86Base &operator=(const AssemblerX86Base &) = delete;
 
 protected:
-  AssemblerX86Base(AssemblerKind Kind, GlobalContext *Ctx,
-                   bool use_far_branches)
-      : Assembler(Kind, Ctx) {
+  AssemblerX86Base(AssemblerKind Kind, bool use_far_branches)
+      : Assembler(Kind) {
     // This mode is only needed and implemented for MIPS and ARM.
     assert(!use_far_branches);
     (void)use_far_branches;
@@ -288,7 +287,7 @@ public:
   void popal();
 
   void setcc(typename Traits::Cond::BrCond condition,
-             typename Traits::ByteRegister dst);
+             typename Traits::GPRRegister dst);
   void setcc(typename Traits::Cond::BrCond condition,
              const typename Traits::Address &address);
 
@@ -954,8 +953,6 @@ private:
   bool is8BitRegisterRequiringRex(const Type Ty, const RegType Reg) {
     static constexpr bool IsGPR =
         std::is_same<typename std::decay<RegType>::type,
-                     typename Traits::ByteRegister>::value ||
-        std::is_same<typename std::decay<RegType>::type,
                      typename Traits::GPRRegister>::value;
 
     return IsGPR && (Reg & 0x04) != 0 && (Reg & 0x08) == 0 &&