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| 1 //===- subzero/unittest/AssemblerX8632/X87.cpp ----------------------------===// | 1 //===- subzero/unittest/AssemblerX8632/X87.cpp ----------------------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 #include "AssemblerX8632/TestUtil.h" | 9 #include "AssemblerX8632/TestUtil.h" |
| 10 | 10 |
| 11 namespace Ice { | 11 namespace Ice { |
| 12 namespace X8632 { | 12 namespace X8632 { |
| 13 namespace Test { | 13 namespace Test { |
| 14 namespace { | 14 namespace { |
| 15 | 15 |
| 16 TEST_F(AssemblerX8632LowLevelTest, Fld) { | 16 TEST_F(AssemblerX8632LowLevelTest, Fld) { |
| 17 __ fld(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1, | 17 __ fld(IceType_f32, |
| 18 AssemblerFixup::NoFixup)); | 18 Address(GPRRegister::Encoded_Reg_ebp, 1, AssemblerFixup::NoFixup)); |
| 19 __ fld(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, | 19 __ fld(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, |
| 20 AssemblerFixup::NoFixup)); | 20 AssemblerFixup::NoFixup)); |
| 21 | 21 |
| 22 constexpr size_t ByteCount = 9; | 22 constexpr size_t ByteCount = 9; |
| 23 ASSERT_EQ(ByteCount, codeBytesSize()); | 23 ASSERT_EQ(ByteCount, codeBytesSize()); |
| 24 | 24 |
| 25 constexpr uint8_t Fld32Opcode = 0xd9; | 25 constexpr uint8_t Fld32Opcode = 0xd9; |
| 26 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 0 << 3) | | 26 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 0 << 3) | |
| 27 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 27 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 28 constexpr uint8_t Fld64Opcode = 0xdd; | 28 constexpr uint8_t Fld64Opcode = 0xdd; |
| 29 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 0 << 3) | | 29 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 0 << 3) | |
| 30 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 30 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 31 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, | 31 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, |
| 32 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); | 32 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); |
| 33 } | 33 } |
| 34 | 34 |
| 35 TEST_F(AssemblerX8632LowLevelTest, FstpAddr) { | 35 TEST_F(AssemblerX8632LowLevelTest, FstpAddr) { |
| 36 __ fstp(IceType_f32, Address(GPRRegister::Encoded_Reg_ebp, 1, | 36 __ fstp(IceType_f32, |
| 37 AssemblerFixup::NoFixup)); | 37 Address(GPRRegister::Encoded_Reg_ebp, 1, AssemblerFixup::NoFixup)); |
| 38 __ fstp(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, | 38 __ fstp(IceType_f64, Address(GPRRegister::Encoded_Reg_ebp, 0x10000, |
| 39 AssemblerFixup::NoFixup)); | 39 AssemblerFixup::NoFixup)); |
| 40 | 40 |
| 41 constexpr size_t ByteCount = 9; | 41 constexpr size_t ByteCount = 9; |
| 42 ASSERT_EQ(ByteCount, codeBytesSize()); | 42 ASSERT_EQ(ByteCount, codeBytesSize()); |
| 43 | 43 |
| 44 constexpr uint8_t Fld32Opcode = 0xd9; | 44 constexpr uint8_t Fld32Opcode = 0xd9; |
| 45 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 3 << 3) | | 45 constexpr uint8_t Fld32ModRM = (/*mod*/ 1 << 6) | (/*reg*/ 3 << 3) | |
| 46 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 46 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 47 constexpr uint8_t Fld64Opcode = 0xdd; | 47 constexpr uint8_t Fld64Opcode = 0xdd; |
| 48 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 3 << 3) | | 48 constexpr uint8_t Fld64ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 3 << 3) | |
| 49 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 49 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 50 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, | 50 verifyBytes<ByteCount>(codeBytes(), Fld32Opcode, Fld32ModRM, 0x01, |
| 51 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); | 51 Fld64Opcode, Fld64ModRM, 0x00, 0x00, 0x01, 0x00); |
| 52 } | 52 } |
| 53 | 53 |
| 54 TEST_F(AssemblerX8632LowLevelTest, Fincstp) { | 54 TEST_F(AssemblerX8632LowLevelTest, Fincstp) { |
| 55 __ fincstp(); | 55 __ fincstp(); |
| 56 | 56 |
| 57 constexpr size_t ByteCount = 2; | 57 constexpr size_t ByteCount = 2; |
| 58 ASSERT_EQ(ByteCount, codeBytesSize()); | 58 ASSERT_EQ(ByteCount, codeBytesSize()); |
| 59 | 59 |
| 60 verifyBytes<ByteCount>(codeBytes(), 0xD9, 0XF7); | 60 verifyBytes<ByteCount>(codeBytes(), 0xD9, 0XF7); |
| 61 } | 61 } |
| 62 | 62 |
| 63 TEST_F(AssemblerX8632LowLevelTest, FnstcwAddr) { | 63 TEST_F(AssemblerX8632LowLevelTest, FnstcwAddr) { |
| 64 __ fnstcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345, | 64 __ fnstcw( |
| 65 AssemblerFixup::NoFixup)); | 65 Address(GPRRegister::Encoded_Reg_ebp, 0x12345, AssemblerFixup::NoFixup)); |
| 66 | 66 |
| 67 constexpr size_t ByteCount = 6; | 67 constexpr size_t ByteCount = 6; |
| 68 ASSERT_EQ(ByteCount, codeBytesSize()); | 68 ASSERT_EQ(ByteCount, codeBytesSize()); |
| 69 | 69 |
| 70 constexpr uint8_t Opcode = 0xd9; | 70 constexpr uint8_t Opcode = 0xd9; |
| 71 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 7 << 3) | | 71 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 7 << 3) | |
| 72 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 72 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 73 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); | 73 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); |
| 74 } | 74 } |
| 75 | 75 |
| 76 TEST_F(AssemblerX8632LowLevelTest, FldcwAddr) { | 76 TEST_F(AssemblerX8632LowLevelTest, FldcwAddr) { |
| 77 __ fldcw(Address(GPRRegister::Encoded_Reg_ebp, 0x12345, | 77 __ fldcw( |
| 78 AssemblerFixup::NoFixup)); | 78 Address(GPRRegister::Encoded_Reg_ebp, 0x12345, AssemblerFixup::NoFixup)); |
| 79 | 79 |
| 80 constexpr size_t ByteCount = 6; | 80 constexpr size_t ByteCount = 6; |
| 81 ASSERT_EQ(ByteCount, codeBytesSize()); | 81 ASSERT_EQ(ByteCount, codeBytesSize()); |
| 82 | 82 |
| 83 constexpr uint8_t Opcode = 0xd9; | 83 constexpr uint8_t Opcode = 0xd9; |
| 84 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 5 << 3) | | 84 constexpr uint8_t ModRM = (/*mod*/ 2 << 6) | (/*reg*/ 5 << 3) | |
| 85 (/*rm*/ GPRRegister::Encoded_Reg_ebp); | 85 (/*rm*/ GPRRegister::Encoded_Reg_ebp); |
| 86 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); | 86 verifyBytes<ByteCount>(codeBytes(), Opcode, ModRM, 0x45, 0x23, 0x01, 0x00); |
| 87 } | 87 } |
| 88 | 88 |
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| 264 | 264 |
| 265 TestFistp(s, 32, Dword, float, uint32_t); | 265 TestFistp(s, 32, Dword, float, uint32_t); |
| 266 TestFistp(l, 64, Qword, double, uint64_t); | 266 TestFistp(l, 64, Qword, double, uint64_t); |
| 267 #undef TestFistp | 267 #undef TestFistp |
| 268 } | 268 } |
| 269 | 269 |
| 270 } // end of anonymous namespace | 270 } // end of anonymous namespace |
| 271 } // end of namespace Test | 271 } // end of namespace Test |
| 272 } // end of namespace X8632 | 272 } // end of namespace X8632 |
| 273 } // end of namespace Ice | 273 } // end of namespace Ice |
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