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| 1 //===- subzero/unittest/AssemblerX8632/GPRArith.cpp -----------------------===// | 1 //===- subzero/unittest/AssemblerX8632/GPRArith.cpp -----------------------===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 #include "AssemblerX8632/TestUtil.h" | 9 #include "AssemblerX8632/TestUtil.h" |
| 10 | 10 |
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| 47 TEST_F(AssemblerX8632Test, SetCC) { | 47 TEST_F(AssemblerX8632Test, SetCC) { |
| 48 #define TestSetCC(C, Src0, Value0, Src1, Value1, Dest, IsTrue) \ | 48 #define TestSetCC(C, Src0, Value0, Src1, Value1, Dest, IsTrue) \ |
| 49 do { \ | 49 do { \ |
| 50 const uint32_t T0 = allocateDword(); \ | 50 const uint32_t T0 = allocateDword(); \ |
| 51 constexpr uint32_t V0 = 0xF00F00; \ | 51 constexpr uint32_t V0 = 0xF00F00; \ |
| 52 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src0, Immediate(Value0)); \ | 52 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src0, Immediate(Value0)); \ |
| 53 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src1, Immediate(Value1)); \ | 53 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src1, Immediate(Value1)); \ |
| 54 __ cmp(IceType_i32, GPRRegister::Encoded_Reg_##Src0, \ | 54 __ cmp(IceType_i32, GPRRegister::Encoded_Reg_##Src0, \ |
| 55 GPRRegister::Encoded_Reg_##Src1); \ | 55 GPRRegister::Encoded_Reg_##Src1); \ |
| 56 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Dest, Immediate(0)); \ | 56 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Dest, Immediate(0)); \ |
| 57 __ setcc(Cond::Br_##C, \ | 57 __ setcc(Cond::Br_##C, ByteRegister(GPRRegister::Encoded_Reg_##Dest)); \ |
| 58 RegX8632::getEncodedByteReg(GPRRegister::Encoded_Reg_##Dest)); \ | |
| 59 __ setcc(Cond::Br_##C, dwordAddress(T0)); \ | 58 __ setcc(Cond::Br_##C, dwordAddress(T0)); \ |
| 60 \ | 59 \ |
| 61 AssembledTest test = assemble(); \ | 60 AssembledTest test = assemble(); \ |
| 62 test.setDwordTo(T0, V0); \ | 61 test.setDwordTo(T0, V0); \ |
| 63 \ | 62 \ |
| 64 test.run(); \ | 63 test.run(); \ |
| 65 \ | 64 \ |
| 66 EXPECT_EQ(IsTrue, test.Dest()) \ | 65 EXPECT_EQ(IsTrue, test.Dest()) \ |
| 67 << "(" #C ", " #Src0 ", " #Value0 ", " #Src1 ", " #Value1 ", " #Dest \ | 66 << "(" #C ", " #Src0 ", " #Value0 ", " #Src1 ", " #Value1 ", " #Dest \ |
| 68 ", " #IsTrue ")"; \ | 67 ", " #IsTrue ")"; \ |
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| 1749 TEST_F(AssemblerX8632Test, Bt) { | 1748 TEST_F(AssemblerX8632Test, Bt) { |
| 1750 #define TestImpl(Dst, Value0, Src, Value1) \ | 1749 #define TestImpl(Dst, Value0, Src, Value1) \ |
| 1751 do { \ | 1750 do { \ |
| 1752 static constexpr char TestString[] = \ | 1751 static constexpr char TestString[] = \ |
| 1753 "(" #Dst ", " #Value0 ", " #Src ", " #Value1 ")"; \ | 1752 "(" #Dst ", " #Value0 ", " #Src ", " #Value1 ")"; \ |
| 1754 static constexpr uint32_t Expected = ((Value0) & (1u << (Value1))) != 0; \ | 1753 static constexpr uint32_t Expected = ((Value0) & (1u << (Value1))) != 0; \ |
| 1755 \ | 1754 \ |
| 1756 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Dst, Immediate(Value0)); \ | 1755 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Dst, Immediate(Value0)); \ |
| 1757 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src, Immediate(Value1)); \ | 1756 __ mov(IceType_i32, GPRRegister::Encoded_Reg_##Src, Immediate(Value1)); \ |
| 1758 __ bt(GPRRegister::Encoded_Reg_##Dst, GPRRegister::Encoded_Reg_##Src); \ | 1757 __ bt(GPRRegister::Encoded_Reg_##Dst, GPRRegister::Encoded_Reg_##Src); \ |
| 1759 __ setcc(Cond::Br_b, ByteRegister::Encoded_Reg_al); \ | 1758 __ setcc(Cond::Br_b, ByteRegister::Encoded_8_Reg_al); \ |
| 1760 __ And(IceType_i32, GPRRegister::Encoded_Reg_eax, Immediate(0xFFu)); \ | 1759 __ And(IceType_i32, GPRRegister::Encoded_Reg_eax, Immediate(0xFFu)); \ |
| 1761 \ | 1760 \ |
| 1762 AssembledTest test = assemble(); \ | 1761 AssembledTest test = assemble(); \ |
| 1763 test.run(); \ | 1762 test.run(); \ |
| 1764 \ | 1763 \ |
| 1765 ASSERT_EQ(Expected, test.eax()) << TestString; \ | 1764 ASSERT_EQ(Expected, test.eax()) << TestString; \ |
| 1766 reset(); \ | 1765 reset(); \ |
| 1767 } while (0) | 1766 } while (0) |
| 1768 | 1767 |
| 1769 TestImpl(eax, 0x08000000, ebx, 27u); | 1768 TestImpl(eax, 0x08000000, ebx, 27u); |
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| 1884 #undef TestImplValue | 1883 #undef TestImplValue |
| 1885 #undef TestImplSize | 1884 #undef TestImplSize |
| 1886 #undef TestImplRegAddr | 1885 #undef TestImplRegAddr |
| 1887 #undef TestImplRegReg | 1886 #undef TestImplRegReg |
| 1888 } | 1887 } |
| 1889 | 1888 |
| 1890 } // end of anonymous namespace | 1889 } // end of anonymous namespace |
| 1891 } // end of namespace Test | 1890 } // end of namespace Test |
| 1892 } // end of namespace X8632 | 1891 } // end of namespace X8632 |
| 1893 } // end of namespace Ice | 1892 } // end of namespace Ice |
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