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Side by Side Diff: src/IceRegistersX8632.h

Issue 1419903002: Subzero: Refactor x86 register definitions to use the alias mechanism. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix assembler unit tests. Fix register names. Code review changes. Rebase Created 5 years, 1 month ago
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1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===// 1 //===- subzero/src/IceRegistersX8632.h - Register information ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
11 /// This file declares the registers and their encodings for x86-32. 11 /// This file declares the registers and their encodings for x86-32.
12 /// 12 ///
13 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===//
14 14
15 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H 15 #ifndef SUBZERO_SRC_ICEREGISTERSX8632_H
16 #define SUBZERO_SRC_ICEREGISTERSX8632_H 16 #define SUBZERO_SRC_ICEREGISTERSX8632_H
17 17
18 #include "IceDefs.h" 18 #include "IceDefs.h"
19 #include "IceInstX8632.def" 19 #include "IceInstX8632.def"
20 #include "IceTypes.h" 20 #include "IceTypes.h"
21 21
22 namespace Ice { 22 namespace Ice {
23 23
24 class RegX8632 { 24 class RegX8632 {
25 public: 25 public:
26 /// An enum of every register. The enum value may not match the encoding used 26 /// An enum of every register. The enum value may not match the encoding used
27 /// to binary encode register operands in instructions. 27 /// to binary encode register operands in instructions.
28 enum AllRegisters { 28 enum AllRegisters {
29 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 29 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
30 frameptr, isI8, isInt, isFP) \ 30 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
31 isTrunc8Rcvr, isAhRcvr, aliases) \
31 val, 32 val,
32 REGX8632_TABLE 33 REGX8632_TABLE
33 #undef X 34 #undef X
34 Reg_NUM, 35 Reg_NUM
35 #define X(val, init) val init,
36 REGX8632_TABLE_BOUNDS
37 #undef X
38 }; 36 };
39 37
40 /// An enum of GPR Registers. The enum value does match the encoding used to 38 /// An enum of GPR Registers. The enum value does match the encoding used to
41 /// binary encode register operands in instructions. 39 /// binary encode register operands in instructions.
42 enum GPRRegister { 40 enum GPRRegister {
43 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 41 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
44 frameptr, isI8, isInt, isFP) \ 42 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
43 isTrunc8Rcvr, isAhRcvr, aliases) \
45 Encoded_##val = encode, 44 Encoded_##val = encode,
46 REGX8632_GPR_TABLE 45 REGX8632_GPR_TABLE
47 #undef X 46 #undef X
48 Encoded_Not_GPR = -1 47 Encoded_Not_GPR = -1
49 }; 48 };
50 49
51 /// An enum of XMM Registers. The enum value does match the encoding used to 50 /// An enum of XMM Registers. The enum value does match the encoding used to
52 /// binary encode register operands in instructions. 51 /// binary encode register operands in instructions.
53 enum XmmRegister { 52 enum XmmRegister {
54 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 53 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
55 frameptr, isI8, isInt, isFP) \ 54 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
55 isTrunc8Rcvr, isAhRcvr, aliases) \
56 Encoded_##val = encode, 56 Encoded_##val = encode,
57 REGX8632_XMM_TABLE 57 REGX8632_XMM_TABLE
58 #undef X 58 #undef X
59 Encoded_Not_Xmm = -1 59 Encoded_Not_Xmm = -1
60 }; 60 };
61 61
62 /// An enum of Byte Registers. The enum value does match the encoding used to 62 /// An enum of Byte Registers. The enum value does match the encoding used to
63 /// binary encode register operands in instructions. 63 /// binary encode register operands in instructions.
64 enum ByteRegister { 64 enum ByteRegister {
65 #define X(val, encode) Encoded_##val encode, 65 #define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
66 isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
67 isTrunc8Rcvr, isAhRcvr, aliases) \
68 Encoded_8_##val = encode,
66 REGX8632_BYTEREG_TABLE 69 REGX8632_BYTEREG_TABLE
67 #undef X 70 #undef X
68 Encoded_Not_ByteReg = -1 71 Encoded_Not_ByteReg = -1
69 }; 72 };
70 73
71 /// An enum of X87 Stack Registers. The enum value does match the encoding 74 /// An enum of X87 Stack Registers. The enum value does match the encoding
72 /// used to binary encode register operands in instructions. 75 /// used to binary encode register operands in instructions.
73 enum X87STRegister { 76 enum X87STRegister {
74 #define X(val, encode, name) Encoded_##val encode, 77 #define X(val, encode, name) Encoded_##val = encode,
75 X87ST_REGX8632_TABLE 78 X87ST_REGX8632_TABLE
76 #undef X 79 #undef X
77 Encoded_Not_X87STReg = -1 80 Encoded_Not_X87STReg = -1
78 }; 81 };
79 82
80 static inline GPRRegister getEncodedGPR(int32_t RegNum) {
81 assert(Reg_GPR_First <= RegNum);
82 assert(RegNum <= Reg_GPR_Last);
83 return GPRRegister(RegNum - Reg_GPR_First);
84 }
85
86 static inline XmmRegister getEncodedXmm(int32_t RegNum) {
87 assert(Reg_XMM_First <= RegNum);
88 assert(RegNum <= Reg_XMM_Last);
89 return XmmRegister(RegNum - Reg_XMM_First);
90 }
91
92 static inline ByteRegister getEncodedByteReg(int32_t RegNum) {
93 assert(Reg_GPR_First <= RegNum);
94 assert(RegNum <= Reg_ebx);
95 return ByteRegister(RegNum - Reg_GPR_First);
96 }
97
98 static inline GPRRegister getEncodedByteRegOrGPR(Type Ty, int32_t RegNum) {
99 if (isByteSizedType(Ty))
100 return GPRRegister(getEncodedByteReg(RegNum));
101 else
102 return getEncodedGPR(RegNum);
103 }
104
105 static inline X87STRegister getEncodedSTReg(int32_t RegNum) { 83 static inline X87STRegister getEncodedSTReg(int32_t RegNum) {
106 assert(Encoded_X87ST_First <= RegNum); 84 assert(Encoded_X87ST_First <= RegNum);
107 assert(RegNum <= Encoded_X87ST_Last); 85 assert(RegNum <= Encoded_X87ST_Last);
108 return X87STRegister(RegNum); 86 return X87STRegister(RegNum);
109 } 87 }
110 }; 88 };
111 89
112 } // end of namespace Ice 90 } // end of namespace Ice
113 91
114 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H 92 #endif // SUBZERO_SRC_ICEREGISTERSX8632_H
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