Subzero: Refactor x86 register definitions to use the alias mechanism.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 112 matching lines @@
 // example,
 //   a=phi(...)
 // changes to
 //   "a_phi=phi(...); a=a_phi".
 //
 // This is in preparation for part 2 which deletes the Phi instructions and
 // appends assignment instructions to predecessor blocks. Note that this
 // transformation preserves SSA form.
 void CfgNode::placePhiLoads() {
   for (Inst &I : Phis) {
-    auto Phi = llvm::dyn_cast<InstPhi>(&I);
+    auto *Phi = llvm::dyn_cast<InstPhi>(&I);
     Insts.insert(Insts.begin(), Phi->lower(Func));
   }
 }
 
 // This does part 2 of Phi lowering. For each Phi instruction at each out-edge,
 // create a corresponding assignment instruction, and add all the assignments
 // near the end of this block. They need to be added before any branch
 // instruction, and also if the block ends with a compare instruction followed
 // by a branch instruction that we may want to fuse, it's better to insert the
 // new assignments before the compare instruction. The
@@ skipping 71 matching lines @@
           ++InsertionPoint;
         }
       }
     }
   }
 
   // Consider every out-edge.
   for (CfgNode *Succ : OutEdges) {
     // Consider every Phi instruction at the out-edge.
     for (Inst &I : Succ->Phis) {
-      auto Phi = llvm::dyn_cast<InstPhi>(&I);
+      auto *Phi = llvm::dyn_cast<InstPhi>(&I);
       Operand *Operand = Phi->getOperandForTarget(this);
       assert(Operand);
       Variable *Dest = I.getDest();
       assert(Dest);
       InstAssign *NewInst = InstAssign::create(Func, Dest, Operand);
       if (CmpInstDest == Operand)
         Insts.insert(SafeInsertionPoint, NewInst);
       else
         Insts.insert(InsertionPoint, NewInst);
     }
@@ skipping 60 matching lines @@
   return NewNode;
 }
 
 namespace {
 
 // Helper function used by advancedPhiLowering().
 bool sameVarOrReg(TargetLowering *Target, const Variable *Var1,
                   const Operand *Opnd) {
   if (Var1 == Opnd)
     return true;
-  const auto Var2 = llvm::dyn_cast<Variable>(Opnd);
+  const auto *Var2 = llvm::dyn_cast<Variable>(Opnd);
   if (Var2 == nullptr)
     return false;
 
   // If either operand lacks a register, they cannot be the same.
   if (!Var1->hasReg())
     return false;
   if (!Var2->hasReg())
     return false;
 
   int32_t RegNum1 = Var1->getRegNum();
@@ skipping 135 matching lines @@
     constexpr int32_t WeightSrcIsReg = 2;
     // Prefer Dest not as a register because the register stays free longer.
     constexpr int32_t WeightDestNotReg = 1;
 
     for (size_t I = 0; I < NumPhis; ++I) {
       if (Desc[I].Processed)
         continue;
       int32_t Weight = 0;
       if (Desc[I].NumPred == 0)
         Weight += WeightNoPreds;
-      if (auto Var = llvm::dyn_cast<Variable>(Desc[I].Src))
+      if (auto *Var = llvm::dyn_cast<Variable>(Desc[I].Src))
         if (Var->hasReg())
           Weight += WeightSrcIsReg;
       if (!Desc[I].Dest->hasReg())
         Weight += WeightDestNotReg;
       Desc[I].Weight = Weight;
     }
 
     // Repeatedly choose and process the best candidate in the topological
     // sort, until no candidates remain. This implementation is O(N^2) where N
     // is the number of Phi instructions, but with a small constant factor
@@ skipping 37 matching lines @@
             Found = true;
           }
         }
         assert(Found);
       }
       // Now that a cycle (if any) has been broken, create the actual
       // assignment.
       Split->appendInst(InstAssign::create(Func, Dest, Src));
       // Update NumPred for all Phi assignments using this Phi's Src as their
       // Dest variable. Also update Weight if NumPred dropped from 1 to 0.
-      if (auto Var = llvm::dyn_cast<Variable>(Src)) {
+      if (auto *Var = llvm::dyn_cast<Variable>(Src)) {
         for (size_t I = 0; I < NumPhis; ++I) {
           if (Desc[I].Processed)
             continue;
           if (sameVarOrReg(Target, Var, Desc[I].Dest)) {
             if (--Desc[I].NumPred == 0)
               Desc[I].Weight += WeightNoPreds;
           }
         }
       }
       Desc[BestIndex].Processed = true;
@@ skipping 96 matching lines @@
     LiveBegin->reserve(getInstCountEstimate());
     LiveEnd->reserve(getInstCountEstimate());
   }
   // Initialize Live to be the union of all successors' LiveIn.
   for (CfgNode *Succ : OutEdges) {
     Live |= Liveness->getLiveIn(Succ);
     // Mark corresponding argument of phis in successor as live.
     for (Inst &I : Succ->Phis) {
       if (I.isDeleted())
         continue;
-      auto Phi = llvm::dyn_cast<InstPhi>(&I);
+      auto *Phi = llvm::dyn_cast<InstPhi>(&I);
       Phi->livenessPhiOperand(Live, this, Liveness);
     }
   }
   Liveness->getLiveOut(this) = Live;
 
   // Process regular instructions in reverse order.
   for (Inst &I : reverse_range(Insts)) {
     if (I.isDeleted())
       continue;
     I.liveness(I.getNumber(), Live, Liveness, LiveBegin, LiveEnd);
@@ skipping 744 matching lines @@
   InstIntrinsicCall *Inst = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Inst->addArg(AtomicRMWOp);
   Inst->addArg(Counter);
   Inst->addArg(One);
   Inst->addArg(OrderAcquireRelease);
   Insts.push_front(Inst);
 }
 
 } // end of namespace Ice