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Side by Side Diff: test/unittests/compiler/mips/instruction-selector-mips-unittest.cc

Issue 1419753008: MIPS: [turbofan] Properly implement Float64/32 Min/Max instructions. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Remove redundant functions. Created 5 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file 3 // found in the LICENSE file
4 4
5 #include "test/unittests/compiler/instruction-selector-unittest.h" 5 #include "test/unittests/compiler/instruction-selector-unittest.h"
6 6
7 namespace v8 { 7 namespace v8 {
8 namespace internal { 8 namespace internal {
9 namespace compiler { 9 namespace compiler {
10 10
(...skipping 827 matching lines...) Expand 10 before | Expand all | Expand 10 after
838 m.Return(n); 838 m.Return(n);
839 Stream s = m.Build(); 839 Stream s = m.Build();
840 ASSERT_EQ(1U, s.size()); 840 ASSERT_EQ(1U, s.size());
841 EXPECT_EQ(kMipsAbsD, s[0]->arch_opcode()); 841 EXPECT_EQ(kMipsAbsD, s[0]->arch_opcode());
842 ASSERT_EQ(1U, s[0]->InputCount()); 842 ASSERT_EQ(1U, s[0]->InputCount());
843 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); 843 EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0)));
844 ASSERT_EQ(1U, s[0]->OutputCount()); 844 ASSERT_EQ(1U, s[0]->OutputCount());
845 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output())); 845 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
846 } 846 }
847 847
848
849 TEST_F(InstructionSelectorTest, Float32Max) {
850 StreamBuilder m(this, kMachFloat32, kMachFloat32, kMachFloat32);
851 Node* const p0 = m.Parameter(0);
852 Node* const p1 = m.Parameter(1);
853 Node* const n = m.Float32Max(p0, p1);
854 m.Return(n);
855 Stream s = m.Build();
856 // Float32Max is `(b < a) ? a : b`.
857 ASSERT_EQ(1U, s.size());
858 EXPECT_EQ(kMipsFloat32Max, s[0]->arch_opcode());
859 ASSERT_EQ(2U, s[0]->InputCount());
860 ASSERT_EQ(1U, s[0]->OutputCount());
861 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
862 }
863
864
865 TEST_F(InstructionSelectorTest, Float32Min) {
866 StreamBuilder m(this, kMachFloat32, kMachFloat32, kMachFloat32);
867 Node* const p0 = m.Parameter(0);
868 Node* const p1 = m.Parameter(1);
869 Node* const n = m.Float32Min(p0, p1);
870 m.Return(n);
871 Stream s = m.Build();
872 // Float32Min is `(a < b) ? a : b`.
873 ASSERT_EQ(1U, s.size());
874 EXPECT_EQ(kMipsFloat32Min, s[0]->arch_opcode());
875 ASSERT_EQ(2U, s[0]->InputCount());
876 ASSERT_EQ(1U, s[0]->OutputCount());
877 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
878 }
879
880
881 TEST_F(InstructionSelectorTest, Float64Max) {
882 StreamBuilder m(this, kMachFloat64, kMachFloat64, kMachFloat64);
883 Node* const p0 = m.Parameter(0);
884 Node* const p1 = m.Parameter(1);
885 Node* const n = m.Float64Max(p0, p1);
886 m.Return(n);
887 Stream s = m.Build();
888 // Float64Max is `(b < a) ? a : b`.
889 ASSERT_EQ(1U, s.size());
890 EXPECT_EQ(kMipsFloat64Max, s[0]->arch_opcode());
891 ASSERT_EQ(2U, s[0]->InputCount());
892 ASSERT_EQ(1U, s[0]->OutputCount());
893 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
894 }
895
896
897 TEST_F(InstructionSelectorTest, Float64Min) {
898 StreamBuilder m(this, kMachFloat64, kMachFloat64, kMachFloat64);
899 Node* const p0 = m.Parameter(0);
900 Node* const p1 = m.Parameter(1);
901 Node* const n = m.Float64Min(p0, p1);
902 m.Return(n);
903 Stream s = m.Build();
904 // Float64Min is `(a < b) ? a : b`.
905 ASSERT_EQ(1U, s.size());
906 EXPECT_EQ(kMipsFloat64Min, s[0]->arch_opcode());
907 ASSERT_EQ(2U, s[0]->InputCount());
908 ASSERT_EQ(1U, s[0]->OutputCount());
909 EXPECT_EQ(s.ToVreg(n), s.ToVreg(s[0]->Output()));
910 }
911
912
848 } // namespace compiler 913 } // namespace compiler
849 } // namespace internal 914 } // namespace internal
850 } // namespace v8 915 } // namespace v8
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