Re-assign registers on ARM so PP and CODE_REG are below R7 (FP on iOS).

runtime/vm/runtime_entry_arm.cc

Index: runtime/vm/runtime_entry_arm.cc
diff --git a/runtime/vm/runtime_entry_arm.cc b/runtime/vm/runtime_entry_arm.cc
index a2c9d492782e9dc8109add799b60e215d82695f8..35e15ea55a9caa1c06147f2ad3b21f9c2d339a68 100644
--- a/runtime/vm/runtime_entry_arm.cc
+++ b/runtime/vm/runtime_entry_arm.cc
@@ -42,7 +42,7 @@ uword RuntimeEntry::GetEntryPoint() const {
 // Generate code to call into the stub which will call the runtime
 // function. Input for the stub is as follows:
 //   SP : points to the arguments and return value array.
-//   R5 : address of the runtime function to call.
+//   R9 : address of the runtime function to call.
 //   R4 : number of arguments to the call.
 void RuntimeEntry::Call(Assembler* assembler, intptr_t argument_count) const {
   if (is_leaf()) {
@@ -51,7 +51,7 @@ void RuntimeEntry::Call(Assembler* assembler, intptr_t argument_count) const {
   } else {
     // Argument count is not checked here, but in the runtime entry for a more
     // informative error message.
-    __ LoadFromOffset(kWord, R5, THR, Thread::OffsetFromThread(this));
+    __ LoadFromOffset(kWord, R9, THR, Thread::OffsetFromThread(this));
     __ LoadImmediate(R4, argument_count);
     __ BranchLink(*StubCode::CallToRuntime_entry(), kNotPatchable);
   }