Precompilation: Generate instance calls as IC calls that can switch to Megamoprhic calls.

runtime/vm/instructions_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/constants_arm.h"
 #include "vm/cpu.h"
@@ skipping 255 matching lines @@
     *reinterpret_cast<uword*>(pc + (0 * Instr::kInstrSize)) = movw_ip;
     *reinterpret_cast<uword*>(pc + (1 * Instr::kInstrSize)) = movt_ip;
     *reinterpret_cast<uword*>(pc + (2 * Instr::kInstrSize)) = blx_ip;
 
     ASSERT(DeoptCallPatternLengthInBytes() == 3 * Instr::kInstrSize);
     CPU::FlushICache(pc, DeoptCallPatternLengthInBytes());
   }
 }
 
 
+SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code)
+    : object_pool_(ObjectPool::Handle(code.GetObjectPool())),
+      cache_pool_index_(-1),
+      stub_pool_index_(-1) {
+  ASSERT(code.ContainsInstructionAt(pc));
+  // Last instruction: blx r1.
+  ASSERT(*(reinterpret_cast<uword*>(pc) - 1) == 0xe12fff31);
+
+  Register reg;
+  uword stub_load_end =
+      InstructionPattern::DecodeLoadWordFromPool(pc - 3 * Instr::kInstrSize,
+                                                 &reg,
+                                                 &stub_pool_index_);
+  ASSERT(reg == CODE_REG);
+  InstructionPattern::DecodeLoadWordFromPool(stub_load_end,
+                                             &reg,
+                                             &cache_pool_index_);
+  ASSERT(reg == R9);
+}
+
+
+RawObject* SwitchableCallPattern::cache() const {
+  return reinterpret_cast<RawCode*>(
+      object_pool_.ObjectAt(cache_pool_index_));
+}
+
+
+void SwitchableCallPattern::SetCache(const MegamorphicCache& cache) const {
+  ASSERT(Object::Handle(object_pool_.ObjectAt(cache_pool_index_)).IsICData());
+  object_pool_.SetObjectAt(cache_pool_index_, cache);
+}
+
+
+void SwitchableCallPattern::SetLookupStub(const Code& lookup_stub) const {
+  ASSERT(Object::Handle(object_pool_.ObjectAt(stub_pool_index_)).IsCode());
+  object_pool_.SetObjectAt(stub_pool_index_, lookup_stub);
+}
+
+
 ReturnPattern::ReturnPattern(uword pc)
     : pc_(pc) {
 }
 
 
 bool ReturnPattern::IsValid() const {
   Instr* bx_lr = Instr::At(pc_);
   const int32_t B4 = 1 << 4;
   const int32_t B21 = 1 << 21;
   const int32_t B24 = 1 << 24;
   int32_t instruction = (static_cast<int32_t>(AL) << kConditionShift) |
                          B24 | B21 | (0xfff << 8) | B4 |
                         (static_cast<int32_t>(LR) << kRmShift);
   const ARMVersion version = TargetCPUFeatures::arm_version();
   if ((version == ARMv5TE) || (version == ARMv6)) {
     return bx_lr->InstructionBits() == instruction;
   } else {
     ASSERT(version == ARMv7);
     return bx_lr->InstructionBits() == instruction;
   }
   return false;
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM