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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_MIPS) | 6 #if defined(TARGET_ARCH_MIPS) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/code_generator.h" | 9 #include "vm/code_generator.h" |
| 10 #include "vm/compiler.h" | 10 #include "vm/compiler.h" |
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| 556 __ BranchNotEqual(T0, Object::null_object(), call_target_function); | 556 __ BranchNotEqual(T0, Object::null_object(), call_target_function); |
| 557 __ EnterStubFrame(); | 557 __ EnterStubFrame(); |
| 558 // Load the receiver. | 558 // Load the receiver. |
| 559 __ lw(A1, FieldAddress(S4, ArgumentsDescriptor::count_offset())); | 559 __ lw(A1, FieldAddress(S4, ArgumentsDescriptor::count_offset())); |
| 560 __ sll(TMP, A1, 1); // A1 is a Smi. | 560 __ sll(TMP, A1, 1); // A1 is a Smi. |
| 561 __ addu(TMP, FP, TMP); | 561 __ addu(TMP, FP, TMP); |
| 562 __ lw(T6, Address(TMP, kParamEndSlotFromFp * kWordSize)); | 562 __ lw(T6, Address(TMP, kParamEndSlotFromFp * kWordSize)); |
| 563 | 563 |
| 564 // Push space for the return value. | 564 // Push space for the return value. |
| 565 // Push the receiver. | 565 // Push the receiver. |
| 566 // Push IC data object. | 566 // Push ICData/MegamorphicCache object. |
| 567 // Push arguments descriptor array. | 567 // Push arguments descriptor array. |
| 568 // Push original arguments array. | 568 // Push original arguments array. |
| 569 __ addiu(SP, SP, Immediate(-4 * kWordSize)); | 569 __ addiu(SP, SP, Immediate(-4 * kWordSize)); |
| 570 __ LoadObject(TMP, Object::null_object()); | 570 __ LoadObject(TMP, Object::null_object()); |
| 571 __ sw(TMP, Address(SP, 3 * kWordSize)); | 571 __ sw(TMP, Address(SP, 3 * kWordSize)); |
| 572 __ sw(T6, Address(SP, 2 * kWordSize)); | 572 __ sw(T6, Address(SP, 2 * kWordSize)); |
| 573 __ sw(S5, Address(SP, 1 * kWordSize)); | 573 __ sw(S5, Address(SP, 1 * kWordSize)); |
| 574 __ sw(S4, Address(SP, 0 * kWordSize)); | 574 __ sw(S4, Address(SP, 0 * kWordSize)); |
| 575 // A1: Smi-tagged arguments array length. | 575 // A1: Smi-tagged arguments array length. |
| 576 PushArgumentsArray(assembler); | 576 PushArgumentsArray(assembler); |
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| 2204 const Register temp2 = T3; | 2204 const Register temp2 = T3; |
| 2205 const Register left = T1; | 2205 const Register left = T1; |
| 2206 const Register right = T0; | 2206 const Register right = T0; |
| 2207 __ lw(left, Address(SP, 1 * kWordSize)); | 2207 __ lw(left, Address(SP, 1 * kWordSize)); |
| 2208 __ lw(right, Address(SP, 0 * kWordSize)); | 2208 __ lw(right, Address(SP, 0 * kWordSize)); |
| 2209 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); | 2209 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2); |
| 2210 __ Ret(); | 2210 __ Ret(); |
| 2211 } | 2211 } |
| 2212 | 2212 |
| 2213 | 2213 |
| 2214 void StubCode::EmitMegamorphicLookup( | 2214 void StubCode::EmitMegamorphicLookup(Assembler* assembler) { |
| 2215 Assembler* assembler, Register receiver, Register cache, Register target) { | 2215 __ LoadTaggedClassIdMayBeSmi(T0, T0); |
| 2216 ASSERT((cache != T0) && (cache != T2)); | |
| 2217 __ LoadTaggedClassIdMayBeSmi(T0, receiver); | |
| 2218 // T0: class ID of the receiver (smi). | 2216 // T0: class ID of the receiver (smi). |
| 2219 __ lw(T2, FieldAddress(cache, MegamorphicCache::buckets_offset())); | 2217 __ lw(S4, FieldAddress(S5, MegamorphicCache::arguments_descriptor_offset())); |
| 2220 __ lw(T1, FieldAddress(cache, MegamorphicCache::mask_offset())); | 2218 __ lw(T2, FieldAddress(S5, MegamorphicCache::buckets_offset())); |
| 2219 __ lw(T1, FieldAddress(S5, MegamorphicCache::mask_offset())); |
| 2221 // T2: cache buckets array. | 2220 // T2: cache buckets array. |
| 2222 // T1: mask. | 2221 // T1: mask. |
| 2223 __ mov(T3, T0); | 2222 __ mov(T3, T0); |
| 2223 // T3: probe. |
| 2224 | 2224 |
| 2225 Label loop, update, call_target_function; | 2225 Label loop, update, call_target_function; |
| 2226 __ b(&loop); | 2226 __ b(&loop); |
| 2227 | 2227 |
| 2228 __ Bind(&update); | 2228 __ Bind(&update); |
| 2229 __ addiu(T3, T3, Immediate(Smi::RawValue(1))); | 2229 __ addiu(T3, T3, Immediate(Smi::RawValue(1))); |
| 2230 __ Bind(&loop); | 2230 __ Bind(&loop); |
| 2231 __ and_(T3, T3, T1); | 2231 __ and_(T3, T3, T1); |
| 2232 const intptr_t base = Array::data_offset(); | 2232 const intptr_t base = Array::data_offset(); |
| 2233 // T3 is smi tagged, but table entries are two words, so LSL 2. | 2233 // T3 is smi tagged, but table entries are two words, so LSL 2. |
| 2234 __ sll(TMP, T3, 2); | 2234 __ sll(TMP, T3, 2); |
| 2235 __ addu(TMP, T2, TMP); | 2235 __ addu(TMP, T2, TMP); |
| 2236 __ lw(T4, FieldAddress(TMP, base)); | 2236 __ lw(T4, FieldAddress(TMP, base)); |
| 2237 | 2237 |
| 2238 ASSERT(kIllegalCid == 0); | 2238 ASSERT(kIllegalCid == 0); |
| 2239 __ beq(T4, ZR, &call_target_function); | 2239 __ beq(T4, ZR, &call_target_function); |
| 2240 __ bne(T4, T0, &update); | 2240 __ bne(T4, T0, &update); |
| 2241 | 2241 |
| 2242 __ Bind(&call_target_function); | 2242 __ Bind(&call_target_function); |
| 2243 // Call the target found in the cache. For a class id match, this is a | 2243 // Call the target found in the cache. For a class id match, this is a |
| 2244 // proper target for the given name and arguments descriptor. If the | 2244 // proper target for the given name and arguments descriptor. If the |
| 2245 // illegal class id was found, the target is a cache miss handler that can | 2245 // illegal class id was found, the target is a cache miss handler that can |
| 2246 // be invoked as a normal Dart function. | 2246 // be invoked as a normal Dart function. |
| 2247 __ sll(T1, T3, 2); | 2247 __ sll(T1, T3, 2); |
| 2248 __ addu(T1, T2, T1); | 2248 __ addu(T1, T2, T1); |
| 2249 __ lw(T0, FieldAddress(T1, base + kWordSize)); | 2249 __ lw(T0, FieldAddress(T1, base + kWordSize)); |
| 2250 | 2250 |
| 2251 __ lw(T1, FieldAddress(T0, Function::entry_point_offset())); |
| 2251 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); | 2252 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); |
| 2252 __ lw(target, FieldAddress(T0, Function::entry_point_offset())); | |
| 2253 } | 2253 } |
| 2254 | 2254 |
| 2255 | 2255 |
| 2256 // Called from megamorphic calls. | 2256 // Called from megamorphic calls. |
| 2257 // T0: receiver. | 2257 // T0: receiver |
| 2258 // T1: lookup cache. | 2258 // S5: MegamorphicCache (preserved) |
| 2259 // Result: | 2259 // Result: |
| 2260 // T1: entry point. | 2260 // T1: target entry point |
| 2261 // CODE_REG: target Code |
| 2262 // S4: arguments descriptor |
| 2261 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) { | 2263 void StubCode::GenerateMegamorphicLookupStub(Assembler* assembler) { |
| 2262 EmitMegamorphicLookup(assembler, T0, T1, T1); | 2264 EmitMegamorphicLookup(assembler); |
| 2263 __ Ret(); | 2265 __ Ret(); |
| 2264 } | 2266 } |
| 2265 | 2267 |
| 2268 |
| 2269 // Called from switchable IC calls. |
| 2270 // T0: receiver |
| 2271 // S5: ICData (preserved) |
| 2272 // Result: |
| 2273 // T1: target entry point |
| 2274 // CODE_REG: target Code object |
| 2275 // S4: arguments descriptor |
| 2276 void StubCode::GenerateICLookupStub(Assembler* assembler) { |
| 2277 Label loop, found, miss; |
| 2278 __ lw(T6, FieldAddress(S5, ICData::ic_data_offset())); |
| 2279 __ lw(S4, FieldAddress(S5, ICData::arguments_descriptor_offset())); |
| 2280 __ AddImmediate(T6, T6, Array::data_offset() - kHeapObjectTag); |
| 2281 // T6: first IC entry. |
| 2282 __ LoadTaggedClassIdMayBeSmi(T1, T0); |
| 2283 // T1: receiver cid as Smi |
| 2284 |
| 2285 __ Bind(&loop); |
| 2286 __ lw(T2, Address(T6, 0)); |
| 2287 __ beq(T1, T2, &found); |
| 2288 ASSERT(Smi::RawValue(kIllegalCid) == 0); |
| 2289 __ beq(T2, ZR, &miss); |
| 2290 |
| 2291 const intptr_t entry_length = ICData::TestEntryLengthFor(1) * kWordSize; |
| 2292 __ AddImmediate(T6, entry_length); // Next entry. |
| 2293 __ b(&loop); |
| 2294 |
| 2295 __ Bind(&found); |
| 2296 const intptr_t target_offset = ICData::TargetIndexFor(1) * kWordSize; |
| 2297 __ lw(T0, Address(T6, target_offset)); |
| 2298 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); |
| 2299 __ lw(T1, FieldAddress(T0, Function::entry_point_offset())); |
| 2300 __ Ret(); |
| 2301 |
| 2302 __ Bind(&miss); |
| 2303 __ LoadIsolate(T2); |
| 2304 __ lw(T0, Address(T2, Isolate::ic_miss_function_offset())); |
| 2305 __ lw(T1, FieldAddress(T0, Function::entry_point_offset())); |
| 2306 __ lw(CODE_REG, FieldAddress(T0, Function::code_offset())); |
| 2307 __ Ret(); |
| 2308 } |
| 2309 |
| 2266 } // namespace dart | 2310 } // namespace dart |
| 2267 | 2311 |
| 2268 #endif // defined TARGET_ARCH_MIPS | 2312 #endif // defined TARGET_ARCH_MIPS |
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