| Index: src/IceTargetLoweringX8664.cpp
|
| diff --git a/src/IceTargetLoweringX8664.cpp b/src/IceTargetLoweringX8664.cpp
|
| index c0ec7c5f46d7a725143087d4e8751d12ec5b9486..1783b26c8b7f79e45ce0b5e24e9d700301626d32 100644
|
| --- a/src/IceTargetLoweringX8664.cpp
|
| +++ b/src/IceTargetLoweringX8664.cpp
|
| @@ -86,6 +86,19 @@ const size_t MachineTraits<TargetX8664>::TableTypeX8664AttributesSize =
|
| const uint32_t MachineTraits<TargetX8664>::X86_STACK_ALIGNMENT_BYTES = 16;
|
| const char *MachineTraits<TargetX8664>::TargetName = "X8664";
|
|
|
| +template <>
|
| +std::array<llvm::SmallBitVector, IceType_NUM>
|
| + TargetX86Base<TargetX8664>::TypeToRegisterSet = {};
|
| +
|
| +template <>
|
| +std::array<llvm::SmallBitVector,
|
| + TargetX86Base<TargetX8664>::Traits::RegisterSet::Reg_NUM>
|
| + TargetX86Base<TargetX8664>::RegisterAliases = {};
|
| +
|
| +template <>
|
| +llvm::SmallBitVector
|
| + TargetX86Base<TargetX8664>::ScratchRegs = llvm::SmallBitVector();
|
| +
|
| } // end of namespace X86Internal
|
|
|
| //------------------------------------------------------------------------------
|
|
|