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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 1418853005: Subzero: Refactor some common TargetLowering initializations. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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34 34
35 using llvm::isInt; 35 using llvm::isInt;
36 36
37 namespace { 37 namespace {
38 38
39 // The maximum number of arguments to pass in GPR registers. 39 // The maximum number of arguments to pass in GPR registers.
40 constexpr uint32_t MIPS32_MAX_GPR_ARG = 4; 40 constexpr uint32_t MIPS32_MAX_GPR_ARG = 4;
41 41
42 } // end of anonymous namespace 42 } // end of anonymous namespace
43 43
44 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) { 44 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {}
45 // TODO: Don't initialize IntegerRegisters and friends every time. Instead,
46 // initialize in some sort of static initializer for the class.
47 45
46 void TargetMIPS32::staticInit() {
48 llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM); 47 llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM);
49 llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM); 48 llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM);
50 llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM); 49 llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM);
51 llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM); 50 llvm::SmallBitVector Float64Registers(RegMIPS32::Reg_NUM);
52 llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM); 51 llvm::SmallBitVector VectorRegisters(RegMIPS32::Reg_NUM);
53 llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM); 52 llvm::SmallBitVector InvalidRegisters(RegMIPS32::Reg_NUM);
54 ScratchRegs.resize(RegMIPS32::Reg_NUM); 53 ScratchRegs.resize(RegMIPS32::Reg_NUM);
55 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ 54 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \
56 isI64Pair, isFP32, isFP64, isVec128, alias_init) \ 55 isI64Pair, isFP32, isFP64, isVec128, alias_init) \
57 IntegerRegisters[RegMIPS32::val] = isInt; \ 56 IntegerRegisters[RegMIPS32::val] = isInt; \
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1048 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx) 1047 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx)
1049 : TargetHeaderLowering(Ctx) {} 1048 : TargetHeaderLowering(Ctx) {}
1050 1049
1051 void TargetHeaderMIPS32::lower() { 1050 void TargetHeaderMIPS32::lower() {
1052 OstreamLocker L(Ctx); 1051 OstreamLocker L(Ctx);
1053 Ostream &Str = Ctx->getStrEmit(); 1052 Ostream &Str = Ctx->getStrEmit();
1054 Str << "\t.set\tnomicromips\n"; 1053 Str << "\t.set\tnomicromips\n";
1055 Str << "\t.set\tnomips16\n"; 1054 Str << "\t.set\tnomips16\n";
1056 } 1055 }
1057 1056
1057 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
1058 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
1059 llvm::SmallBitVector TargetMIPS32::ScratchRegs;
1060
1058 } // end of namespace Ice 1061 } // end of namespace Ice
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