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Issue 1418523002: Add hybrid assembler concept to ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix nits. Created 5 years, 1 month ago
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1 ; Show that we can handle variable (i.e. stack) spills. 1 ; Show that we can handle variable (i.e. stack) spills.
2 2
3 ; REQUIRES: allow_dump 3 ; REQUIRES: allow_dump
4 4
5 ; Compile using standalone assembler.
5 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \ 6 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
6 ; RUN: | FileCheck %s --check-prefix=ASM 7 ; RUN: | FileCheck %s --check-prefix=ASM
8
9 ; Show bytes in assembled standalone code.
10 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
11 ; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
12
13 ; Compile using integrated assembler.
7 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \ 14 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
8 ; RUN: | FileCheck %s --check-prefix=IASM 15 ; RUN: | FileCheck %s --check-prefix=IASM
9 16
17 ; Show bytes in assembled integrated code.
18 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
19 ; RUN: --args -Om1 | FileCheck %s --check-prefix=DIS
20
10 define internal i32 @add1ToR0(i32 %p) { 21 define internal i32 @add1ToR0(i32 %p) {
11 %v = add i32 %p, 1 22 %v = add i32 %p, 1
12 ret i32 %v 23 ret i32 %v
13 } 24 }
14 25
15 ; ASM-LABEL: add1ToR0: 26 ; ASM-LABEL: add1ToR0:
16 ; IASM-LABEL: add1ToR0: 27 ; IASM-LABEL: add1ToR0:
28 ; DIS-LABEL:00000000 <add1ToR0>:
17 29
18 ; ASM: sub sp, sp, #8 30 ; ASM: sub sp, sp, #8
31 ; DIS-NEXT: 0: e24dd008
19 ; IASM: .byte 0x8 32 ; IASM: .byte 0x8
20 ; IASM-NEXT: .byte 0xd0 33 ; IASM-NEXT: .byte 0xd0
21 ; IASM-NEXT: .byte 0x4d 34 ; IASM-NEXT: .byte 0x4d
22 ; IASM-NEXT: .byte 0xe2 35 ; IASM-NEXT: .byte 0xe2
23 36
24 ; ASM-NEXT: str r0, [sp, #4] 37 ; ASM-NEXT: str r0, [sp, #4]
38 ; DIS-NEXT: 4: e58d0004
25 ; IASM-NEXT: .byte 0x4 39 ; IASM-NEXT: .byte 0x4
26 ; IASM-NEXT: .byte 0x0 40 ; IASM-NEXT: .byte 0x0
27 ; IASM-NEXT: .byte 0x8d 41 ; IASM-NEXT: .byte 0x8d
28 ; IASM-NEXT: .byte 0xe5 42 ; IASM-NEXT: .byte 0xe5
29 43
30 ; ASM-NEXT: ldr r0, [sp, #4] 44 ; ASM-NEXT: ldr r0, [sp, #4]
45 ; DIS-NEXT: 8: e59d0004
31 ; IASM-NEXT: .byte 0x4 46 ; IASM-NEXT: .byte 0x4
32 ; IASM-NEXT: .byte 0x0 47 ; IASM-NEXT: .byte 0x0
33 ; IASM-NEXT: .byte 0x9d 48 ; IASM-NEXT: .byte 0x9d
34 ; IASM-NEXT: .byte 0xe5 49 ; IASM-NEXT: .byte 0xe5
35 50
36 ; ASM-NEXT: add r0, r0, #1 51 ; ASM-NEXT: add r0, r0, #1
52 ; DIS-NEXT: c: e2800001
37 ; IASM-NEXT: .byte 0x1 53 ; IASM-NEXT: .byte 0x1
38 ; IASM-NEXT: .byte 0x0 54 ; IASM-NEXT: .byte 0x0
39 ; IASM-NEXT: .byte 0x80 55 ; IASM-NEXT: .byte 0x80
40 ; IASM-NEXT: .byte 0xe2 56 ; IASM-NEXT: .byte 0xe2
41 57
42 ; ASM-NEXT: str r0, [sp] 58 ; ASM-NEXT: str r0, [sp]
59 ; DIS-NEXT: 10: e58d0000
43 ; IASM-NEXT: .byte 0x0 60 ; IASM-NEXT: .byte 0x0
44 ; IASM-NEXT: .byte 0x0 61 ; IASM-NEXT: .byte 0x0
45 ; IASM-NEXT: .byte 0x8d 62 ; IASM-NEXT: .byte 0x8d
46 ; IASM-NEXT: .byte 0xe5 63 ; IASM-NEXT: .byte 0xe5
47 64
48 ; ASM-NEXT: ldr r0, [sp] 65 ; ASM-NEXT: ldr r0, [sp]
66 ; DIS-NEXT: 14: e59d0000
49 ; IASM-NEXT: .byte 0x0 67 ; IASM-NEXT: .byte 0x0
50 ; IASM-NEXT: .byte 0x0 68 ; IASM-NEXT: .byte 0x0
51 ; IASM-NEXT: .byte 0x9d 69 ; IASM-NEXT: .byte 0x9d
52 ; IASM-NEXT: .byte 0xe5 70 ; IASM-NEXT: .byte 0xe5
53 71
54 ; ASM-NEXT: add sp, sp, #8 72 ; ASM-NEXT: add sp, sp, #8
73 ; DIS-NEXT: 18: e28dd008
55 ; IASM-NEXT: .byte 0x8 74 ; IASM-NEXT: .byte 0x8
56 ; IASM-NEXT: .byte 0xd0 75 ; IASM-NEXT: .byte 0xd0
57 ; IASM-NEXT: .byte 0x8d 76 ; IASM-NEXT: .byte 0x8d
58 ; IASM-NEXT: .byte 0xe2 77 ; IASM-NEXT: .byte 0xe2
59 78
60 ; ASM-NEXT: bx lr 79 ; ASM-NEXT: bx lr
61 ; IASM-NEXT:» .byte 0x1e 80 ; DIS-NEXT: 1c: e12fff1e
62 ; IASM-NEXT:» .byte 0xff 81 ; IASM-NEXT: .byte 0x1e
63 ; IASM-NEXT:» .byte 0x2f 82 ; IASM-NEXT: .byte 0xff
64 ; IASM-NEXT:» .byte 0xe1 83 ; IASM-NEXT: .byte 0x2f
84 ; IASM-NEXT: .byte 0xe1
65 85
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