Add hybrid assembler concept to ARM assembler.

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 30 matching lines @@
   // assert(!isNegAddrMode());
   NumVars = 1;
   Vars = &this->Base;
 }
 
 const char *InstMIPS32::getWidthString(Type Ty) {
   (void)Ty;
   return "TBD";
 }
 
-
 template <> const char *InstMIPS32Addiu::Opcode = "addiu";
 template <> const char *InstMIPS32Lui::Opcode = "lui";
 template <> const char *InstMIPS32La::Opcode = "la";
 
 template <> const char *InstMIPS32Ori::Opcode = "ori";
 
 InstMIPS32Mov::InstMIPS32Mov(Cfg *Func, Variable *Dest, Operand *Src)
     : InstMIPS32(Func, InstMIPS32::Mov, 2, Dest) {
   auto *Dest64 = llvm::dyn_cast<Variable64On32>(Dest);
   auto *Src64 = llvm::dyn_cast<Variable64On32>(Src);
@@ skipping 169 matching lines @@
   // Type SrcTy = Inst->getSrc(0)->getType();
   Str << "\t"
       << "move"
       << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 } // end of namespace Ice