tests_lit/assembler/arm32/load-store.ll - Issue 1418523002: Add hybrid assembler concept to ARM assembler.

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Side by Side Diff: tests_lit/assembler/arm32/load-store.ll

Issue 1418523002: Add hybrid assembler concept to ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Fix nits. Created 5 years, 2 months ago

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1 ; Show that we can handle variable (i.e. stack) spills.	1 ; Show that we can handle variable (i.e. stack) spills.

2	2

3 ; REQUIRES: allow_dump	3 ; REQUIRES: allow_dump

4	4

5 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \	5 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \

6 ; RUN: \| FileCheck %s --check-prefix=ASM	6 ; RUN: \| FileCheck %s --check-prefix=ASM

7 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \	7 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \

8 ; RUN: \| FileCheck %s --check-prefix=IASM	8 ; RUN: \| FileCheck %s --check-prefix=IASM

9	9

10 define internal i32 @add1ToR0(i32 %p) {	10 define internal i32 @add1ToR0(i32 %p) {

11 %v = add i32 %p, 1	11 %v = add i32 %p, 1

12 ret i32 %v	12 ret i32 %v

13 }	13 }

14	14

15 ; ASM-LABEL: add1ToR0:	15 ; ASM-LABEL: add1ToR0:

16 ; IASM-LABEL: add1ToR0:	16 ; IASM-LABEL: add1ToR0:

17	17

18 ; ASM: sub sp, sp, #8	18 ; ASM: sub sp, sp, #8

19 ; IASM: .byte 0x8	19 ; IASM: .byte 0x8

20 ; IASM-NEXT: .byte 0xd0	20 ; IASM-NEXT: .byte 0xd0

21 ; IASM-NEXT: .byte 0x4d	21 ; IASM-NEXT: .byte 0x4d

22 ; IASM-NEXT: .byte 0xe2	22 ; IASM-NEXT: .byte 0xe2

23	23

24 ; ASM-NEXT: str r0, [sp, #4]	24 ; ASM-NEXT: str r0, [sp, #4]

25 ; IASM-NEXT: .byte 0x4	25 ; IASM-NEXT: .byte 0x4

26 ; IASM-NEXT: .byte 0x0	26 ; IASM-NEXT: .byte 0x0

27 ; IASM-NEXT: .byte 0x8d	27 ; IASM-NEXT: .byte 0x8d

28 ; IASM-NEXT: .byte 0xe5	28 ; IASM-NEXT: .byte 0xe3

29	29

30 ; ASM-NEXT: ldr r0, [sp, #4]	30 ; ASM-NEXT: ldr r0, [sp, #4]

31 ; IASM-NEXT: .byte 0x4	31 ; IASM-NEXT: .byte 0x4

32 ; IASM-NEXT: .byte 0x0	32 ; IASM-NEXT: .byte 0x0

33 ; IASM-NEXT: .byte 0x9d	33 ; IASM-NEXT: .byte 0x9d

34 ; IASM-NEXT: .byte 0xe5	34 ; IASM-NEXT: .byte 0xe3

35	35

36 ; ASM-NEXT: add r0, r0, #1	36 ; ASM-NEXT: add r0, r0, #1

37 ; IASM-NEXT: .byte 0x1	37 ; IASM-NEXT: .byte 0x1

38 ; IASM-NEXT: .byte 0x0	38 ; IASM-NEXT: .byte 0x0

39 ; IASM-NEXT: .byte 0x80	39 ; IASM-NEXT: .byte 0x80

40 ; IASM-NEXT: .byte 0xe2	40 ; IASM-NEXT: .byte 0xe2

41	41

42 ; ASM-NEXT: str r0, [sp]	42 ; ASM-NEXT: str r0, [sp]

43 ; IASM-NEXT: .byte 0x0	43 ; IASM-NEXT: .byte 0x0

44 ; IASM-NEXT: .byte 0x0	44 ; IASM-NEXT: .byte 0x0

45 ; IASM-NEXT: .byte 0x8d	45 ; IASM-NEXT: .byte 0x8d

46 ; IASM-NEXT: .byte 0xe5	46 ; IASM-NEXT: .byte 0xe3

47	47

48 ; ASM-NEXT: ldr r0, [sp]	48 ; ASM-NEXT: ldr r0, [sp]

49 ; IASM-NEXT: .byte 0x0	49 ; IASM-NEXT: .byte 0x0

50 ; IASM-NEXT: .byte 0x0	50 ; IASM-NEXT: .byte 0x0

51 ; IASM-NEXT: .byte 0x9d	51 ; IASM-NEXT: .byte 0x9d

52 ; IASM-NEXT: .byte 0xe5	52 ; IASM-NEXT: .byte 0xe3

53	53

54 ; ASM-NEXT: add sp, sp, #8	54 ; ASM-NEXT: add sp, sp, #8

55 ; IASM-NEXT: .byte 0x8	55 ; IASM-NEXT: .byte 0x8

56 ; IASM-NEXT: .byte 0xd0	56 ; IASM-NEXT: .byte 0xd0

57 ; IASM-NEXT: .byte 0x8d	57 ; IASM-NEXT: .byte 0x8d

58 ; IASM-NEXT: .byte 0xe2	58 ; IASM-NEXT: .byte 0xe2

59	59

60 ; ASM-NEXT: bx lr	60 ; ASM-NEXT: bx lr

61 ; IASM-NEXT: .byte 0x1e	61 ; IASM-NEXT: .byte 0x1e

62 ; IASM-NEXT: .byte 0xff	62 ; IASM-NEXT: .byte 0xff

63 ; IASM-NEXT: .byte 0x2f	63 ; IASM-NEXT: .byte 0x2f

64 ; IASM-NEXT: .byte 0xe1	64 ; IASM-NEXT: .byte 0xe1

65	65

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