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1 // Copyright (c) 2010 Google Inc. | 1 // Copyright (c) 2010 Google Inc. |
2 // All rights reserved. | 2 // All rights reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // * Redistributions of source code must retain the above copyright | 8 // * Redistributions of source code must retain the above copyright |
9 // notice, this list of conditions and the following disclaimer. | 9 // notice, this list of conditions and the following disclaimer. |
10 // * Redistributions in binary form must reproduce the above | 10 // * Redistributions in binary form must reproduce the above |
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1002 fpe_index < MD_FLOATINGSAVEAREA_ARM_FPEXTRA_COUNT; | 1002 fpe_index < MD_FLOATINGSAVEAREA_ARM_FPEXTRA_COUNT; |
1003 ++fpe_index) { | 1003 ++fpe_index) { |
1004 Swap(&context_arm->float_save.extra[fpe_index]); | 1004 Swap(&context_arm->float_save.extra[fpe_index]); |
1005 } | 1005 } |
1006 } | 1006 } |
1007 SetContextARM(context_arm.release()); | 1007 SetContextARM(context_arm.release()); |
1008 | 1008 |
1009 break; | 1009 break; |
1010 } | 1010 } |
1011 | 1011 |
1012 case MD_CONTEXT_MIPS: { | 1012 case MD_CONTEXT_MIPS: |
| 1013 case MD_CONTEXT_MIPS64: { |
1013 if (expected_size != sizeof(MDRawContextMIPS)) { | 1014 if (expected_size != sizeof(MDRawContextMIPS)) { |
1014 BPLOG(ERROR) << "MinidumpContext MIPS size mismatch, " | 1015 BPLOG(ERROR) << "MinidumpContext MIPS size mismatch, " |
1015 << expected_size | 1016 << expected_size |
1016 << " != " | 1017 << " != " |
1017 << sizeof(MDRawContextMIPS); | 1018 << sizeof(MDRawContextMIPS); |
1018 return false; | 1019 return false; |
1019 } | 1020 } |
1020 | 1021 |
1021 scoped_ptr<MDRawContextMIPS> context_mips(new MDRawContextMIPS()); | 1022 scoped_ptr<MDRawContextMIPS> context_mips(new MDRawContextMIPS()); |
1022 | 1023 |
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1150 | 1151 |
1151 case MD_CONTEXT_ARM64: | 1152 case MD_CONTEXT_ARM64: |
1152 if (system_info_cpu_type == MD_CPU_ARCHITECTURE_ARM64) | 1153 if (system_info_cpu_type == MD_CPU_ARCHITECTURE_ARM64) |
1153 return_value = true; | 1154 return_value = true; |
1154 break; | 1155 break; |
1155 | 1156 |
1156 case MD_CONTEXT_MIPS: | 1157 case MD_CONTEXT_MIPS: |
1157 if (system_info_cpu_type == MD_CPU_ARCHITECTURE_MIPS) | 1158 if (system_info_cpu_type == MD_CPU_ARCHITECTURE_MIPS) |
1158 return_value = true; | 1159 return_value = true; |
1159 break; | 1160 break; |
| 1161 |
| 1162 case MD_CONTEXT_MIPS64: |
| 1163 if (system_info_cpu_type == MD_CPU_ARCHITECTURE_MIPS64) |
| 1164 return_value = true; |
| 1165 break; |
1160 } | 1166 } |
1161 | 1167 |
1162 BPLOG_IF(ERROR, !return_value) << "MinidumpContext CPU " << | 1168 BPLOG_IF(ERROR, !return_value) << "MinidumpContext CPU " << |
1163 HexString(context_cpu_type) << | 1169 HexString(context_cpu_type) << |
1164 " wrong for MinidumpSystemInfo CPU " << | 1170 " wrong for MinidumpSystemInfo CPU " << |
1165 HexString(system_info_cpu_type); | 1171 HexString(system_info_cpu_type); |
1166 | 1172 |
1167 return return_value; | 1173 return return_value; |
1168 } | 1174 } |
1169 | 1175 |
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4202 GetSystemInfo() ? GetSystemInfo()->system_info() : NULL; | 4208 GetSystemInfo() ? GetSystemInfo()->system_info() : NULL; |
4203 | 4209 |
4204 if (system_info != NULL) { | 4210 if (system_info != NULL) { |
4205 switch (system_info->processor_architecture) { | 4211 switch (system_info->processor_architecture) { |
4206 case MD_CPU_ARCHITECTURE_X86: | 4212 case MD_CPU_ARCHITECTURE_X86: |
4207 *context_cpu_flags = MD_CONTEXT_X86; | 4213 *context_cpu_flags = MD_CONTEXT_X86; |
4208 break; | 4214 break; |
4209 case MD_CPU_ARCHITECTURE_MIPS: | 4215 case MD_CPU_ARCHITECTURE_MIPS: |
4210 *context_cpu_flags = MD_CONTEXT_MIPS; | 4216 *context_cpu_flags = MD_CONTEXT_MIPS; |
4211 break; | 4217 break; |
| 4218 case MD_CPU_ARCHITECTURE_MIPS64: |
| 4219 *context_cpu_flags = MD_CONTEXT_MIPS64; |
| 4220 break; |
4212 case MD_CPU_ARCHITECTURE_ALPHA: | 4221 case MD_CPU_ARCHITECTURE_ALPHA: |
4213 *context_cpu_flags = MD_CONTEXT_ALPHA; | 4222 *context_cpu_flags = MD_CONTEXT_ALPHA; |
4214 break; | 4223 break; |
4215 case MD_CPU_ARCHITECTURE_PPC: | 4224 case MD_CPU_ARCHITECTURE_PPC: |
4216 *context_cpu_flags = MD_CONTEXT_PPC; | 4225 *context_cpu_flags = MD_CONTEXT_PPC; |
4217 break; | 4226 break; |
4218 case MD_CPU_ARCHITECTURE_PPC64: | 4227 case MD_CPU_ARCHITECTURE_PPC64: |
4219 *context_cpu_flags = MD_CONTEXT_PPC64; | 4228 *context_cpu_flags = MD_CONTEXT_PPC64; |
4220 break; | 4229 break; |
4221 case MD_CPU_ARCHITECTURE_SHX: | 4230 case MD_CPU_ARCHITECTURE_SHX: |
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4777 return NULL; | 4786 return NULL; |
4778 } | 4787 } |
4779 | 4788 |
4780 *stream = new_stream.release(); | 4789 *stream = new_stream.release(); |
4781 info->stream = *stream; | 4790 info->stream = *stream; |
4782 return *stream; | 4791 return *stream; |
4783 } | 4792 } |
4784 | 4793 |
4785 | 4794 |
4786 } // namespace google_breakpad | 4795 } // namespace google_breakpad |
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