Don't touch x18 on ARM64 - it is globally reserved on iOS.

runtime/vm/constants_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_MIPS_H_
 #define VM_CONSTANTS_MIPS_H_
 
 #include "platform/assert.h"
 
 namespace dart {
 
 enum Register {
   R0  =  0,
-  R1  =  1,
-  kFirstFreeCpuRegister = 2,
+  R1  =  1,  // AT aka TMP
   R2  =  2,
   R3  =  3,
   R4  =  4,
   R5  =  5,
   R6  =  6,
   R7  =  7,
   R8  =  8,
   R9  =  9,
   R10 = 10,
   R11 = 11,
   R12 = 12,
   R13 = 13,
   R14 = 14,
   R15 = 15,
   R16 = 16,
   R17 = 17,
   R18 = 18,
-  R19 = 19,
+  R19 = 19,  // THR
   R20 = 20,
   R21 = 21,
-  kLastFreeCpuRegister = 21,
-  R22 = 22,
-  R23 = 23,
+  R22 = 22,  // CTX
+  R23 = 23,  // PP
   R24 = 24,
   R25 = 25,
   R26 = 26,
   R27 = 27,
   R28 = 28,
-  R29 = 29,
-  R30 = 30,
-  R31 = 31,
+  R29 = 29,  // SP
+  R30 = 30,  // FP
+  R31 = 31,  // RA
   kNumberOfCpuRegisters = 32,
   IMM = 32,  // Positive value is easier to encode than kNoRegister in bitfield.
-  kNoRegister = -1,
+  kNoRegister = -1,  // Signals an illegal register.
+
 
   // Register aliases.
   ZR = R0,
   AT = R1,
 
   V0 = R2,
   V1 = R3,
 
   A0 = R4,
   A1 = R5,
@@ skipping 121 matching lines @@
 const Register CTX = S6;  // Location of current context at method entry.
 const Register CODE_REG = S6;
 const Register PP = S7;  // Caches object pool pointer in generated code.
 const Register SPREG = SP;  // Stack pointer register.
 const Register FPREG = FP;  // Frame pointer register.
 const Register LRREG = RA;  // Link register.
 const Register ICREG = S5;  // IC data register.
 const Register ARGS_DESC_REG = S4;
 const Register THR = S3;  // Caches current thread in generated code.
 
+
 // The code that generates a comparison can be far away from the code that
 // generates the branch that uses the result of that comparison. In this case,
 // CMPRES1 and CMPRES2 are used for the results of the comparison. We need two
 // since TMP is clobbered by a far branch.
 const Register CMPRES1 = T8;
 const Register CMPRES2 = T9;
 
 // Exception object is passed in this register to the catch handlers when an
 // exception is thrown.
 const Register kExceptionObjectReg = V0;
 
 // Stack trace object is passed in this register to the catch handlers when
 // an exception is thrown.
 const Register kStackTraceObjectReg = V1;
 
 
 typedef uint32_t RegList;
 const RegList kAllCpuRegistersList = 0xFFFFFFFF;
 
-
 const RegList kAbiArgumentCpuRegs =
     (1 << A0) | (1 << A1) | (1 << A2) | (1 << A3);
 const RegList kAbiPreservedCpuRegs =
     (1 << S0) | (1 << S1) | (1 << S2) | (1 << S3) |
     (1 << S4) | (1 << S5) | (1 << S6) | (1 << S7);
 const int kAbiPreservedCpuRegCount = 8;
 
 // FPU registers 20 - 31 are preserved across calls.
 const FRegister kAbiFirstPreservedFpuReg = F20;
 const FRegister kAbiLastPreservedFpuReg =
     static_cast<FRegister>(kNumberOfFRegisters - 1);
 const int kAbiPreservedFpuRegCount = 12;
 
+const RegList kReservedCpuRegisters =
+    (1 << SPREG)   |
+    (1 << FPREG)   |
+    (1 << TMP)     |
+    (1 << PP)      |
+    (1 << THR)     |
+    (1 << CTX)     |
+    (1 << ZR)      |
+    (1 << CMPRES1) |
+    (1 << CMPRES2) |
+    (1 << K0)      |
+    (1 << K1)      |
+    (1 << GP)      |
+    (1 << RA);
 // CPU registers available to Dart allocator.
 const RegList kDartAvailableCpuRegs =
-    (1 << R2) | (1 << R3) | (1 << R4) | (1 << R5) |
-    (1 << R6) | (1 << R7) | (1 << R8) | (1 << R9) |
-    (1 << R10) | (1 << R11) | (1 << R12) | (1 << R13) |
-    (1 << R14) | (1 << R15) | (1 << R16) | (1 << R17) |
-    (1 << R18) | (1 << R19) | (1 << R20) | (1 << R21);
+    kAllCpuRegistersList & ~kReservedCpuRegisters;
+// Registers available to Dart that are not preserved by runtime calls.
 const RegList kDartVolatileCpuRegs =
     kDartAvailableCpuRegs & ~kAbiPreservedCpuRegs;
 const int kDartVolatileCpuRegCount = 14;
 const Register kDartFirstVolatileCpuReg = R2;
 const Register kDartLastVolatileCpuReg = R15;
 
 // FPU registers 0 - 19 are not preserved across calls.
 const FRegister kDartFirstVolatileFpuReg = F0;
 const FRegister kDartLastVolatileFpuReg = F19;
 const int kDartVolatileFpuRegCount = 20;
@@ skipping 400 matching lines @@
 #endif  // defined(DEBUG)
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_MIPS_H_