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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #ifndef VM_CONSTANTS_ARM64_H_ | 5 #ifndef VM_CONSTANTS_ARM64_H_ |
6 #define VM_CONSTANTS_ARM64_H_ | 6 #define VM_CONSTANTS_ARM64_H_ |
7 | 7 |
8 #include "platform/assert.h" | 8 #include "platform/assert.h" |
9 | 9 |
10 namespace dart { | 10 namespace dart { |
11 | 11 |
12 enum Register { | 12 enum Register { |
13 kFirstFreeCpuRegister = 0, | |
14 R0 = 0, | 13 R0 = 0, |
15 R1 = 1, | 14 R1 = 1, |
16 R2 = 2, | 15 R2 = 2, |
17 R3 = 3, | 16 R3 = 3, |
18 R4 = 4, | 17 R4 = 4, |
19 R5 = 5, | 18 R5 = 5, |
20 R6 = 6, | 19 R6 = 6, |
21 R7 = 7, | 20 R7 = 7, |
22 R8 = 8, | 21 R8 = 8, |
23 R9 = 9, | 22 R9 = 9, |
24 R10 = 10, | 23 R10 = 10, |
25 R11 = 11, | 24 R11 = 11, |
26 R12 = 12, | 25 R12 = 12, |
27 R13 = 13, | 26 R13 = 13, |
28 R14 = 14, | 27 R14 = 14, |
29 R15 = 15, | 28 R15 = 15, |
30 R16 = 16, // IP0 aka TMP | 29 R16 = 16, // IP0 aka TMP |
31 R17 = 17, // IP1 aka TMP2 | 30 R17 = 17, // IP1 aka TMP2 |
32 R18 = 18, // SP in Dart code. | 31 R18 = 18, // "platform register" on iOS. |
33 R19 = 19, | 32 R19 = 19, // SP in Dart code. |
34 R20 = 20, | 33 R20 = 20, // THR |
35 R21 = 21, | 34 R21 = 21, |
36 R22 = 22, | 35 R22 = 22, |
37 R23 = 23, | 36 R23 = 23, |
38 R24 = 24, | 37 R24 = 24, |
39 R25 = 25, | 38 R25 = 25, |
40 R26 = 26, | 39 R26 = 26, |
41 kLastFreeCpuRegister = 26, | |
42 R27 = 27, // PP | 40 R27 = 27, // PP |
43 R28 = 28, // CTX | 41 R28 = 28, // CTX |
44 R29 = 29, // FP | 42 R29 = 29, // FP |
45 R30 = 30, // LR | 43 R30 = 30, // LR |
46 R31 = 31, // ZR, CSP | 44 R31 = 31, // ZR, CSP |
47 kNumberOfCpuRegisters = 32, | 45 kNumberOfCpuRegisters = 32, |
48 kNoRegister = -1, | 46 kNoRegister = -1, |
49 | 47 |
50 // These registers both use the encoding R31, but to avoid mistakes we give | 48 // These registers both use the encoding R31, but to avoid mistakes we give |
51 // them different values, and then translate before encoding. | 49 // them different values, and then translate before encoding. |
52 CSP = 32, | 50 CSP = 32, |
53 ZR = 33, | 51 ZR = 33, |
54 | 52 |
55 // Aliases. | 53 // Aliases. |
56 IP0 = R16, | 54 IP0 = R16, |
57 IP1 = R17, | 55 IP1 = R17, |
58 SP = R18, | 56 SP = R19, |
59 FP = R29, | 57 FP = R29, |
60 LR = R30, | 58 LR = R30, |
61 }; | 59 }; |
62 | 60 |
| 61 |
63 enum VRegister { | 62 enum VRegister { |
64 V0 = 0, | 63 V0 = 0, |
65 V1 = 1, | 64 V1 = 1, |
66 V2 = 2, | 65 V2 = 2, |
67 V3 = 3, | 66 V3 = 3, |
68 V4 = 4, | 67 V4 = 4, |
69 V5 = 5, | 68 V5 = 5, |
70 V6 = 6, | 69 V6 = 6, |
71 V7 = 7, | 70 V7 = 7, |
72 V8 = 8, | 71 V8 = 8, |
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106 const int kNumberOfFpuRegisters = kNumberOfVRegisters; | 105 const int kNumberOfFpuRegisters = kNumberOfVRegisters; |
107 const FpuRegister kNoFpuRegister = kNoVRegister; | 106 const FpuRegister kNoFpuRegister = kNoVRegister; |
108 | 107 |
109 // Register aliases. | 108 // Register aliases. |
110 const Register TMP = R16; // Used as scratch register by assembler. | 109 const Register TMP = R16; // Used as scratch register by assembler. |
111 const Register TMP2 = R17; | 110 const Register TMP2 = R17; |
112 const Register CTX = R28; // Location of current context at method entry. | 111 const Register CTX = R28; // Location of current context at method entry. |
113 const Register PP = R27; // Caches object pool pointer in generated code. | 112 const Register PP = R27; // Caches object pool pointer in generated code. |
114 const Register CODE_REG = R24; | 113 const Register CODE_REG = R24; |
115 const Register FPREG = FP; // Frame pointer register. | 114 const Register FPREG = FP; // Frame pointer register. |
116 const Register SPREG = R18; // Stack pointer register. | 115 const Register SPREG = R19; // Stack pointer register. |
117 const Register LRREG = LR; // Link register. | 116 const Register LRREG = LR; // Link register. |
118 const Register ICREG = R5; // IC data register. | 117 const Register ICREG = R5; // IC data register. |
119 const Register ARGS_DESC_REG = R4; // Arguments descriptor register. | 118 const Register ARGS_DESC_REG = R4; // Arguments descriptor register. |
120 const Register THR = R20; // Caches current thread in generated code. | 119 const Register THR = R20; // Caches current thread in generated code. |
121 | 120 |
| 121 |
122 // Exception object is passed in this register to the catch handlers when an | 122 // Exception object is passed in this register to the catch handlers when an |
123 // exception is thrown. | 123 // exception is thrown. |
124 const Register kExceptionObjectReg = R0; | 124 const Register kExceptionObjectReg = R0; |
125 | 125 |
126 // Stack trace object is passed in this register to the catch handlers when | 126 // Stack trace object is passed in this register to the catch handlers when |
127 // an exception is thrown. | 127 // an exception is thrown. |
128 const Register kStackTraceObjectReg = R1; | 128 const Register kStackTraceObjectReg = R1; |
129 | 129 |
130 // Masks, sizes, etc. | 130 // Masks, sizes, etc. |
131 const int kXRegSizeInBits = 64; | 131 const int kXRegSizeInBits = 64; |
132 const int kWRegSizeInBits = 32; | 132 const int kWRegSizeInBits = 32; |
133 const int64_t kXRegMask = 0xffffffffffffffffL; | 133 const int64_t kXRegMask = 0xffffffffffffffffL; |
134 const int64_t kWRegMask = 0x00000000ffffffffL; | 134 const int64_t kWRegMask = 0x00000000ffffffffL; |
135 | 135 |
136 // List of registers used in load/store multiple. | 136 // List of registers used in load/store multiple. |
137 typedef uint32_t RegList; | 137 typedef uint32_t RegList; |
138 const RegList kAllCpuRegistersList = 0xFFFF; | 138 const RegList kAllCpuRegistersList = 0xFFFF; |
139 | 139 |
140 | 140 |
141 // C++ ABI call registers. | 141 // C++ ABI call registers. |
142 const RegList kAbiArgumentCpuRegs = | 142 const RegList kAbiArgumentCpuRegs = |
143 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) | | 143 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) | |
144 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7); | 144 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7); |
145 const RegList kAbiPreservedCpuRegs = | 145 const RegList kAbiPreservedCpuRegs = |
146 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) | | 146 (1 << R20) | (1 << R21) | (1 << R22) | (1 << R23) | |
147 (1 << R23) | (1 << R24) | (1 << R25) | (1 << R26) | | 147 (1 << R24) | (1 << R25) | (1 << R26) | (1 << R27) | |
148 (1 << R27) | (1 << R28); | 148 (1 << R28); |
149 const Register kAbiFirstPreservedCpuReg = R19; | 149 const Register kAbiFirstPreservedCpuReg = R20; |
150 const Register kAbiLastPreservedCpuReg = R28; | 150 const Register kAbiLastPreservedCpuReg = R28; |
151 const int kAbiPreservedCpuRegCount = 10; | 151 const int kAbiPreservedCpuRegCount = 9; |
152 const VRegister kAbiFirstPreservedFpuReg = V8; | 152 const VRegister kAbiFirstPreservedFpuReg = V8; |
153 const VRegister kAbiLastPreservedFpuReg = V15; | 153 const VRegister kAbiLastPreservedFpuReg = V15; |
154 const int kAbiPreservedFpuRegCount = 8; | 154 const int kAbiPreservedFpuRegCount = 8; |
155 | 155 |
| 156 const intptr_t kReservedCpuRegisters = |
| 157 (1 << SPREG) | // Dart SP |
| 158 (1 << FPREG) | |
| 159 (1 << TMP) | |
| 160 (1 << TMP2) | |
| 161 (1 << PP) | |
| 162 (1 << THR) | |
| 163 (1 << LR) | |
| 164 (1 << R31) | // C++ SP |
| 165 (1 << CTX) | |
| 166 (1 << R18); // iOS platform register. |
| 167 // TODO(rmacnak): Only reserve on Mac & iOS. |
156 // CPU registers available to Dart allocator. | 168 // CPU registers available to Dart allocator. |
157 const RegList kDartAvailableCpuRegs = | 169 const RegList kDartAvailableCpuRegs = |
158 (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3) | | 170 kAllCpuRegistersList & ~kReservedCpuRegisters; |
159 (1 << R4) | (1 << R5) | (1 << R6) | (1 << R7) | | |
160 (1 << R8) | (1 << R9) | (1 << R10) | (1 << R11) | | |
161 (1 << R12) | (1 << R13) | (1 << R14) | (1 << R15) | | |
162 (1 << R19) | (1 << R20) | (1 << R21) | (1 << R22) | | |
163 (1 << R23) | (1 << R24) | (1 << R25) | (1 << R26); | |
164 | |
165 // Registers available to Dart that are not preserved by runtime calls. | 171 // Registers available to Dart that are not preserved by runtime calls. |
166 const RegList kDartVolatileCpuRegs = | 172 const RegList kDartVolatileCpuRegs = |
167 kDartAvailableCpuRegs & ~kAbiPreservedCpuRegs; | 173 kDartAvailableCpuRegs & ~kAbiPreservedCpuRegs; |
168 const Register kDartFirstVolatileCpuReg = R0; | 174 const Register kDartFirstVolatileCpuReg = R0; |
169 const Register kDartLastVolatileCpuReg = R15; | 175 const Register kDartLastVolatileCpuReg = R15; |
170 const int kDartVolatileCpuRegCount = 16; | 176 const int kDartVolatileCpuRegCount = 16; |
171 const int kDartVolatileFpuRegCount = 24; | 177 const int kDartVolatileFpuRegCount = 24; |
172 | 178 |
173 static inline Register ConcreteRegister(Register r) { | 179 static inline Register ConcreteRegister(Register r) { |
174 return ((r == ZR) || (r == CSP)) ? R31 : r; | 180 return ((r == ZR) || (r == CSP)) ? R31 : r; |
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1068 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } | 1074 static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); } |
1069 | 1075 |
1070 private: | 1076 private: |
1071 DISALLOW_ALLOCATION(); | 1077 DISALLOW_ALLOCATION(); |
1072 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); | 1078 DISALLOW_IMPLICIT_CONSTRUCTORS(Instr); |
1073 }; | 1079 }; |
1074 | 1080 |
1075 } // namespace dart | 1081 } // namespace dart |
1076 | 1082 |
1077 #endif // VM_CONSTANTS_ARM64_H_ | 1083 #endif // VM_CONSTANTS_ARM64_H_ |
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