Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(139)

Issues Search
    My Issues | Starred     Open | Closed | All

Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 1417393003: Subzero. ARM32. New bool folding. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixes lit tests. Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« src/IceTargetLoweringARM32.cpp ('K') | « tests_lit/assembler/arm32/branch-mult-fwd.ll ('k') | tests_lit/llvm2ice_tests/bool-folding.ll » ('j') | tests_lit/llvm2ice_tests/test_i1.ll » ('J')
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 5 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 6 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
7 ; RUN: | %if --need=target_X8632 --command FileCheck %s 7 ; RUN: | %if --need=target_X8632 --command FileCheck %s
8 8
9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 9 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ 10 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \
(...skipping 832 matching lines...) Expand 10 before | Expand all | Expand 10 after
843 ; CHECK: and al,0x1 843 ; CHECK: and al,0x1
844 ; CHECK-NOT: and eax,0x1 844 ; CHECK-NOT: and eax,0x1
845 ; 845 ;
846 ; OPTM1-LABEL: trunc64To1 846 ; OPTM1-LABEL: trunc64To1
847 ; OPTM1: mov eax,DWORD PTR [esp+ 847 ; OPTM1: mov eax,DWORD PTR [esp+
848 ; OPTM1: and al,0x1 848 ; OPTM1: and al,0x1
849 ; OPTM1-NOT: and eax,0x1 849 ; OPTM1-NOT: and eax,0x1
850 850
851 ; ARM32-LABEL: trunc64To1 851 ; ARM32-LABEL: trunc64To1
852 ; ARM32-OM1: and r0, r0, #1 852 ; ARM32-OM1: and r0, r0, #1
853 ; ARM32-OM1: and r0, r0, #1 853 ; ARM32-O2: and r0, r0, #1
854 ; ARM32-O2: tst r0, #1
855 ; ARM32-O2: moveq [[RES:r[0-9]+]], #0
856 ; ARM32-O2: movne [[RES]], #1
857 854
858 define internal i64 @sext32To64(i32 %a) { 855 define internal i64 @sext32To64(i32 %a) {
859 entry: 856 entry:
860 %conv = sext i32 %a to i64 857 %conv = sext i32 %a to i64
861 ret i64 %conv 858 ret i64 %conv
862 } 859 }
863 ; CHECK-LABEL: sext32To64 860 ; CHECK-LABEL: sext32To64
864 ; CHECK: mov 861 ; CHECK: mov
865 ; CHECK: sar {{.*}},0x1f 862 ; CHECK: sar {{.*}},0x1f
866 ; 863 ;
(...skipping 50 matching lines...) Expand 10 before | Expand all | Expand 10 after
917 ; CHECK: mov 914 ; CHECK: mov
918 ; CHECK: shl {{.*}},0x1f 915 ; CHECK: shl {{.*}},0x1f
919 ; CHECK: sar {{.*}},0x1f 916 ; CHECK: sar {{.*}},0x1f
920 ; 917 ;
921 ; OPTM1-LABEL: sext1To64 918 ; OPTM1-LABEL: sext1To64
922 ; OPTM1: mov 919 ; OPTM1: mov
923 ; OPTM1: shl {{.*}},0x1f 920 ; OPTM1: shl {{.*}},0x1f
924 ; OPTM1: sar {{.*}},0x1f 921 ; OPTM1: sar {{.*}},0x1f
925 922
926 ; ARM32-LABEL: sext1To64 923 ; ARM32-LABEL: sext1To64
927 ; ARM32-OM1: lsl {{.*}}, #31 924 ; ARM32: mov {{.*}}, #0
928 ; ARM32-OM1: asr {{.*}}, #31 925 ; ARM32: tst {{.*}}, #1
929 ; ARM32-O2: tst r0, #1 926 ; ARM32: mvn {{.*}}, #0
930 ; ARM32-O2: mvn [[M1:r[0-9]+]], #0 927 ; ARM32: movne
931 ; ARM32-O2: moveq [[RES:r[0-9]+]], #0
932 ; ARM32-O2: movne [[RES]], [[M1]]
933 928
934 define internal i64 @zext32To64(i32 %a) { 929 define internal i64 @zext32To64(i32 %a) {
935 entry: 930 entry:
936 %conv = zext i32 %a to i64 931 %conv = zext i32 %a to i64
937 ret i64 %conv 932 ret i64 %conv
938 } 933 }
939 ; CHECK-LABEL: zext32To64 934 ; CHECK-LABEL: zext32To64
940 ; CHECK: mov 935 ; CHECK: mov
941 ; CHECK: mov {{.*}},0x0 936 ; CHECK: mov {{.*}},0x0
942 ; 937 ;
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after
991 } 986 }
992 ; CHECK-LABEL: zext1To64 987 ; CHECK-LABEL: zext1To64
993 ; CHECK: and {{.*}},0x1 988 ; CHECK: and {{.*}},0x1
994 ; CHECK: mov {{.*}},0x0 989 ; CHECK: mov {{.*}},0x0
995 ; 990 ;
996 ; OPTM1-LABEL: zext1To64 991 ; OPTM1-LABEL: zext1To64
997 ; OPTM1: and {{.*}},0x1 992 ; OPTM1: and {{.*}},0x1
998 ; OPTM1: mov {{.*}},0x0 993 ; OPTM1: mov {{.*}},0x0
999 994
1000 ; ARM32-LABEL: zext1To64 995 ; ARM32-LABEL: zext1To64
1001 ; ARM32-OM1: and {{.*}}, #1 996 ; ARM32: and {{.*}}, #1
1002 ; ARM32-OM1: mov {{.*}}, #0 997 ; ARM32: mov {{.*}}, #0
1003 ; ARM32-O2: tst r0, #1 998 ; ARM32: bx
1004 ; ARM32-O2: moveq {{[^,]*}}, #0
1005 ; ARM32-O2: movne {{[^,]*}}, #1
1006 999
1007 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) { 1000 define internal void @icmpEq64(i64 %a, i64 %b, i64 %c, i64 %d) {
1008 entry: 1001 entry:
1009 %cmp = icmp eq i64 %a, %b 1002 %cmp = icmp eq i64 %a, %b
1010 br i1 %cmp, label %if.then, label %if.end 1003 br i1 %cmp, label %if.then, label %if.end
1011 1004
1012 if.then: ; preds = %entry 1005 if.then: ; preds = %entry
1013 call void @func() 1006 call void @func()
1014 br label %if.end 1007 br label %if.end
1015 1008
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
1054 ; OPTM1-NEXT: je {{.*}} 1047 ; OPTM1-NEXT: je {{.*}}
1055 ; OPTM1-NEXT: mov [[RESULT]],0x0 1048 ; OPTM1-NEXT: mov [[RESULT]],0x0
1056 ; OPTM1-NEXT: cmp [[RESULT]],0x0 1049 ; OPTM1-NEXT: cmp [[RESULT]],0x0
1057 ; OPTM1-NEXT: jne 1050 ; OPTM1-NEXT: jne
1058 ; OPTM1-NEXT: jmp 1051 ; OPTM1-NEXT: jmp
1059 ; OPTM1-NEXT: call 1052 ; OPTM1-NEXT: call
1060 1053
1061 ; ARM32-LABEL: icmpEq64 1054 ; ARM32-LABEL: icmpEq64
1062 ; ARM32: cmp 1055 ; ARM32: cmp
1063 ; ARM32: cmpeq 1056 ; ARM32: cmpeq
1064 ; ARM32-OM1: movne 1057 ; ARM32-OM1: tst
1065 ; ARM32-OM1: moveq 1058 ; ARM32: bne
1066 ; ARM32-OM1: cmp 1059 ; ARM32: bl {{.*}} <func>
1067 ; ARM32-O2: bne
1068 ; ARM32: bl
1069 ; ARM32: cmp 1060 ; ARM32: cmp
1070 ; ARM32: cmpeq 1061 ; ARM32: cmpeq
1071 ; ARM32-OM1: movne 1062 ; ARM32-OM1: tst
1072 ; ARM32-OM1: moveq 1063 ; ARM32: bne
1073 ; ARM32-OM1: cmp 1064 ; ARM32: bl {{.*}} <func>
1074 ; ARM32-O2: bne 1065 ; ARM32: bx
1075 ; ARM32: bl
1076 1066
1077 declare void @func() 1067 declare void @func()
1078 1068
1079 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1069 define internal void @icmpNe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1080 entry: 1070 entry:
1081 %cmp = icmp ne i64 %a, %b 1071 %cmp = icmp ne i64 %a, %b
1082 br i1 %cmp, label %if.then, label %if.end 1072 br i1 %cmp, label %if.then, label %if.end
1083 1073
1084 if.then: ; preds = %entry 1074 if.then: ; preds = %entry
1085 call void @func() 1075 call void @func()
(...skipping 40 matching lines...) Expand 10 before | Expand all | Expand 10 after
1126 ; OPTM1-NEXT: jne {{.*}} 1116 ; OPTM1-NEXT: jne {{.*}}
1127 ; OPTM1-NEXT: mov [[RESULT:.*]],0x0 1117 ; OPTM1-NEXT: mov [[RESULT:.*]],0x0
1128 ; OPTM1-NEXT: cmp [[RESULT]],0x0 1118 ; OPTM1-NEXT: cmp [[RESULT]],0x0
1129 ; OPTM1-NEXT: jne {{.*}} 1119 ; OPTM1-NEXT: jne {{.*}}
1130 ; OPTM1-NEXT: jmp {{.*}} 1120 ; OPTM1-NEXT: jmp {{.*}}
1131 ; OPTM1-NEXT: call 1121 ; OPTM1-NEXT: call
1132 1122
1133 ; ARM32-LABEL: icmpNe64 1123 ; ARM32-LABEL: icmpNe64
1134 ; ARM32: cmp 1124 ; ARM32: cmp
1135 ; ARM32: cmpeq 1125 ; ARM32: cmpeq
1136 ; ARM32-OM1: moveq 1126 ; ARM32-OM1: tst
1137 ; ARM32-OM1: movne 1127 ; ARM32-OM1: bne
1138 ; ARM32-OM1: cmp
1139 ; ARM32-O2: beq 1128 ; ARM32-O2: beq
1140 ; ARM32: bl 1129 ; ARM32: bl {{.*}} <func>
1141 ; ARM32: cmp 1130 ; ARM32: cmp
1142 ; ARM32: cmpeq 1131 ; ARM32: cmpeq
1143 ; ARM32-OM1: moveq 1132 ; ARM32-OM1: tst
1144 ; ARM32-OM1: movne 1133 ; ARM32-OM1: bne
1145 ; ARM32-OM1: cmp
1146 ; ARM32-O2: beq 1134 ; ARM32-O2: beq
1147 ; ARM32: bl 1135 ; ARM32: bl
1148 1136
1149 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) { 1137 define internal void @icmpGt64(i64 %a, i64 %b, i64 %c, i64 %d) {
1150 entry: 1138 entry:
1151 %cmp = icmp ugt i64 %a, %b 1139 %cmp = icmp ugt i64 %a, %b
1152 br i1 %cmp, label %if.then, label %if.end 1140 br i1 %cmp, label %if.then, label %if.end
1153 1141
1154 if.then: ; preds = %entry 1142 if.then: ; preds = %entry
1155 call void @func() 1143 call void @func()
(...skipping 26 matching lines...) Expand all
1182 ; OPTM1: ja 1170 ; OPTM1: ja
1183 ; OPTM1: call 1171 ; OPTM1: call
1184 ; OPTM1: jg 1172 ; OPTM1: jg
1185 ; OPTM1: jl 1173 ; OPTM1: jl
1186 ; OPTM1: ja 1174 ; OPTM1: ja
1187 ; OPTM1: call 1175 ; OPTM1: call
1188 1176
1189 ; ARM32-LABEL: icmpGt64 1177 ; ARM32-LABEL: icmpGt64
1190 ; ARM32: cmp 1178 ; ARM32: cmp
1191 ; ARM32: cmpeq 1179 ; ARM32: cmpeq
1192 ; ARM32-OM1: movls 1180 ; ARM32-OM1: tst
1193 ; ARM32-OM1: movhi 1181 ; ARM32-OM1: bne
1194 ; ARM32-OM1: cmp
1195 ; ARM32-O2: bls 1182 ; ARM32-O2: bls
1196 ; ARM32: bl 1183 ; ARM32: bl
1197 ; ARM32: cmp 1184 ; ARM32: cmp
1198 ; ARM32: sbcs 1185 ; ARM32: sbcs
1199 ; ARM32-OM1: movge 1186 ; ARM32-OM1: tst
1200 ; ARM32-OM1: movlt 1187 ; ARM32-OM1: bne
1201 ; ARM32-OM1: cmp
1202 ; ARM32-O2: bge 1188 ; ARM32-O2: bge
1203 ; ARM32: bl 1189 ; ARM32: bl
1204 1190
1205 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1191 define internal void @icmpGe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1206 entry: 1192 entry:
1207 %cmp = icmp uge i64 %a, %b 1193 %cmp = icmp uge i64 %a, %b
1208 br i1 %cmp, label %if.then, label %if.end 1194 br i1 %cmp, label %if.then, label %if.end
1209 1195
1210 if.then: ; preds = %entry 1196 if.then: ; preds = %entry
1211 call void @func() 1197 call void @func()
(...skipping 26 matching lines...) Expand all
1238 ; OPTM1: jae 1224 ; OPTM1: jae
1239 ; OPTM1: call 1225 ; OPTM1: call
1240 ; OPTM1: jg 1226 ; OPTM1: jg
1241 ; OPTM1: jl 1227 ; OPTM1: jl
1242 ; OPTM1: jae 1228 ; OPTM1: jae
1243 ; OPTM1: call 1229 ; OPTM1: call
1244 1230
1245 ; ARM32-LABEL: icmpGe64 1231 ; ARM32-LABEL: icmpGe64
1246 ; ARM32: cmp 1232 ; ARM32: cmp
1247 ; ARM32: cmpeq 1233 ; ARM32: cmpeq
1248 ; ARM32-OM1: movcc 1234 ; ARM32-OM1: tst
1249 ; ARM32-OM1: movcs 1235 ; ARM32-OM1: bne
1250 ; ARM32-OM1: cmp
1251 ; ARM32-O2: bcc 1236 ; ARM32-O2: bcc
1252 ; ARM32: bl 1237 ; ARM32: bl
1253 ; ARM32: cmp 1238 ; ARM32: cmp
1254 ; ARM32: sbcs 1239 ; ARM32: sbcs
1255 ; ARM32-OM1: movlt 1240 ; ARM32-OM1: tst
1256 ; ARM32-OM1: movge 1241 ; ARM32-OM1: bne
1257 ; ARM32-OM1: cmp
1258 ; ARM32-O2: blt 1242 ; ARM32-O2: blt
1259 ; ARM32: bl 1243 ; ARM32: bl
1260 1244
1261 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) { 1245 define internal void @icmpLt64(i64 %a, i64 %b, i64 %c, i64 %d) {
1262 entry: 1246 entry:
1263 %cmp = icmp ult i64 %a, %b 1247 %cmp = icmp ult i64 %a, %b
1264 br i1 %cmp, label %if.then, label %if.end 1248 br i1 %cmp, label %if.then, label %if.end
1265 1249
1266 if.then: ; preds = %entry 1250 if.then: ; preds = %entry
1267 call void @func() 1251 call void @func()
(...skipping 26 matching lines...) Expand all
1294 ; OPTM1: jb 1278 ; OPTM1: jb
1295 ; OPTM1: call 1279 ; OPTM1: call
1296 ; OPTM1: jl 1280 ; OPTM1: jl
1297 ; OPTM1: jg 1281 ; OPTM1: jg
1298 ; OPTM1: jb 1282 ; OPTM1: jb
1299 ; OPTM1: call 1283 ; OPTM1: call
1300 1284
1301 ; ARM32-LABEL: icmpLt64 1285 ; ARM32-LABEL: icmpLt64
1302 ; ARM32: cmp 1286 ; ARM32: cmp
1303 ; ARM32: cmpeq 1287 ; ARM32: cmpeq
1304 ; ARM32-OM1: movcs 1288 ; ARM32-OM1: tst
1305 ; ARM32-OM1: movcc 1289 ; ARM32-OM1: bne
1306 ; ARM32-OM1: cmp
1307 ; ARM32-O2: bcs 1290 ; ARM32-O2: bcs
1308 ; ARM32: bl 1291 ; ARM32: bl
1309 ; ARM32: cmp 1292 ; ARM32: cmp
1310 ; ARM32: sbcs 1293 ; ARM32: sbcs
1311 ; ARM32-OM1: movge 1294 ; ARM32-OM1: tst
1312 ; ARM32-OM1: movlt 1295 ; ARM32-OM1: bne
1313 ; ARM32-OM1: cmp
1314 ; ARM32-O2: bge 1296 ; ARM32-O2: bge
1315 ; ARM32: bl 1297 ; ARM32: bl
1316 1298
1317 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) { 1299 define internal void @icmpLe64(i64 %a, i64 %b, i64 %c, i64 %d) {
1318 entry: 1300 entry:
1319 %cmp = icmp ule i64 %a, %b 1301 %cmp = icmp ule i64 %a, %b
1320 br i1 %cmp, label %if.then, label %if.end 1302 br i1 %cmp, label %if.then, label %if.end
1321 1303
1322 if.then: ; preds = %entry 1304 if.then: ; preds = %entry
1323 call void @func() 1305 call void @func()
(...skipping 26 matching lines...) Expand all
1350 ; OPTM1: jbe 1332 ; OPTM1: jbe
1351 ; OPTM1: call 1333 ; OPTM1: call
1352 ; OPTM1: jl 1334 ; OPTM1: jl
1353 ; OPTM1: jg 1335 ; OPTM1: jg
1354 ; OPTM1: jbe 1336 ; OPTM1: jbe
1355 ; OPTM1: call 1337 ; OPTM1: call
1356 1338
1357 ; ARM32-LABEL: icmpLe64 1339 ; ARM32-LABEL: icmpLe64
1358 ; ARM32: cmp 1340 ; ARM32: cmp
1359 ; ARM32: cmpeq 1341 ; ARM32: cmpeq
1360 ; ARM32-OM1: movhi 1342 ; ARM32-OM1: tst
1361 ; ARM32-OM1: movls 1343 ; ARM32-OM1: bne
1362 ; ARM32-OM1: cmp
1363 ; ARM32-O2: bhi 1344 ; ARM32-O2: bhi
1364 ; ARM32: bl 1345 ; ARM32: bl
1365 ; ARM32: cmp 1346 ; ARM32: cmp
1366 ; ARM32: sbcs 1347 ; ARM32: sbcs
1367 ; ARM32-OM1: movlt 1348 ; ARM32-OM1: tst
1368 ; ARM32-OM1: movge 1349 ; ARM32-OM1: bne
1369 ; ARM32-O2: blt 1350 ; ARM32-O2: blt
1370 ; ARM32: bl 1351 ; ARM32: bl
1371 1352
1372 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) { 1353 define internal i32 @icmpEq64Bool(i64 %a, i64 %b) {
1373 entry: 1354 entry:
1374 %cmp = icmp eq i64 %a, %b 1355 %cmp = icmp eq i64 %a, %b
1375 %cmp.ret_ext = zext i1 %cmp to i32 1356 %cmp.ret_ext = zext i1 %cmp to i32
1376 ret i32 %cmp.ret_ext 1357 ret i32 %cmp.ret_ext
1377 } 1358 }
1378 ; CHECK-LABEL: icmpEq64Bool 1359 ; CHECK-LABEL: icmpEq64Bool
1379 ; CHECK: jne 1360 ; CHECK: jne
1380 ; CHECK: je 1361 ; CHECK: je
1381 ; 1362 ;
1382 ; OPTM1-LABEL: icmpEq64Bool 1363 ; OPTM1-LABEL: icmpEq64Bool
1383 ; OPTM1: jne 1364 ; OPTM1: jne
1384 ; OPTM1: je 1365 ; OPTM1: je
1385 1366
1386 ; ARM32-LABEL: icmpEq64Bool 1367 ; ARM32-LABEL: icmpEq64Bool
1387 ; ARM32: movne 1368 ; ARM32: mov
1388 ; ARM32: moveq 1369 ; ARM32: moveq
1389 1370
1390 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) { 1371 define internal i32 @icmpNe64Bool(i64 %a, i64 %b) {
1391 entry: 1372 entry:
1392 %cmp = icmp ne i64 %a, %b 1373 %cmp = icmp ne i64 %a, %b
1393 %cmp.ret_ext = zext i1 %cmp to i32 1374 %cmp.ret_ext = zext i1 %cmp to i32
1394 ret i32 %cmp.ret_ext 1375 ret i32 %cmp.ret_ext
1395 } 1376 }
1396 ; CHECK-LABEL: icmpNe64Bool 1377 ; CHECK-LABEL: icmpNe64Bool
1397 ; CHECK: jne 1378 ; CHECK: jne
1398 ; CHECK: jne 1379 ; CHECK: jne
1399 ; 1380 ;
1400 ; OPTM1-LABEL: icmpNe64Bool 1381 ; OPTM1-LABEL: icmpNe64Bool
1401 ; OPTM1: jne 1382 ; OPTM1: jne
1402 ; OPTM1: jne 1383 ; OPTM1: jne
1403 1384
1404 ; ARM32-LABEL: icmpNe64Bool 1385 ; ARM32-LABEL: icmpNe64Bool
1405 ; ARM32: moveq 1386 ; ARM32: mov
1406 ; ARM32: movne 1387 ; ARM32: movne
1407 1388
1408 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) { 1389 define internal i32 @icmpSgt64Bool(i64 %a, i64 %b) {
1409 entry: 1390 entry:
1410 %cmp = icmp sgt i64 %a, %b 1391 %cmp = icmp sgt i64 %a, %b
1411 %cmp.ret_ext = zext i1 %cmp to i32 1392 %cmp.ret_ext = zext i1 %cmp to i32
1412 ret i32 %cmp.ret_ext 1393 ret i32 %cmp.ret_ext
1413 } 1394 }
1414 ; CHECK-LABEL: icmpSgt64Bool 1395 ; CHECK-LABEL: icmpSgt64Bool
1415 ; CHECK: cmp 1396 ; CHECK: cmp
1416 ; CHECK: jg 1397 ; CHECK: jg
1417 ; CHECK: jl 1398 ; CHECK: jl
1418 ; CHECK: cmp 1399 ; CHECK: cmp
1419 ; CHECK: ja 1400 ; CHECK: ja
1420 ; 1401 ;
1421 ; OPTM1-LABEL: icmpSgt64Bool 1402 ; OPTM1-LABEL: icmpSgt64Bool
1422 ; OPTM1: cmp 1403 ; OPTM1: cmp
1423 ; OPTM1: jg 1404 ; OPTM1: jg
1424 ; OPTM1: jl 1405 ; OPTM1: jl
1425 ; OPTM1: cmp 1406 ; OPTM1: cmp
1426 ; OPTM1: ja 1407 ; OPTM1: ja
1427 1408
1428 ; ARM32-LABEL: icmpSgt64Bool 1409 ; ARM32-LABEL: icmpSgt64Bool
1410 ; ARM32: mov
1429 ; ARM32: cmp 1411 ; ARM32: cmp
1430 ; ARM32: sbcs 1412 ; ARM32: sbcs
1431 ; ARM32: movge
1432 ; ARM32: movlt 1413 ; ARM32: movlt
1433 1414
1434 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) { 1415 define internal i32 @icmpUgt64Bool(i64 %a, i64 %b) {
1435 entry: 1416 entry:
1436 %cmp = icmp ugt i64 %a, %b 1417 %cmp = icmp ugt i64 %a, %b
1437 %cmp.ret_ext = zext i1 %cmp to i32 1418 %cmp.ret_ext = zext i1 %cmp to i32
1438 ret i32 %cmp.ret_ext 1419 ret i32 %cmp.ret_ext
1439 } 1420 }
1440 ; CHECK-LABEL: icmpUgt64Bool 1421 ; CHECK-LABEL: icmpUgt64Bool
1441 ; CHECK: cmp 1422 ; CHECK: cmp
1442 ; CHECK: ja 1423 ; CHECK: ja
1443 ; CHECK: jb 1424 ; CHECK: jb
1444 ; CHECK: cmp 1425 ; CHECK: cmp
1445 ; CHECK: ja 1426 ; CHECK: ja
1446 ; 1427 ;
1447 ; OPTM1-LABEL: icmpUgt64Bool 1428 ; OPTM1-LABEL: icmpUgt64Bool
1448 ; OPTM1: cmp 1429 ; OPTM1: cmp
1449 ; OPTM1: ja 1430 ; OPTM1: ja
1450 ; OPTM1: jb 1431 ; OPTM1: jb
1451 ; OPTM1: cmp 1432 ; OPTM1: cmp
1452 ; OPTM1: ja 1433 ; OPTM1: ja
1453 1434
1454 ; ARM32-LABEL: icmpUgt64Bool 1435 ; ARM32-LABEL: icmpUgt64Bool
1436 ; ARM32: mov
1455 ; ARM32: cmp 1437 ; ARM32: cmp
1456 ; ARM32: cmpeq 1438 ; ARM32: cmpeq
1457 ; ARM32: movls
1458 ; ARM32: movhi 1439 ; ARM32: movhi
1459 1440
1460 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) { 1441 define internal i32 @icmpSge64Bool(i64 %a, i64 %b) {
1461 entry: 1442 entry:
1462 %cmp = icmp sge i64 %a, %b 1443 %cmp = icmp sge i64 %a, %b
1463 %cmp.ret_ext = zext i1 %cmp to i32 1444 %cmp.ret_ext = zext i1 %cmp to i32
1464 ret i32 %cmp.ret_ext 1445 ret i32 %cmp.ret_ext
1465 } 1446 }
1466 ; CHECK-LABEL: icmpSge64Bool 1447 ; CHECK-LABEL: icmpSge64Bool
1467 ; CHECK: cmp 1448 ; CHECK: cmp
1468 ; CHECK: jg 1449 ; CHECK: jg
1469 ; CHECK: jl 1450 ; CHECK: jl
1470 ; CHECK: cmp 1451 ; CHECK: cmp
1471 ; CHECK: jae 1452 ; CHECK: jae
1472 ; 1453 ;
1473 ; OPTM1-LABEL: icmpSge64Bool 1454 ; OPTM1-LABEL: icmpSge64Bool
1474 ; OPTM1: cmp 1455 ; OPTM1: cmp
1475 ; OPTM1: jg 1456 ; OPTM1: jg
1476 ; OPTM1: jl 1457 ; OPTM1: jl
1477 ; OPTM1: cmp 1458 ; OPTM1: cmp
1478 ; OPTM1: jae 1459 ; OPTM1: jae
1479 1460
1480 ; ARM32-LABEL: icmpSge64Bool 1461 ; ARM32-LABEL: icmpSge64Bool
1462 ; ARM32: mov
1481 ; ARM32: cmp 1463 ; ARM32: cmp
1482 ; ARM32: sbcs 1464 ; ARM32: sbcs
1483 ; ARM32: movlt
1484 ; ARM32: movge 1465 ; ARM32: movge
1485 1466
1486 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) { 1467 define internal i32 @icmpUge64Bool(i64 %a, i64 %b) {
1487 entry: 1468 entry:
1488 %cmp = icmp uge i64 %a, %b 1469 %cmp = icmp uge i64 %a, %b
1489 %cmp.ret_ext = zext i1 %cmp to i32 1470 %cmp.ret_ext = zext i1 %cmp to i32
1490 ret i32 %cmp.ret_ext 1471 ret i32 %cmp.ret_ext
1491 } 1472 }
1492 ; CHECK-LABEL: icmpUge64Bool 1473 ; CHECK-LABEL: icmpUge64Bool
1493 ; CHECK: cmp 1474 ; CHECK: cmp
1494 ; CHECK: ja 1475 ; CHECK: ja
1495 ; CHECK: jb 1476 ; CHECK: jb
1496 ; CHECK: cmp 1477 ; CHECK: cmp
1497 ; CHECK: jae 1478 ; CHECK: jae
1498 ; 1479 ;
1499 ; OPTM1-LABEL: icmpUge64Bool 1480 ; OPTM1-LABEL: icmpUge64Bool
1500 ; OPTM1: cmp 1481 ; OPTM1: cmp
1501 ; OPTM1: ja 1482 ; OPTM1: ja
1502 ; OPTM1: jb 1483 ; OPTM1: jb
1503 ; OPTM1: cmp 1484 ; OPTM1: cmp
1504 ; OPTM1: jae 1485 ; OPTM1: jae
1505 1486
1506 ; ARM32-LABEL: icmpUge64Bool 1487 ; ARM32-LABEL: icmpUge64Bool
1488 ; ARM32: mov
1507 ; ARM32: cmp 1489 ; ARM32: cmp
1508 ; ARM32: cmpeq 1490 ; ARM32: cmpeq
1509 ; ARM32: movcc
1510 ; ARM32: movcs 1491 ; ARM32: movcs
1511 1492
1512 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) { 1493 define internal i32 @icmpSlt64Bool(i64 %a, i64 %b) {
1513 entry: 1494 entry:
1514 %cmp = icmp slt i64 %a, %b 1495 %cmp = icmp slt i64 %a, %b
1515 %cmp.ret_ext = zext i1 %cmp to i32 1496 %cmp.ret_ext = zext i1 %cmp to i32
1516 ret i32 %cmp.ret_ext 1497 ret i32 %cmp.ret_ext
1517 } 1498 }
1518 ; CHECK-LABEL: icmpSlt64Bool 1499 ; CHECK-LABEL: icmpSlt64Bool
1519 ; CHECK: cmp 1500 ; CHECK: cmp
1520 ; CHECK: jl 1501 ; CHECK: jl
1521 ; CHECK: jg 1502 ; CHECK: jg
1522 ; CHECK: cmp 1503 ; CHECK: cmp
1523 ; CHECK: jb 1504 ; CHECK: jb
1524 ; 1505 ;
1525 ; OPTM1-LABEL: icmpSlt64Bool 1506 ; OPTM1-LABEL: icmpSlt64Bool
1526 ; OPTM1: cmp 1507 ; OPTM1: cmp
1527 ; OPTM1: jl 1508 ; OPTM1: jl
1528 ; OPTM1: jg 1509 ; OPTM1: jg
1529 ; OPTM1: cmp 1510 ; OPTM1: cmp
1530 ; OPTM1: jb 1511 ; OPTM1: jb
1531 1512
1532 ; ARM32-LABEL: icmpSlt64Bool 1513 ; ARM32-LABEL: icmpSlt64Bool
1514 ; ARM32: mov
1533 ; ARM32: cmp 1515 ; ARM32: cmp
1534 ; ARM32: sbcs 1516 ; ARM32: sbcs
1535 ; ARM32: movge
1536 ; ARM32: movlt 1517 ; ARM32: movlt
1537 1518
1538 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) { 1519 define internal i32 @icmpUlt64Bool(i64 %a, i64 %b) {
1539 entry: 1520 entry:
1540 %cmp = icmp ult i64 %a, %b 1521 %cmp = icmp ult i64 %a, %b
1541 %cmp.ret_ext = zext i1 %cmp to i32 1522 %cmp.ret_ext = zext i1 %cmp to i32
1542 ret i32 %cmp.ret_ext 1523 ret i32 %cmp.ret_ext
1543 } 1524 }
1544 ; CHECK-LABEL: icmpUlt64Bool 1525 ; CHECK-LABEL: icmpUlt64Bool
1545 ; CHECK: cmp 1526 ; CHECK: cmp
1546 ; CHECK: jb 1527 ; CHECK: jb
1547 ; CHECK: ja 1528 ; CHECK: ja
1548 ; CHECK: cmp 1529 ; CHECK: cmp
1549 ; CHECK: jb 1530 ; CHECK: jb
1550 ; 1531 ;
1551 ; OPTM1-LABEL: icmpUlt64Bool 1532 ; OPTM1-LABEL: icmpUlt64Bool
1552 ; OPTM1: cmp 1533 ; OPTM1: cmp
1553 ; OPTM1: jb 1534 ; OPTM1: jb
1554 ; OPTM1: ja 1535 ; OPTM1: ja
1555 ; OPTM1: cmp 1536 ; OPTM1: cmp
1556 ; OPTM1: jb 1537 ; OPTM1: jb
1557 1538
1558 ; ARM32-LABEL: icmpUlt64Bool 1539 ; ARM32-LABEL: icmpUlt64Bool
1540 ; ARM32: mov
1559 ; ARM32: cmp 1541 ; ARM32: cmp
1560 ; ARM32: cmpeq 1542 ; ARM32: cmpeq
1561 ; ARM32: movcs
1562 ; ARM32: movcc 1543 ; ARM32: movcc
1563 1544
1564 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) { 1545 define internal i32 @icmpSle64Bool(i64 %a, i64 %b) {
1565 entry: 1546 entry:
1566 %cmp = icmp sle i64 %a, %b 1547 %cmp = icmp sle i64 %a, %b
1567 %cmp.ret_ext = zext i1 %cmp to i32 1548 %cmp.ret_ext = zext i1 %cmp to i32
1568 ret i32 %cmp.ret_ext 1549 ret i32 %cmp.ret_ext
1569 } 1550 }
1570 ; CHECK-LABEL: icmpSle64Bool 1551 ; CHECK-LABEL: icmpSle64Bool
1571 ; CHECK: cmp 1552 ; CHECK: cmp
1572 ; CHECK: jl 1553 ; CHECK: jl
1573 ; CHECK: jg 1554 ; CHECK: jg
1574 ; CHECK: cmp 1555 ; CHECK: cmp
1575 ; CHECK: jbe 1556 ; CHECK: jbe
1576 ; 1557 ;
1577 ; OPTM1-LABEL: icmpSle64Bool 1558 ; OPTM1-LABEL: icmpSle64Bool
1578 ; OPTM1: cmp 1559 ; OPTM1: cmp
1579 ; OPTM1: jl 1560 ; OPTM1: jl
1580 ; OPTM1: jg 1561 ; OPTM1: jg
1581 ; OPTM1: cmp 1562 ; OPTM1: cmp
1582 ; OPTM1: jbe 1563 ; OPTM1: jbe
1583 1564
1584 ; ARM32-LABEL: icmpSle64Bool 1565 ; ARM32-LABEL: icmpSle64Bool
1566 ; ARM32: mov
1585 ; ARM32: cmp 1567 ; ARM32: cmp
1586 ; ARM32: sbcs 1568 ; ARM32: sbcs
1587 ; ARM32: movlt
1588 ; ARM32: movge 1569 ; ARM32: movge
1589 1570
1590 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) { 1571 define internal i32 @icmpUle64Bool(i64 %a, i64 %b) {
1591 entry: 1572 entry:
1592 %cmp = icmp ule i64 %a, %b 1573 %cmp = icmp ule i64 %a, %b
1593 %cmp.ret_ext = zext i1 %cmp to i32 1574 %cmp.ret_ext = zext i1 %cmp to i32
1594 ret i32 %cmp.ret_ext 1575 ret i32 %cmp.ret_ext
1595 } 1576 }
1596 ; CHECK-LABEL: icmpUle64Bool 1577 ; CHECK-LABEL: icmpUle64Bool
1597 ; CHECK: cmp 1578 ; CHECK: cmp
1598 ; CHECK: jb 1579 ; CHECK: jb
1599 ; CHECK: ja 1580 ; CHECK: ja
1600 ; CHECK: cmp 1581 ; CHECK: cmp
1601 ; CHECK: jbe 1582 ; CHECK: jbe
1602 ; 1583 ;
1603 ; OPTM1-LABEL: icmpUle64Bool 1584 ; OPTM1-LABEL: icmpUle64Bool
1604 ; OPTM1: cmp 1585 ; OPTM1: cmp
1605 ; OPTM1: jb 1586 ; OPTM1: jb
1606 ; OPTM1: ja 1587 ; OPTM1: ja
1607 ; OPTM1: cmp 1588 ; OPTM1: cmp
1608 ; OPTM1: jbe 1589 ; OPTM1: jbe
1609 1590
1610 ; ARM32-LABEL: icmpUle64Bool 1591 ; ARM32-LABEL: icmpUle64Bool
1592 ; ARM32: mov
1611 ; ARM32: cmp 1593 ; ARM32: cmp
1612 ; ARM32: cmpeq 1594 ; ARM32: cmpeq
1613 ; ARM32: movhi
1614 ; ARM32: movls 1595 ; ARM32: movls
1615 1596
1616 define internal i64 @load64(i32 %a) { 1597 define internal i64 @load64(i32 %a) {
1617 entry: 1598 entry:
1618 %__1 = inttoptr i32 %a to i64* 1599 %__1 = inttoptr i32 %a to i64*
1619 %v0 = load i64, i64* %__1, align 1 1600 %v0 = load i64, i64* %__1, align 1
1620 ret i64 %v0 1601 ret i64 %v0
1621 } 1602 }
1622 ; CHECK-LABEL: load64 1603 ; CHECK-LABEL: load64
1623 ; CHECK: mov e[[REGISTER:[a-z]+]],DWORD PTR [esp+0x4] 1604 ; CHECK: mov e[[REGISTER:[a-z]+]],DWORD PTR [esp+0x4]
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
1694 ; OPTM1: jb 1675 ; OPTM1: jb
1695 ; OPTM1: ja 1676 ; OPTM1: ja
1696 ; OPTM1: cmp 1677 ; OPTM1: cmp
1697 ; OPTM1: jb 1678 ; OPTM1: jb
1698 ; OPTM1: cmp 1679 ; OPTM1: cmp
1699 ; OPTM1: cmovne 1680 ; OPTM1: cmovne
1700 1681
1701 ; ARM32-LABEL: select64VarVar 1682 ; ARM32-LABEL: select64VarVar
1702 ; ARM32: cmp 1683 ; ARM32: cmp
1703 ; ARM32: cmpeq 1684 ; ARM32: cmpeq
1704 ; ARM32-OM1: movcs 1685 ; ARM32-OM1: tst
1705 ; ARM32-OM1: movcc
1706 ; ARM32-OM1: cmp
1707 ; ARM32-OM1: movne 1686 ; ARM32-OM1: movne
1708 ; ARM32-O2: movcc 1687 ; ARM32-O2: movcc
1709 ; ARM32-OM1: movne 1688 ; ARM32-OM1: movne
1710 ; ARM32-O2: movcc 1689 ; ARM32-O2: movcc
1711 1690
1712 define internal i64 @select64VarConst(i64 %a, i64 %b) { 1691 define internal i64 @select64VarConst(i64 %a, i64 %b) {
1713 entry: 1692 entry:
1714 %cmp = icmp ult i64 %a, %b 1693 %cmp = icmp ult i64 %a, %b
1715 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256 1694 %cond = select i1 %cmp, i64 %a, i64 -2401053092306725256
1716 ret i64 %cond 1695 ret i64 %cond
(...skipping 10 matching lines...) Expand all
1727 ; OPTM1-LABEL: select64VarConst 1706 ; OPTM1-LABEL: select64VarConst
1728 ; OPTM1: cmp 1707 ; OPTM1: cmp
1729 ; OPTM1: jb 1708 ; OPTM1: jb
1730 ; OPTM1: ja 1709 ; OPTM1: ja
1731 ; OPTM1: cmp 1710 ; OPTM1: cmp
1732 ; OPTM1: jb 1711 ; OPTM1: jb
1733 ; OPTM1: cmp 1712 ; OPTM1: cmp
1734 ; OPTM1: cmovne 1713 ; OPTM1: cmovne
1735 1714
1736 ; ARM32-LABEL: select64VarConst 1715 ; ARM32-LABEL: select64VarConst
1716 ; ARM32: mov
1717 ; ARM32: mov
1737 ; ARM32: cmp 1718 ; ARM32: cmp
1738 ; ARM32: cmpeq 1719 ; ARM32: cmpeq
1739 ; ARM32-OM1: movcs 1720 ; ARM32-OM1: tst
1740 ; ARM32-OM1: movcc
1741 ; ARM32-OM1: cmp
1742 ; ARM32: movw
1743 ; ARM32: movt
1744 ; ARM32-OM1: movne 1721 ; ARM32-OM1: movne
1745 ; ARM32-O2: movcc 1722 ; ARM32-O2: movcc
1746 ; ARM32: movw
1747 ; ARM32: movt
1748 ; ARM32-OM1: movne 1723 ; ARM32-OM1: movne
1749 ; ARM32-O2: movcc 1724 ; ARM32-O2: movcc
1725 ; ARM32-O2: mov
1726 ; ARM32-O2: mov
1750 1727
1751 define internal i64 @select64ConstVar(i64 %a, i64 %b) { 1728 define internal i64 @select64ConstVar(i64 %a, i64 %b) {
1752 entry: 1729 entry:
1753 %cmp = icmp ult i64 %a, %b 1730 %cmp = icmp ult i64 %a, %b
1754 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b 1731 %cond = select i1 %cmp, i64 -2401053092306725256, i64 %b
1755 ret i64 %cond 1732 ret i64 %cond
1756 } 1733 }
1757 ; CHECK-LABEL: select64ConstVar 1734 ; CHECK-LABEL: select64ConstVar
1758 ; CHECK: cmp 1735 ; CHECK: cmp
1759 ; CHECK: jb 1736 ; CHECK: jb
1760 ; CHECK: ja 1737 ; CHECK: ja
1761 ; CHECK: cmp 1738 ; CHECK: cmp
1762 ; CHECK: jb 1739 ; CHECK: jb
1763 ; CHECK: cmp 1740 ; CHECK: cmp
1764 ; CHECK: cmove 1741 ; CHECK: cmove
1765 ; 1742 ;
1766 ; OPTM1-LABEL: select64ConstVar 1743 ; OPTM1-LABEL: select64ConstVar
1767 ; OPTM1: cmp 1744 ; OPTM1: cmp
1768 ; OPTM1: jb 1745 ; OPTM1: jb
1769 ; OPTM1: ja 1746 ; OPTM1: ja
1770 ; OPTM1: cmp 1747 ; OPTM1: cmp
1771 ; OPTM1: jb 1748 ; OPTM1: jb
1772 ; OPTM1: cmp 1749 ; OPTM1: cmp
1773 ; OPTM1: cmove 1750 ; OPTM1: cmove
1774 1751
1775 ; ARM32-LABEL: select64ConstVar 1752 ; ARM32-LABEL: select64ConstVar
1776 ; ARM32: cmp 1753 ; ARM32: cmp
1777 ; ARM32: cmpeq 1754 ; ARM32: cmpeq
1778 ; ARM32-OM1: movcs 1755 ; ARM32-OM1: tst
1779 ; ARM32-OM1: movcc
1780 ; ARM32-OM1: cmp
1781 ; ARM32: movw 1756 ; ARM32: movw
1782 ; ARM32: movt 1757 ; ARM32: movt
1783 ; ARM32-OM1: movne 1758 ; ARM32-OM1: movne
1784 ; ARM32-O2: movcc 1759 ; ARM32-O2: movcc
1785 ; ARM32: movw 1760 ; ARM32: movw
1786 ; ARM32: movt 1761 ; ARM32: movt
1787 ; ARM32-OM1: movne 1762 ; ARM32-OM1: movne
1788 ; ARM32-O2: movcc 1763 ; ARM32-O2: movcc
1789 1764
1790 define internal void @icmpEq64Imm() { 1765 define internal void @icmpEq64Imm() {
(...skipping 92 matching lines...) Expand 10 before | Expand all | Expand 10 after
1883 ; CHECK-LABEL: phi64Undef 1858 ; CHECK-LABEL: phi64Undef
1884 ; CHECK: mov {{.*}},0x0 1859 ; CHECK: mov {{.*}},0x0
1885 ; CHECK: mov {{.*}},0x0 1860 ; CHECK: mov {{.*}},0x0
1886 ; OPTM1-LABEL: phi64Undef 1861 ; OPTM1-LABEL: phi64Undef
1887 ; OPTM1: mov {{.*}},0x0 1862 ; OPTM1: mov {{.*}},0x0
1888 ; OPTM1: mov {{.*}},0x0 1863 ; OPTM1: mov {{.*}},0x0
1889 ; ARM32-LABEL: phi64Undef 1864 ; ARM32-LABEL: phi64Undef
1890 ; ARM32: mov {{.*}} #0 1865 ; ARM32: mov {{.*}} #0
1891 ; ARM32: mov {{.*}} #0 1866 ; ARM32: mov {{.*}} #0
1892 1867
OLDNEW
« src/IceTargetLoweringARM32.cpp ('K') | « tests_lit/assembler/arm32/branch-mult-fwd.ll ('k') | tests_lit/llvm2ice_tests/bool-folding.ll » ('j') | tests_lit/llvm2ice_tests/test_i1.ll » ('J')

Powered by Google App Engine
This is Rietveld 408576698