Chromium Code Reviews| Index: tests_lit/llvm2ice_tests/int-arg.ll |
| diff --git a/tests_lit/llvm2ice_tests/int-arg.ll b/tests_lit/llvm2ice_tests/int-arg.ll |
| index 76c2abe535b3d08e6655755bf36b05edc90e9584..8fe96196e0f9e531c393918d37d4d079755af317 100644 |
| --- a/tests_lit/llvm2ice_tests/int-arg.ll |
| +++ b/tests_lit/llvm2ice_tests/int-arg.ll |
| @@ -14,6 +14,15 @@ |
| ; RUN: | %if --need=target_ARM32 --need=allow_dump \ |
| ; RUN: --command FileCheck --check-prefix ARM32 %s |
| +; TODO(RKotler): Stop skipping unimplemented parts (via --skip-unimplemented) |
| +; once enough infrastructure is in. Also, switch to --filetype=obj |
| +; when possible. |
| +; RUN: %if --need=target_MIPS32 --need=allow_dump \ |
| +; RUN: --command %p2i --filetype=asm --assemble \ |
| +; RUN: --disassemble --target mips32 -i %s --args -O2 --skip-unimplemented \ |
| +; RUN: | %if --need=target_MIPS32 --need=allow_dump \ |
| +; RUN: --command FileCheck --check-prefix MIPS32 %s |
| + |
| ; For x86-32, integer arguments use the stack. |
| ; For ARM32, integer arguments can be r0-r3. i64 arguments occupy two |
| ; adjacent 32-bit registers, and require the first to be an even register. |
| @@ -30,6 +39,9 @@ entry: |
| ; CHECK-NEXT: ret |
| ; ARM32-LABEL: test_returning32_arg0 |
| ; ARM32-NEXT: bx lr |
| +; MIPS32-LABEL: <test_returning32_arg0> |
| +; MIPS32: move v0,a0 |
| +; MIPS32-NEXT: jr ra |
| define i32 @test_returning32_arg1(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7) { |
| entry: |
| @@ -41,7 +53,9 @@ entry: |
| ; ARM32-LABEL: test_returning32_arg1 |
| ; ARM32-NEXT: mov r0, r1 |
| ; ARM32-NEXT: bx lr |
| - |
| +; MIPS32-LABEL: <test_returning32_arg1> |
| +; MIPS32: move v0,a1 |
|
Jim Stichnoth
2015/10/18 11:48:40
remove tab characters
rkotlerimgtec
2015/10/19 00:12:01
Done.
|
| +; MIPS32-NEXT: jr ra |
| define i32 @test_returning32_arg2(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7) { |
| entry: |
| @@ -53,6 +67,9 @@ entry: |
| ; ARM32-LABEL: test_returning32_arg2 |
| ; ARM32-NEXT: mov r0, r2 |
| ; ARM32-NEXT: bx lr |
| +; MIPS32-LABEL: <test_returning32_arg2> |
| +; MIPS32: move v0,a2 |
| +; MIPS32-NEXT: jr ra |
| define i32 @test_returning32_arg3(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4, i32 %arg5, i32 %arg6, i32 %arg7) { |
| @@ -102,6 +119,10 @@ entry: |
| ; CHECK: ret |
| ; ARM32-LABEL: test_returning64_arg0 |
| ; ARM32-NEXT: bx lr |
| +; MIPS32-LABEL: <test_returning64_arg0> |
| +; MIPS32-NEXT: move v0,a0 |
| +; MIPS32-NEXT: move v1,a1 |
| + |
| define i64 @test_returning64_arg1(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) { |
| entry: |
| @@ -115,6 +136,9 @@ entry: |
| ; ARM32-NEXT: mov r0, r2 |
| ; ARM32-NEXT: mov r1, r3 |
| ; ARM32-NEXT: bx lr |
| +; MIPS32-LABEL: <test_returning64_arg1> |
| +; MIPS32-NEXT: move v0,a2 |
| +; MIPS32-NEXT: move v1,a3 |
| define i64 @test_returning64_arg2(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3) { |
| entry: |