Fixes LDR and STR instructions. Two types of mistakes were being made.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 2484 matching lines @@
 void TargetARM32::lowerFcmp(const InstFcmp *Instr) {
   Variable *Dest = Instr->getDest();
   if (isVectorType(Dest->getType())) {
     Variable *T = makeReg(Dest->getType());
     Context.insert(InstFakeDef::create(Func, T));
     _mov(Dest, T);
     UnimplementedError(Func->getContext()->getFlags());
     return;
   }
 
-  Variable *T = makeReg(IceType_i32);
+  Variable *T = makeReg(IceType_i1);
   Operand *_1 = Ctx->getConstantInt32(1);
   Operand *_0 = Ctx->getConstantZero(IceType_i32);
 
   CondARM32::Cond CondIfTrue0, CondIfTrue1, CondIfFalse;
   lowerFcmpCond(Instr, &CondIfTrue0, &CondIfTrue1, &CondIfFalse);
 
   bool RedefineT = false;
   if (CondIfFalse != CondARM32::kNone) {
     assert(!RedefineT);
     _mov(T, _0, CondIfFalse);
@@ skipping 145 matching lines @@
   if (isVectorType(Dest->getType())) {
     Variable *T = makeReg(Dest->getType());
     Context.insert(InstFakeDef::create(Func, T));
     _mov(Dest, T);
     UnimplementedError(Func->getContext()->getFlags());
     return;
   }
 
   Constant *_0 = Ctx->getConstantZero(IceType_i32);
   Constant *_1 = Ctx->getConstantInt32(1);
-  Variable *T = makeReg(IceType_i32);
+  Variable *T = makeReg(IceType_i1);
 
   CondARM32::Cond CondIfTrue, CondIfFalse;
   lowerIcmpCond(Inst, &CondIfTrue, &CondIfFalse);
 
   _mov(T, _0, CondIfFalse);
   _mov_redefined(T, _1, CondIfTrue);
   _mov(Dest, T);
 
   return;
 }
@@ skipping 1584 matching lines @@
   // Technically R9 is used for TLS with Sandboxing, and we reserve it.
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 llvm::SmallBitVector TargetARM32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 llvm::SmallBitVector TargetARM32::ScratchRegs;
 
 } // end of namespace Ice