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| 1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 515 // Encodable in one load/store instruction. | 515 // Encodable in one load/store instruction. |
| 516 LoadStore(rt, addr, op); | 516 LoadStore(rt, addr, op); |
| 517 } | 517 } |
| 518 } | 518 } |
| 519 | 519 |
| 520 | 520 |
| 521 // Pseudo-instructions. | 521 // Pseudo-instructions. |
| 522 | 522 |
| 523 | 523 |
| 524 void MacroAssembler::Abs(const Register& rd, const Register& rm, | 524 void MacroAssembler::Abs(const Register& rd, const Register& rm, |
| 525 Label * is_not_representable, | 525 Label* is_not_representable, |
| 526 Label * is_representable) { | 526 Label* is_representable) { |
| 527 ASSERT(allow_macro_instructions_); | 527 ASSERT(allow_macro_instructions_); |
| 528 ASSERT(AreSameSizeAndType(rd, rm)); | 528 ASSERT(AreSameSizeAndType(rd, rm)); |
| 529 | 529 |
| 530 Cmp(rm, 1); | 530 Cmp(rm, 1); |
| 531 Cneg(rd, rm, lt); | 531 Cneg(rd, rm, lt); |
| 532 | 532 |
| 533 // If the comparison set the v flag, the input was the smallest value | 533 // If the comparison sets the v flag, the input was the smallest value |
| 534 // representable by rm, and the mathematical result of abs(rm) is not | 534 // representable by rm, and the mathematical result of abs(rm) is not |
| 535 // representable using two's complement. | 535 // representable using two's complement. |
| 536 if ((is_not_representable != NULL) && (is_representable != NULL)) { | 536 if ((is_not_representable != NULL) && (is_representable != NULL)) { |
| 537 B(is_not_representable, vs); | 537 B(is_not_representable, vs); |
| 538 B(is_representable); | 538 B(is_representable); |
| 539 } else if (is_not_representable != NULL) { | 539 } else if (is_not_representable != NULL) { |
| 540 B(is_not_representable, vs); | 540 B(is_not_representable, vs); |
| 541 } else if (is_representable != NULL) { | 541 } else if (is_representable != NULL) { |
| 542 B(is_representable, vc); | 542 B(is_representable, vc); |
| 543 } | 543 } |
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| 1118 // Get the code object and state. Clear the context and frame pointer (0 was | 1118 // Get the code object and state. Clear the context and frame pointer (0 was |
| 1119 // saved in the handler). | 1119 // saved in the handler). |
| 1120 Register object = scratch1; | 1120 Register object = scratch1; |
| 1121 Register state = scratch2; | 1121 Register state = scratch2; |
| 1122 Pop(object, state, cp, fp); | 1122 Pop(object, state, cp, fp); |
| 1123 | 1123 |
| 1124 JumpToHandlerEntry(value, object, state, scratch3, scratch4); | 1124 JumpToHandlerEntry(value, object, state, scratch3, scratch4); |
| 1125 } | 1125 } |
| 1126 | 1126 |
| 1127 | 1127 |
| 1128 void MacroAssembler::SmiAbs(Register smi, Register scratch, Label *slow) { | 1128 void MacroAssembler::SmiAbs(const Register& smi, Label* slow) { |
| 1129 // TODO(all): There is another possible implementation of this function | 1129 ASSERT(smi.Is64Bits()); |
| 1130 // which would consist of: | 1130 Abs(smi, smi, slow); |
| 1131 // * Comparing the smi with 0. | |
| 1132 // * Performing a conditional negate (cneg). | |
| 1133 // * Testing if the result is still negative. | |
| 1134 // | |
| 1135 // This other implementation uses 1 more instruction but uses one of the new | |
| 1136 // A64 conditional instruction and doesn't use shifted registers. | |
| 1137 // | |
| 1138 // This two versions should be profiled on real hardware as we have no idea | |
| 1139 // which one will be the fastest. | |
| 1140 ASSERT(!AreAliased(smi, scratch)); | |
| 1141 | |
| 1142 STATIC_ASSERT(kSmiTag == 0); | |
| 1143 STATIC_ASSERT(kSmiShift == 32); | |
| 1144 | |
| 1145 // Do bitwise not or do nothing depending on the sign of the argument. | |
| 1146 __ Eor(scratch, smi, Operand(smi, ASR, kXRegSize - 1)); | |
| 1147 // Add 1 or do nothing depending on the sign of the argument. | |
| 1148 __ Adds(smi, scratch, Operand(smi, LSR, kXRegSize - 1)); | |
| 1149 | |
| 1150 // If the result is still negative, go to the slow case. | |
| 1151 // This only happens for the most negative smi. | |
| 1152 __ B(mi, slow); | |
| 1153 } | 1131 } |
| 1154 | 1132 |
| 1155 | 1133 |
| 1156 void MacroAssembler::AssertSmi(Register object, BailoutReason reason) { | 1134 void MacroAssembler::AssertSmi(Register object, BailoutReason reason) { |
| 1157 if (emit_debug_code()) { | 1135 if (emit_debug_code()) { |
| 1158 STATIC_ASSERT(kSmiTag == 0); | 1136 STATIC_ASSERT(kSmiTag == 0); |
| 1159 Tst(object, kSmiTagMask); | 1137 Tst(object, kSmiTagMask); |
| 1160 Check(eq, reason); | 1138 Check(eq, reason); |
| 1161 } | 1139 } |
| 1162 } | 1140 } |
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| 4712 } | 4690 } |
| 4713 } | 4691 } |
| 4714 | 4692 |
| 4715 | 4693 |
| 4716 #undef __ | 4694 #undef __ |
| 4717 | 4695 |
| 4718 | 4696 |
| 4719 } } // namespace v8::internal | 4697 } } // namespace v8::internal |
| 4720 | 4698 |
| 4721 #endif // V8_TARGET_ARCH_A64 | 4699 #endif // V8_TARGET_ARCH_A64 |
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