Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(100)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: src/x64/assembler-x64.h

Issue 1415463004: [x64] Refactor AVX instructions declarations. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | no next file » | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/x64/assembler-x64.h
diff --git a/src/x64/assembler-x64.h b/src/x64/assembler-x64.h
index 63669ce700f5de49e5e2432554593a060a65e00b..d20ab7bb2d8f6f545e734b05c990d76a7e890cb4 100644
--- a/src/x64/assembler-x64.h
+++ b/src/x64/assembler-x64.h
@@ -1297,54 +1297,48 @@ class Assembler : public AssemblerBase {
void vmovsd(const Operand& dst, XMMRegister src) {
vsd(0x11, src, xmm0, dst);
}
- void vaddsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x58, dst, src1, src2);
- }
- void vaddsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x58, dst, src1, src2);
- }
- void vsubsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x5c, dst, src1, src2);
- }
- void vsubsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x5c, dst, src1, src2);
- }
- void vmulsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x59, dst, src1, src2);
- }
- void vmulsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x59, dst, src1, src2);
- }
- void vdivsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x5e, dst, src1, src2);
- }
- void vdivsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x5e, dst, src1, src2);
- }
- void vmaxsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x5f, dst, src1, src2);
- }
- void vmaxsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x5f, dst, src1, src2);
- }
- void vminsd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x5d, dst, src1, src2);
- }
- void vminsd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x5d, dst, src1, src2);
- }
+
+#define AVX_SP_3(instr, opcode) \
+ AVX_S_3(instr, opcode) \
+ AVX_P_3(instr, opcode)
+
+#define AVX_S_3(instr, opcode) \
+ AVX_3(instr##ss, opcode, vss) \
+ AVX_3(instr##sd, opcode, vsd)
+
+#define AVX_P_3(instr, opcode) \
+ AVX_3(instr##ps, opcode, vps) \
+ AVX_3(instr##pd, opcode, vpd)
+
+#define AVX_3(instr, opcode, impl) \
+ void instr(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
+ impl(opcode, dst, src1, src2); \
+ } \
+ void instr(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
+ impl(opcode, dst, src1, src2); \
+ }
+
+ AVX_SP_3(vadd, 0x58);
+ AVX_SP_3(vsub, 0x5c);
+ AVX_SP_3(vmul, 0x59);
+ AVX_SP_3(vdiv, 0x5e);
+ AVX_SP_3(vmin, 0x5d);
+ AVX_SP_3(vmax, 0x5f);
+ AVX_P_3(vand, 0x54);
+ AVX_P_3(vxor, 0x57);
+ AVX_3(vcvtsd2ss, 0x5a, vsd);
+
+#undef AVX_3
+#undef AVX_S_3
+#undef AVX_P_3
+#undef AVX_SP_3
+
void vcvtss2sd(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
vsd(0x5a, dst, src1, src2, kF3, k0F, kWIG);
}
void vcvtss2sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
vsd(0x5a, dst, src1, src2, kF3, k0F, kWIG);
}
- void vcvtsd2ss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vsd(0x5a, dst, src1, src2);
- }
- void vcvtsd2ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vsd(0x5a, dst, src1, src2);
- }
void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, Register src2) {
XMMRegister isrc2 = {src2.code()};
vsd(0x2a, dst, src1, isrc2, kF2, k0F, kW0);
@@ -1386,42 +1380,6 @@ class Assembler : public AssemblerBase {
void vsd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2,
SIMDPrefix pp, LeadingOpcode m, VexW w);
- void vaddss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x58, dst, src1, src2);
- }
- void vaddss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x58, dst, src1, src2);
- }
- void vsubss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x5c, dst, src1, src2);
- }
- void vsubss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x5c, dst, src1, src2);
- }
- void vmulss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x59, dst, src1, src2);
- }
- void vmulss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x59, dst, src1, src2);
- }
- void vdivss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x5e, dst, src1, src2);
- }
- void vdivss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x5e, dst, src1, src2);
- }
- void vmaxss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x5f, dst, src1, src2);
- }
- void vmaxss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x5f, dst, src1, src2);
- }
- void vminss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
- vss(0x5d, dst, src1, src2);
- }
- void vminss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
- vss(0x5d, dst, src1, src2);
- }
void vmovss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
vss(0x10, dst, src1, src2);
}
@@ -1436,6 +1394,18 @@ class Assembler : public AssemblerBase {
void vss(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
void vss(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
+ void vmovaps(XMMRegister dst, XMMRegister src) { vps(0x28, dst, xmm0, src); }
+ void vmovapd(XMMRegister dst, XMMRegister src) { vpd(0x28, dst, xmm0, src); }
+ void vmovmskpd(Register dst, XMMRegister src) {
+ XMMRegister idst = {dst.code()};
+ vpd(0x50, idst, xmm0, src);
+ }
+
+ void vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
+ void vps(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
+ void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
+ void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
+
// BMI instruction
void andnq(Register dst, Register src1, Register src2) {
bmi1q(0xf2, dst, src1, src2);
@@ -1613,37 +1583,6 @@ class Assembler : public AssemblerBase {
void rorxl(Register dst, Register src, byte imm8);
void rorxl(Register dst, const Operand& src, byte imm8);
- void vmovaps(XMMRegister dst, XMMRegister src) { vps(0x28, dst, xmm0, src); }
- void vmovapd(XMMRegister dst, XMMRegister src) { vpd(0x28, dst, xmm0, src); }
- void vmovmskpd(Register dst, XMMRegister src) {
- XMMRegister idst = {dst.code()};
- vpd(0x50, idst, xmm0, src);
- }
-
-#define PACKED_OP_LIST(V) \
- V(and, 0x54) \
- V(xor, 0x57)
-
-#define AVX_PACKED_OP_DECLARE(name, opcode) \
- void v##name##ps(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
- vps(opcode, dst, src1, src2); \
- } \
- void v##name##ps(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
- vps(opcode, dst, src1, src2); \
- } \
- void v##name##pd(XMMRegister dst, XMMRegister src1, XMMRegister src2) { \
- vpd(opcode, dst, src1, src2); \
- } \
- void v##name##pd(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
- vpd(opcode, dst, src1, src2); \
- }
-
- PACKED_OP_LIST(AVX_PACKED_OP_DECLARE);
- void vps(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
- void vps(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
- void vpd(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
- void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
-
// Debugging
void Print();
« no previous file with comments | « no previous file | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698