| OLD | NEW |
| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_XXX. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_XXX. |
| 6 | 6 |
| 7 #include "vm/flow_graph_compiler.h" | 7 #include "vm/flow_graph_compiler.h" |
| 8 | 8 |
| 9 #include "vm/cha.h" | 9 #include "vm/cha.h" |
| 10 #include "vm/dart_entry.h" | 10 #include "vm/dart_entry.h" |
| (...skipping 711 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 722 | 722 |
| 723 | 723 |
| 724 void FlowGraphCompiler::AllocateRegistersLocally(Instruction* instr) { | 724 void FlowGraphCompiler::AllocateRegistersLocally(Instruction* instr) { |
| 725 ASSERT(!is_optimizing()); | 725 ASSERT(!is_optimizing()); |
| 726 | 726 |
| 727 LocationSummary* locs = instr->locs(); | 727 LocationSummary* locs = instr->locs(); |
| 728 | 728 |
| 729 bool blocked_registers[kNumberOfCpuRegisters]; | 729 bool blocked_registers[kNumberOfCpuRegisters]; |
| 730 | 730 |
| 731 // Mark all available registers free. | 731 // Mark all available registers free. |
| 732 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) { | 732 for (intptr_t i = 0; i < kNumberOfCpuRegisters; i++) { |
| 733 blocked_registers[i] = true; | |
| 734 } | |
| 735 for (intptr_t i = kFirstFreeCpuRegister; i <= kLastFreeCpuRegister; i++) { | |
| 736 blocked_registers[i] = false; | 733 blocked_registers[i] = false; |
| 737 } | 734 } |
| 738 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) { | |
| 739 blocked_registers[i] = true; | |
| 740 } | |
| 741 | 735 |
| 742 // Mark all fixed input, temp and output registers as used. | 736 // Mark all fixed input, temp and output registers as used. |
| 743 for (intptr_t i = 0; i < locs->input_count(); i++) { | 737 for (intptr_t i = 0; i < locs->input_count(); i++) { |
| 744 Location loc = locs->in(i); | 738 Location loc = locs->in(i); |
| 745 if (loc.IsRegister()) { | 739 if (loc.IsRegister()) { |
| 740 // Check that a register is not specified twice in the summary. |
| 746 ASSERT(!blocked_registers[loc.reg()]); | 741 ASSERT(!blocked_registers[loc.reg()]); |
| 747 blocked_registers[loc.reg()] = true; | 742 blocked_registers[loc.reg()] = true; |
| 748 } | 743 } |
| 749 } | 744 } |
| 750 | 745 |
| 751 for (intptr_t i = 0; i < locs->temp_count(); i++) { | 746 for (intptr_t i = 0; i < locs->temp_count(); i++) { |
| 752 Location loc = locs->temp(i); | 747 Location loc = locs->temp(i); |
| 753 if (loc.IsRegister()) { | 748 if (loc.IsRegister()) { |
| 749 // Check that a register is not specified twice in the summary. |
| 754 ASSERT(!blocked_registers[loc.reg()]); | 750 ASSERT(!blocked_registers[loc.reg()]); |
| 755 blocked_registers[loc.reg()] = true; | 751 blocked_registers[loc.reg()] = true; |
| 756 } | 752 } |
| 757 } | 753 } |
| 758 | 754 |
| 759 if (locs->out().IsRegister()) { | 755 if (locs->out().IsRegister()) { |
| 760 // Fixed output registers are allowed to overlap with | 756 // Fixed output registers are allowed to overlap with |
| 761 // temps and inputs. | 757 // temps and inputs. |
| 762 blocked_registers[locs->out().reg()] = true; | 758 blocked_registers[locs->out().reg()] = true; |
| 763 } | 759 } |
| 764 | 760 |
| 765 // Do not allocate known registers. | 761 // Do not allocate known registers. |
| 766 blocked_registers[CTX] = true; | 762 blocked_registers[CTX] = true; |
| 767 blocked_registers[SPREG] = true; | 763 blocked_registers[SPREG] = true; |
| 768 blocked_registers[FPREG] = true; | 764 blocked_registers[FPREG] = true; |
| 769 if (TMP != kNoRegister) { | 765 if (TMP != kNoRegister) { |
| 770 blocked_registers[TMP] = true; | 766 blocked_registers[TMP] = true; |
| 771 } | 767 } |
| 772 if (PP != kNoRegister) { | 768 if (PP != kNoRegister) { |
| 773 blocked_registers[PP] = true; | 769 blocked_registers[PP] = true; |
| 774 } | 770 } |
| 775 | 771 |
| 772 // Block all non-free registers. |
| 773 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) { |
| 774 blocked_registers[i] = true; |
| 775 } |
| 776 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) { |
| 777 blocked_registers[i] = true; |
| 778 } |
| 779 |
| 776 // Allocate all unallocated input locations. | 780 // Allocate all unallocated input locations. |
| 777 const bool should_pop = !instr->IsPushArgument(); | 781 const bool should_pop = !instr->IsPushArgument(); |
| 778 for (intptr_t i = locs->input_count() - 1; i >= 0; i--) { | 782 for (intptr_t i = locs->input_count() - 1; i >= 0; i--) { |
| 779 Location loc = locs->in(i); | 783 Location loc = locs->in(i); |
| 780 Register reg = kNoRegister; | 784 Register reg = kNoRegister; |
| 781 if (loc.IsRegister()) { | 785 if (loc.IsRegister()) { |
| 782 reg = loc.reg(); | 786 reg = loc.reg(); |
| 783 } else if (loc.IsUnallocated() || loc.IsConstant()) { | 787 } else if (loc.IsUnallocated() || loc.IsConstant()) { |
| 784 ASSERT(loc.IsConstant() || | 788 ASSERT(loc.IsConstant() || |
| 785 ((loc.policy() == Location::kRequiresRegister) || | 789 ((loc.policy() == Location::kRequiresRegister) || |
| (...skipping 338 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1124 if (i != largest_ix) { | 1128 if (i != largest_ix) { |
| 1125 // Swap. | 1129 // Swap. |
| 1126 CidTarget temp = (*sorted)[i]; | 1130 CidTarget temp = (*sorted)[i]; |
| 1127 (*sorted)[i] = (*sorted)[largest_ix]; | 1131 (*sorted)[i] = (*sorted)[largest_ix]; |
| 1128 (*sorted)[largest_ix] = temp; | 1132 (*sorted)[largest_ix] = temp; |
| 1129 } | 1133 } |
| 1130 } | 1134 } |
| 1131 } | 1135 } |
| 1132 | 1136 |
| 1133 } // namespace dart | 1137 } // namespace dart |
| OLD | NEW |