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Unified Diff: tests_lit/llvm2ice_tests/fp.cmp.ll

Issue 1414883007: Subzero. ARM32. Implements bool folding. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addresses comments && pulls. Created 5 years, 1 month ago
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Index: tests_lit/llvm2ice_tests/fp.cmp.ll
diff --git a/tests_lit/llvm2ice_tests/fp.cmp.ll b/tests_lit/llvm2ice_tests/fp.cmp.ll
index d41017a3ea2be147e0191b8d3ebabedde749ca5c..427a82c059901b15784eaaa964316d8836b49e29 100644
--- a/tests_lit/llvm2ice_tests/fp.cmp.ll
+++ b/tests_lit/llvm2ice_tests/fp.cmp.ll
@@ -9,16 +9,16 @@
; RUN: -allow-externally-defined-symbols | FileCheck %s
; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
-; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \
+; RUN: --target arm32 -i %s --args -O2 \
; RUN: -allow-externally-defined-symbols \
; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \
-; RUN: --check-prefix=ARM32
+; RUN: --check-prefix=ARM32 --check-prefix=ARM32-O2
; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
-; RUN: --target arm32 -i %s --args -Om1 --skip-unimplemented \
+; RUN: --target arm32 -i %s --args -Om1 \
; RUN: -allow-externally-defined-symbols \
; RUN: | %if --need=allow_dump --need=target_ARM32 --command FileCheck %s \
-; RUN: --check-prefix=ARM32
+; RUN: --check-prefix=ARM32 --check-prefix=ARM32-OM1
define internal void @fcmpEq(float %a, float %b, double %c, double %d) {
entry:
@@ -51,13 +51,16 @@ if.end3: ; preds = %if.then2, %if.end
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpEq
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: moveq [[R0]], #1
+; ARM32-OM1: movne [[R0:r[0-9]+]], #0
+; ARM32-OM1: moveq [[R0]], #1
+; ARM32-O2: bne
+; ARM32: bl func
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: moveq [[R1]], #1
+; ARM32-OM1: movne [[R1:r[0-9]+]], #0
+; ARM32-OM1: moveq [[R1]], #1
+; ARM32-O2: bne
declare void @func()
@@ -92,13 +95,15 @@ if.end3: ; preds = %if.then2, %if.end
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpNe
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movne [[R0]], #1
+; ARM32-OM1: moveq [[R0:r[0-9]+]], #0
+; ARM32-OM1: movne [[R0]], #1
+; ARM32-O2: beq
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movne [[R1]], #1
+; ARM32-OM1: moveq [[R1:r[0-9]+]], #0
+; ARM32-OM1: movne [[R1]], #1
+; ARM32-O2: beq
define internal void @fcmpGt(float %a, float %b, double %c, double %d) {
entry:
@@ -129,13 +134,15 @@ if.end3: ; preds = %if.then2, %if.end
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpGt
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movgt [[R0]], #1
+; ARM32-OM1: movle [[R0:r[0-9]+]], #0
+; ARM32-OM1: movgt [[R0]], #1
+; ARM32-O2: ble
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movgt [[R1]], #1
+; ARM32-OM1: movle [[R1:r[0-9]+]], #0
+; ARM32-OM1: movgt [[R1]], #1
+; ARM32-O2: ble
define internal void @fcmpGe(float %a, float %b, double %c, double %d) {
entry:
@@ -166,13 +173,15 @@ if.end3: ; preds = %if.end, %if.then2
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpGe
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movlt [[R0]], #1
+; ARM32-OM1: movge [[R0:r[0-9]+]], #0
+; ARM32-OM1: movlt [[R0]], #1
+; ARM32-O2: blt
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movlt [[R1]], #1
+; ARM32-OM1: movge [[R1:r[0-9]+]], #0
+; ARM32-OM1: movlt [[R1]], #1
+; ARM32-O2: blt
define internal void @fcmpLt(float %a, float %b, double %c, double %d) {
entry:
@@ -203,13 +212,15 @@ if.end3: ; preds = %if.then2, %if.end
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpLt
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movmi [[R0]], #1
+; ARM32-OM1: movpl [[R0:r[0-9]+]], #0
+; ARM32-OM1: movmi [[R0]], #1
+; ARM32-O2: bpl
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movmi [[R1]], #1
+; ARM32-OM1: movpl [[R1:r[0-9]+]], #0
+; ARM32-OM1: movmi [[R1]], #1
+; ARM32-O2: bpl
define internal void @fcmpLe(float %a, float %b, double %c, double %d) {
entry:
@@ -240,13 +251,15 @@ if.end3: ; preds = %if.end, %if.then2
; CHECK: call {{.*}} R_{{.*}} func
; ARM32-LABEL: fcmpLe
; ARM32: vcmp.f32
-; ARM32: mov [[R0:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movhi [[R0]], #1
+; ARM32-OM1: movls [[R0:r[0-9]+]], #0
+; ARM32-OM1: movhi [[R0]], #1
+; ARM32-O2: bhi
; ARM32: vcmp.f64
-; ARM32: mov [[R1:r[0-9]+]], #0
; ARM32: vmrs
-; ARM32: movhi [[R1]], #1
+; ARM32-OM1: movls [[R1:r[0-9]+]], #0
+; ARM32-OM1: movhi [[R1]], #1
+; ARM32-O2: bhi
define internal i32 @fcmpFalseFloat(float %a, float %b) {
entry:
@@ -257,7 +270,6 @@ entry:
; CHECK-LABEL: fcmpFalseFloat
; CHECK: mov {{.*}},0x0
; ARM32-LABEL: fcmpFalseFloat
-; ARM32: vcmp.f32
; ARM32: mov [[R:r[0-9]+]], #0
define internal i32 @fcmpFalseDouble(double %a, double %b) {
@@ -269,7 +281,6 @@ entry:
; CHECK-LABEL: fcmpFalseDouble
; CHECK: mov {{.*}},0x0
; ARM32-LABEL: fcmpFalseDouble
-; ARM32: vcmp.f64
; ARM32: mov [[R:r[0-9]+]], #0
define internal i32 @fcmpOeqFloat(float %a, float %b) {
@@ -284,8 +295,8 @@ entry:
; CHECK: jp
; ARM32-LABEL: fcmpOeqFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movne [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
define internal i32 @fcmpOeqDouble(double %a, double %b) {
@@ -300,8 +311,8 @@ entry:
; CHECK: jp
; ARM32-LABEL: fcmpOeqDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movne [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
define internal i32 @fcmpOgtFloat(float %a, float %b) {
@@ -315,8 +326,8 @@ entry:
; CHECK: seta
; ARM32-LABEL: fcmpOgtFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movle [[R:r[0-9]+]], #0
; ARM32: movgt [[R]], #1
define internal i32 @fcmpOgtDouble(double %a, double %b) {
@@ -330,8 +341,8 @@ entry:
; CHECK: seta
; ARM32-LABEL: fcmpOgtDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movle [[R:r[0-9]+]], #0
; ARM32: movgt [[R]], #1
define internal i32 @fcmpOgeFloat(float %a, float %b) {
@@ -345,8 +356,8 @@ entry:
; CHECK: setae
; ARM32-LABEL: fcmpOgeFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movlt [[R:r[0-9]+]], #0
; ARM32: movge [[R]], #1
define internal i32 @fcmpOgeDouble(double %a, double %b) {
@@ -360,8 +371,8 @@ entry:
; CHECK: setae
; ARM32-LABEL: fcmpOgeDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movlt [[R:r[0-9]+]], #0
; ARM32: movge [[R]], #1
define internal i32 @fcmpOltFloat(float %a, float %b) {
@@ -375,8 +386,8 @@ entry:
; CHECK: seta
; ARM32-LABEL: fcmpOltFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movpl [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
define internal i32 @fcmpOltDouble(double %a, double %b) {
@@ -390,8 +401,8 @@ entry:
; CHECK: seta
; ARM32-LABEL: fcmpOltDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movpl [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
define internal i32 @fcmpOleFloat(float %a, float %b) {
@@ -405,8 +416,8 @@ entry:
; CHECK: setae
; ARM32-LABEL: fcmpOleFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movhi [[R:r[0-9]+]], #0
; ARM32: movls [[R]], #1
define internal i32 @fcmpOleDouble(double %a, double %b) {
@@ -420,8 +431,8 @@ entry:
; CHECK: setae
; ARM32-LABEL: fcmpOleDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movhi [[R:r[0-9]+]], #0
; ARM32: movls [[R]], #1
define internal i32 @fcmpOneFloat(float %a, float %b) {
@@ -435,8 +446,8 @@ entry:
; CHECK: setne
; ARM32-LABEL: fcmpOneFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
; ARM32: movgt [[R]], #1
@@ -451,8 +462,8 @@ entry:
; CHECK: setne
; ARM32-LABEL: fcmpOneDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: movmi [[R]], #1
; ARM32: movgt [[R]], #1
@@ -467,8 +478,8 @@ entry:
; CHECK: setnp
; ARM32-LABEL: fcmpOrdFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movvs [[R:r[0-9]+]], #0
; ARM32: movvc [[R]], #1
define internal i32 @fcmpOrdDouble(double %a, double %b) {
@@ -482,8 +493,8 @@ entry:
; CHECK: setnp
; ARM32-LABEL: fcmpOrdDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movvs [[R:r[0-9]+]], #0
; ARM32: movvc [[R]], #1
define internal i32 @fcmpUeqFloat(float %a, float %b) {
@@ -497,8 +508,8 @@ entry:
; CHECK: sete
; ARM32-LABEL: fcmpUeqFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
; ARM32: movvs [[R]], #1
@@ -513,8 +524,8 @@ entry:
; CHECK: sete
; ARM32-LABEL: fcmpUeqDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: moveq [[R]], #1
; ARM32: movvs [[R]], #1
@@ -529,8 +540,8 @@ entry:
; CHECK: setb
; ARM32-LABEL: fcmpUgtFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movls [[R:r[0-9]+]], #0
; ARM32: movhi [[R]], #1
define internal i32 @fcmpUgtDouble(double %a, double %b) {
@@ -544,8 +555,8 @@ entry:
; CHECK: setb
; ARM32-LABEL: fcmpUgtDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movls [[R:r[0-9]+]], #0
; ARM32: movhi [[R]], #1
define internal i32 @fcmpUgeFloat(float %a, float %b) {
@@ -559,8 +570,8 @@ entry:
; CHECK: setbe
; ARM32-LABEL: fcmpUgeFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movmi [[R:r[0-9]+]], #0
; ARM32: movpl [[R]], #1
define internal i32 @fcmpUgeDouble(double %a, double %b) {
@@ -574,8 +585,8 @@ entry:
; CHECK: setbe
; ARM32-LABEL: fcmpUgeDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movmi [[R:r[0-9]+]], #0
; ARM32: movpl [[R]], #1
define internal i32 @fcmpUltFloat(float %a, float %b) {
@@ -589,8 +600,8 @@ entry:
; CHECK: setb
; ARM32-LABEL: fcmpUltFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movge [[R:r[0-9]+]], #0
; ARM32: movlt [[R]], #1
define internal i32 @fcmpUltDouble(double %a, double %b) {
@@ -604,8 +615,8 @@ entry:
; CHECK: setb
; ARM32-LABEL: fcmpUltDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movge [[R:r[0-9]+]], #0
; ARM32: movlt [[R]], #1
define internal i32 @fcmpUleFloat(float %a, float %b) {
@@ -619,8 +630,8 @@ entry:
; CHECK: setbe
; ARM32-LABEL: fcmpUleFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movgt [[R:r[0-9]+]], #0
; ARM32: movle [[R]], #1
define internal i32 @fcmpUleDouble(double %a, double %b) {
@@ -634,8 +645,8 @@ entry:
; CHECK: setbe
; ARM32-LABEL: fcmpUleDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movgt [[R:r[0-9]+]], #0
; ARM32: movle [[R]], #1
define internal i32 @fcmpUneFloat(float %a, float %b) {
@@ -650,8 +661,8 @@ entry:
; CHECK: jp
; ARM32-LABEL: fcmpUneFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: moveq [[R:r[0-9]+]], #0
; ARM32: movne [[R]], #1
define internal i32 @fcmpUneDouble(double %a, double %b) {
@@ -666,8 +677,8 @@ entry:
; CHECK: jp
; ARM32-LABEL: fcmpUneDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: moveq [[R:r[0-9]+]], #0
; ARM32: movne [[R]], #1
define internal i32 @fcmpUnoFloat(float %a, float %b) {
@@ -681,8 +692,8 @@ entry:
; CHECK: setp
; ARM32-LABEL: fcmpUnoFloat
; ARM32: vcmp.f32
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movvc [[R:r[0-9]+]], #0
; ARM32: movvs [[R]], #1
define internal i32 @fcmpUnoDouble(double %a, double %b) {
@@ -696,8 +707,8 @@ entry:
; CHECK: setp
; ARM32-LABEL: fcmpUnoDouble
; ARM32: vcmp.f64
-; ARM32: mov [[R:r[0-9]+]], #0
; ARM32: vmrs
+; ARM32: movvc [[R:r[0-9]+]], #0
; ARM32: movvs [[R]], #1
define internal i32 @fcmpTrueFloat(float %a, float %b) {
@@ -709,8 +720,7 @@ entry:
; CHECK-LABEL: fcmpTrueFloat
; CHECK: mov {{.*}},0x1
; ARM32-LABEL: fcmpTrueFloat
-; ARM32: vcmp.f32
-; ARM32: mov [[R]], #1
+; ARM32: mov {{r[0-9]+}}, #1
define internal i32 @fcmpTrueDouble(double %a, double %b) {
entry:
@@ -721,8 +731,7 @@ entry:
; CHECK-LABEL: fcmpTrueDouble
; CHECK: mov {{.*}},0x1
; ARM32-LABEL: fcmpTrueDouble
-; ARM32: vcmp.f64
-; ARM32: mov [[R]], #1
+; ARM32: mov {{r[0-9]+}}, #1
define internal float @selectFloatVarVar(float %a, float %b) {
entry:
@@ -736,7 +745,8 @@ entry:
; CHECK: fld
; ARM32-LABEL: selectFloatVarVar
; ARM32: vcmp.f32
-; ARM32: vmovne.f32 s{{[0-9]+}}
+; ARM32-OM1: vmovne.f32 s{{[0-9]+}}
+; ARM32-O2: vmovmi.f32 s{{[0-9]+}}
; ARM32: bx
define internal double @selectDoubleVarVar(double %a, double %b) {
@@ -751,5 +761,6 @@ entry:
; CHECK: fld
; ARM32-LABEL: selectDoubleVarVar
; ARM32: vcmp.f64
-; ARM32: vmovne.f64 d{{[0-9]+}}
+; ARM32-OM1: vmovne.f64 d{{[0-9]+}}
+; ARM32-O2: vmovmi.f64 d{{[0-9]+}}
; ARM32: bx
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