Add CMP(register) and CMP(Immediate) to ARM integerated assembler.

src/DartARM32/assembler_arm.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
 // Please update the (git) revision if we merge changes from Dart.
 // https://code.google.com/p/dart/wiki/GettingTheSource
 
 #ifndef VM_ASSEMBLER_ARM_H_
 #define VM_ASSEMBLER_ARM_H_
@@ skipping 114 matching lines @@
   Operand(const Operand& other)
       : ValueObject(), type_(other.type_), encoding_(other.encoding_) { }
 
   // Data-processing operands - Assignment operator.
   Operand& operator=(const Operand& other) {
     type_ = other.type_;
     encoding_ = other.encoding_;
     return *this;
   }
 
+#if 0
+  // Moved to encodeRotatedImm8() in IceAssemblerARM32.cpp
   // Data-processing operands - Immediate.
   explicit Operand(uint32_t immediate) {
     ASSERT(immediate < (1 << kImmed8Bits));
     type_ = 1;
     encoding_ = immediate;
   }
+#endif
 
 #if 0
-  // Moved to decodeOperand() in IceAssemblerARM32.cpp
+  // Moved to decodeOperand() and encodeRotatedImm8() in IceAssemblerARM32.cpp
   // Data-processing operands - Rotated immediate.
   Operand(uint32_t rotate, uint32_t immed8) {
     ASSERT((rotate < (1 << kRotateBits)) && (immed8 < (1 << kImmed8Bits)));
     type_ = 1;
     encoding_ = (rotate << kRotateShift) | (immed8 << kImmed8Shift);
   }
 
   // Moved to decodeOperand() in IceAssemblerARM32.cpp
   // Data-processing operands - Register.
   explicit Operand(Register rm) {
@@ skipping 13 matching lines @@
 #endif
 
   // Data-processing operands - Logical shift/rotate by register.
   Operand(Register rm, Shift shift, Register rs) {
     type_ = 0;
     encoding_ = static_cast<uint32_t>(rs) << kShiftRegisterShift |
                 static_cast<uint32_t>(shift) << kShiftShift | (1 << 4) |
                 static_cast<uint32_t>(rm);
   }
 
+#if 0
+  // Already defined as ARM32::OperandARM32FlexImm::canHoldImm().
   static bool CanHold(uint32_t immediate, Operand* o) {
     // Avoid the more expensive test for frequent small immediate values.
     if (immediate < (1 << kImmed8Bits)) {
       o->type_ = 1;
       o->encoding_ = (0 << kRotateShift) | (immediate << kImmed8Shift);
       return true;
     }
     // Note that immediate must be unsigned for the test to work correctly.
     for (int rot = 0; rot < 16; rot++) {
       uint32_t imm8 = (immediate << 2*rot) | (immediate >> (32 - 2*rot));
       if (imm8 < (1 << kImmed8Bits)) {
         o->type_ = 1;
         o->encoding_ = (rot << kRotateShift) | (imm8 << kImmed8Shift);
         return true;
       }
     }
     return false;
   }
+#endif
 
  private:
   bool is_valid() const { return (type_ == 0) || (type_ == 1); }
 
   uint32_t type() const {
     ASSERT(is_valid());
     return type_;
   }
 
   uint32_t encoding() const {
@@ skipping 266 matching lines @@
   void sbc(Register rd, Register rn, Operand o, Condition cond = AL);
 
   void sbcs(Register rd, Register rn, Operand o, Condition cond = AL);
 
   void rsc(Register rd, Register rn, Operand o, Condition cond = AL);
 
   void tst(Register rn, Operand o, Condition cond = AL);
 
   void teq(Register rn, Operand o, Condition cond = AL);
 
+#if 0
+  // Moved to ARM32::AssemblerARM32::cmp()
   void cmp(Register rn, Operand o, Condition cond = AL);
+#endif
 
   void cmn(Register rn, Operand o, Condition cond = AL);
 
 #if 0
   // Moved to ARM32::IceAssemblerARM32::orr().
   void orr(Register rd, Register rn, Operand o, Condition cond = AL);
   void orrs(Register rd, Register rn, Operand o, Condition cond = AL);
 
   // Moved to ARM32::IceAssemblerARM32::mov()
   void mov(Register rd, Operand o, Condition cond = AL);
@@ skipping 772 matching lines @@
                      Register new_value,
                      FieldContent old_content);
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM_H_