Lower a few basic MIPS binops for i{8,16,32,64}.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 300 matching lines @@
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Ctx->getStrEmit();
   const Type FrameSPTy = IceType_i32;
   if (Var->hasReg()) {
     Str << '$' << getRegName(Var->getRegNum(), Var->getType());
     return;
   } else {
     int32_t Offset = Var->getStackOffset();
     Str << Offset;
-    Str << "(" << getRegName(getFrameOrStackReg(), FrameSPTy);
+    Str << "($" << getRegName(getFrameOrStackReg(), FrameSPTy);
     Str << ")";
   }
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::lowerArguments() {
   VarList &Args = Func->getArgs();
   // We are only handling integer registers for now. The Mips o32 ABI is
   // somewhat complex but will be implemented in its totality through follow
   // on patches.
@@ skipping 178 matching lines @@
   // cases.
   NeedsStackAlignment = true;
   (void)Inst;
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) {
   Variable *Dest = Inst->getDest();
   Operand *Src0 = legalizeUndef(Inst->getSrc(0));
   Operand *Src1 = legalizeUndef(Inst->getSrc(1));
-  (void)Src0;
-  (void)Src1;
   if (Dest->getType() == IceType_i64) {
+    // TODO(reed kotler): fakedef needed for now until all cases are implemented
+    Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
+    Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+    Context.insert(InstFakeDef::create(Func, DestLo));
+    Context.insert(InstFakeDef::create(Func, DestHi));
     UnimplementedError(Func->getContext()->getFlags());
-  } else if (isVectorType(Dest->getType())) {
+    return;
+  }
+  if (isVectorType(Dest->getType())) {
+    Context.insert(InstFakeDef::create(Func, Dest));
     UnimplementedError(Func->getContext()->getFlags());
-  } else { // Dest->getType() is non-i64 scalar
-    switch (Inst->getOp()) {
-    case InstArithmetic::_num:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Add:
-      UnimplementedError(Func->getContext()->getFlags());
-      // Variable *T = makeReg(Dest->getType());
-      // _add(T, Src0, Src1);
-      // _mov(Dest, T);
-      return;
-    case InstArithmetic::And:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Or:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Xor:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Sub:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Mul:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Shl:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Lshr:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Ashr:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Udiv:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Sdiv:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Urem:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Srem:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Fadd:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Fsub:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Fmul:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Fdiv:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Frem:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    }
+    return;
   }
+  // Dest->getType() is non-i64 scalar
+  Variable *T = makeReg(Dest->getType());
+  Variable *Src0R = legalizeToReg(Src0);
+  Variable *Src1R = legalizeToReg(Src1);
+  switch (Inst->getOp()) {
+  case InstArithmetic::_num:
+    break;
+  case InstArithmetic::Add:
+    _add(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  case InstArithmetic::And:
+    _and(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  case InstArithmetic::Or:
+    _or(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  case InstArithmetic::Xor:
+    _xor(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  case InstArithmetic::Sub:
+    _sub(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  case InstArithmetic::Mul: {
+    _mul(T, Src0R, Src1R);
+    _mov(Dest, T);
+    return;
+  }
+  case InstArithmetic::Shl:
+    break;
+  case InstArithmetic::Lshr:
+    break;
+  case InstArithmetic::Ashr:
+    break;
+  case InstArithmetic::Udiv:
+    break;
+  case InstArithmetic::Sdiv:
+    break;
+  case InstArithmetic::Urem:
+    break;
+  case InstArithmetic::Srem:
+    break;
+  case InstArithmetic::Fadd:
+    break;
+  case InstArithmetic::Fsub:
+    break;
+  case InstArithmetic::Fmul:
+    break;
+  case InstArithmetic::Fdiv:
+    break;
+  case InstArithmetic::Frem:
+    break;
+  }
+  // TODO(reed kotler):
+  // fakedef and fakeuse needed for now until all cases are implemented
+  Context.insert(InstFakeUse::create(Func, Src0R));
+  Context.insert(InstFakeUse::create(Func, Src1R));
+  Context.insert(InstFakeDef::create(Func, Dest));
+  UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::lowerAssign(const InstAssign *Inst) {
   Variable *Dest = Inst->getDest();
   Operand *Src0 = Inst->getSrc(0);
   assert(Dest->getType() == Src0->getType());
   if (Dest->getType() == IceType_i64) {
     Src0 = legalizeUndef(Src0);
     Operand *Src0Lo = legalize(loOperand(Src0), Legal_Reg);
     Operand *Src0Hi = legalize(hiOperand(Src0), Legal_Reg);
@@ skipping 388 matching lines @@
 }
 
 Operand *TargetMIPS32::legalize(Operand *From, LegalMask Allowed,
                                 int32_t RegNum) {
   Type Ty = From->getType();
   // Assert that a physical register is allowed.  To date, all calls
   // to legalize() allow a physical register. Legal_Flex converts
   // registers to the right type OperandMIPS32FlexReg as needed.
   assert(Allowed & Legal_Reg);
   // Go through the various types of operands:
-  // OperandMIPS32Mem, OperandMIPS32Flex, Constant, and Variable.
+  // OperandMIPS32Mem, Constant, and Variable.
   // Given the above assertion, if type of operand is not legal
   // (e.g., OperandMIPS32Mem and !Legal_Mem), we can always copy
   // to a register.
   if (auto *C = llvm::dyn_cast<ConstantRelocatable>(From)) {
     (void)C;
-    return From;
+    Variable *Reg = makeReg(Ty, RegNum);

[Jim Stichnoth, 2015/11/06 00:45:15]

Also add a TODO for a proper implementation.

[rkotlerimgtec, 2015/11/06 00:58:18]

Done.

+    Context.insert(InstFakeDef::create(Func, Reg));
+    return Reg;
   } else if (auto *C32 = llvm::dyn_cast<ConstantInteger32>(From)) {
     uint32_t Value = static_cast<uint32_t>(C32->getValue());
     // Check if the immediate will fit in a Flexible second operand,
     // if a Flexible second operand is allowed. We need to know the exact
     // value, so that rules out relocatable constants.
     // Also try the inverse and use MVN if possible.
     // Do a movw/movt to a register.
     Variable *Reg;
     if (RegNum == Variable::NoRegister)
       Reg = makeReg(Ty, RegNum);
@@ skipping 37 matching lines @@
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.set\tnomicromips\n";
   Str << "\t.set\tnomips16\n";
 }
 
 llvm::SmallBitVector TargetMIPS32::TypeToRegisterSet[IceType_NUM];
 llvm::SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 llvm::SmallBitVector TargetMIPS32::ScratchRegs;
 
 } // end of namespace Ice