Lower a few basic MIPS binops for i{8,16,32,64}.

src/IceTargetLoweringMIPS32.cpp

 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 301 matching lines @@
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Ctx->getStrEmit();
   const Type FrameSPTy = IceType_i32;
   if (Var->hasReg()) {
     Str << '$' << getRegName(Var->getRegNum(), Var->getType());
     return;
   } else {
     int32_t Offset = Var->getStackOffset();
     Str << Offset;
-    Str << "(" << getRegName(getFrameOrStackReg(), FrameSPTy);
+    Str << "($" << getRegName(getFrameOrStackReg(), FrameSPTy);
     Str << ")";
   }
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::lowerArguments() {
   VarList &Args = Func->getArgs();
   // We are only handling integer registers for now. The Mips o32 ABI is
   // somewhat complex but will be implemented in its totality through follow
   // on patches.
@@ skipping 178 matching lines @@
   // cases.
   NeedsStackAlignment = true;
   (void)Inst;
   UnimplementedError(Func->getContext()->getFlags());
 }
 
 void TargetMIPS32::lowerArithmetic(const InstArithmetic *Inst) {
   Variable *Dest = Inst->getDest();
   Operand *Src0 = legalizeUndef(Inst->getSrc(0));
   Operand *Src1 = legalizeUndef(Inst->getSrc(1));
-  (void)Src0;
-  (void)Src1;
   if (Dest->getType() == IceType_i64) {
+    // TODO(reed kotler): fakedef needed for now until all cases are implemented
+    Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
+    Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
+    Context.insert(InstFakeDef::create(Func, DestLo));
+    Context.insert(InstFakeDef::create(Func, DestHi));
     UnimplementedError(Func->getContext()->getFlags());
+    return;
   } else if (isVectorType(Dest->getType())) {

[Jim Stichnoth, 2015/11/04 14:47:24]

Don't use "else if" when the "if" branch ends with a return.  It's easier to
reason about the code that follows.

[rkotlerimgtec, 2015/11/05 01:28:43]

Done.

     UnimplementedError(Func->getContext()->getFlags());
   } else { // Dest->getType() is non-i64 scalar
+    Variable *T = makeReg(Dest->getType());

[Jim Stichnoth, 2015/11/04 14:47:24]

Now is the part where I wish I had learned more about MIPS and ARM instruction
sets.

If I understand correctly, ARM generally allows one source operand of an
arithmetic instruction to be a memory operand, whereas MIPS requires both source
operands to be registers (ignoring immediate operands).

If this is true, then you should do a couple of things.  First, change
InstMIPS32ThreeAddrGPR so that the Src1 operand in its ctor and create() methods
is a Variable*, rather than Operand*.  Second, treat Src1R below similar to
Src0R, e.g.:

  Variable *Src1R = legalizeToReg(Src1);

Note that I'm assuming that the arithmetic instruction variants where the second
source operand is an immediate, are represented as separate instruction types
like in ARM.

[rkotlerimgtec, 2015/11/05 01:28:43]

Done.

+    Variable *Src0R = legalizeToReg(Src0);
+    Operand *Src1R = legalize(Src1, Legal_Reg);
+    // TODO(reed kotler):
+    // fakedef and fakeuse needed for now until all cases are implemented
+    Context.insert(InstFakeUse::create(Func, Src0R));

[Jim Stichnoth, 2015/11/04 14:47:24]

I think the FakeUse and FakeDef instructions should go *after* the switch
statement.

For a fully implemented instruction, like Add, we do the right stuff and return,
and no fake use/def is required.

So after the switch statement, we can set up the fake uses/defs which are now
necessary.

First, add the FakeUses on Src0R and Src1R.  This is necessary because the
legalizeToReg() calls may generate assigments to new infinite-weight
temporaries, and without corresponding uses of those temporaries within the same
basic block, the Om1 register allocator will complain.  (This complaint is not
strictly necessary for correctness, but it is a possible signal of incorrect
lowering, so we keep it.)

Second, add the FakeDef on Dest, and then signal the UnimplementedError.

Then you can fill in the implementations of the other arithmetic instruction
kinds as you go along, and eventually remove the FakeDef, FakeUse, and
UnimplementedError.

[rkotlerimgtec, 2015/11/05 01:28:43]

Done.

+    if (auto *S1 = llvm::dyn_cast<Variable>(Src1R)) {
+      Context.insert(InstFakeUse::create(Func, S1));
+    }
+    Context.insert(InstFakeDef::create(Func, Dest));
     switch (Inst->getOp()) {
     case InstArithmetic::_num:
       UnimplementedError(Func->getContext()->getFlags());
       break;
     case InstArithmetic::Add:
-      UnimplementedError(Func->getContext()->getFlags());
-      // Variable *T = makeReg(Dest->getType());
-      // _add(T, Src0, Src1);
-      // _mov(Dest, T);
+      _add(T, Src0R, Src1R);
+      _mov(Dest, T);
       return;
     case InstArithmetic::And:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
+      _and(T, Src0R, Src1R);
+      _mov(Dest, T);
+      return;
     case InstArithmetic::Or:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
+      _or(T, Src0R, Src1R);
+      _mov(Dest, T);
+      return;
     case InstArithmetic::Xor:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
+      _xor(T, Src0R, Src1R);
+      _mov(Dest, T);
+      return;
     case InstArithmetic::Sub:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
-    case InstArithmetic::Mul:
-      UnimplementedError(Func->getContext()->getFlags());
-      break;
+      _sub(T, Src0R, Src1R);
+      _mov(Dest, T);
+      return;
+    case InstArithmetic::Mul: {
+      Variable *Src1R_ = legalizeToReg(Src1R);

[Jim Stichnoth, 2015/11/04 14:47:24]

If you follow the comment above and declare Src1R as Variable*, then Src1R_ is
unnecessary and you can just use Src1R.

[rkotlerimgtec, 2015/11/05 01:28:43]

Done.

+      _mul(T, Src0R, Src1R_);
+      _mov(Dest, T);
+      return;
+    }
     case InstArithmetic::Shl:
       UnimplementedError(Func->getContext()->getFlags());
       break;
     case InstArithmetic::Lshr:
       UnimplementedError(Func->getContext()->getFlags());
       break;
     case InstArithmetic::Ashr:
       UnimplementedError(Func->getContext()->getFlags());
       break;
     case InstArithmetic::Udiv:
@@ skipping 486 matching lines @@
     : TargetHeaderLowering(Ctx) {}
 
 void TargetHeaderMIPS32::lower() {
   OstreamLocker L(Ctx);
   Ostream &Str = Ctx->getStrEmit();
   Str << "\t.set\tnomicromips\n";
   Str << "\t.set\tnomips16\n";
 }
 
 } // end of namespace Ice