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| 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // | 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
| (...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 107 | 107 |
| 108 /// Base class for Mips instructions. | 108 /// Base class for Mips instructions. |
| 109 class InstMIPS32 : public InstTarget { | 109 class InstMIPS32 : public InstTarget { |
| 110 InstMIPS32() = delete; | 110 InstMIPS32() = delete; |
| 111 InstMIPS32(const InstMIPS32 &) = delete; | 111 InstMIPS32(const InstMIPS32 &) = delete; |
| 112 InstMIPS32 &operator=(const InstMIPS32 &) = delete; | 112 InstMIPS32 &operator=(const InstMIPS32 &) = delete; |
| 113 | 113 |
| 114 public: | 114 public: |
| 115 enum InstKindMIPS32 { | 115 enum InstKindMIPS32 { |
| 116 k__Start = Inst::Target, | 116 k__Start = Inst::Target, |
| 117 Add, | |
| 118 And, | |
| 117 Addiu, | 119 Addiu, |
| 118 La, | 120 La, |
| 119 Lui, | 121 Lui, |
| 120 Mov, // actually a pseudo op for addi rd, rs, 0 | 122 Mov, // actually a pseudo op for addi rd, rs, 0 |
| 123 Mul, | |
| 124 Or, | |
| 121 Ori, | 125 Ori, |
| 122 Ret | 126 Ret, |
| 127 Sub, | |
| 128 Xor | |
| 123 }; | 129 }; |
| 124 | 130 |
| 125 static const char *getWidthString(Type Ty); | 131 static const char *getWidthString(Type Ty); |
| 126 | 132 |
| 127 void dump(const Cfg *Func) const override; | 133 void dump(const Cfg *Func) const override; |
| 128 | 134 |
| 129 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { | 135 void dumpOpcode(Ostream &Str, const char *Opcode, Type Ty) const { |
| 130 Str << Opcode << "." << Ty; | 136 Str << Opcode << "." << Ty; |
| 131 } | 137 } |
| 132 | 138 |
| 133 /// Shared emit routines for common forms of instructions. | 139 /// Shared emit routines for common forms of instructions. |
| 134 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, | 140 static void emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst, |
| 135 const Cfg *Func); | 141 const Cfg *Func); |
| 142 static void emitThreeAddr(const char *Opcode, const InstMIPS32 *Inst, | |
| 143 const Cfg *Func); | |
| 136 | 144 |
| 137 protected: | 145 protected: |
| 138 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) | 146 InstMIPS32(Cfg *Func, InstKindMIPS32 Kind, SizeT Maxsrcs, Variable *Dest) |
| 139 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} | 147 : InstTarget(Func, static_cast<InstKind>(Kind), Maxsrcs, Dest) {} |
| 140 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { | 148 static bool isClassof(const Inst *Inst, InstKindMIPS32 MyKind) { |
| 141 return Inst->getKind() == static_cast<InstKind>(MyKind); | 149 return Inst->getKind() == static_cast<InstKind>(MyKind); |
| 142 } | 150 } |
| 143 }; | 151 }; |
| 144 | 152 |
| 145 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra" | 153 /// Ret pseudo-instruction. This is actually a "jr" instruction with an "ra" |
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| 206 protected: | 214 protected: |
| 207 InstMIPS32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src) | 215 InstMIPS32UnaryopGPR(Cfg *Func, Variable *Dest, Operand *Src) |
| 208 : InstMIPS32(Func, K, 1, Dest) { | 216 : InstMIPS32(Func, K, 1, Dest) { |
| 209 addSource(Src); | 217 addSource(Src); |
| 210 } | 218 } |
| 211 | 219 |
| 212 private: | 220 private: |
| 213 static const char *Opcode; | 221 static const char *Opcode; |
| 214 }; | 222 }; |
| 215 | 223 |
| 224 /// Instructions of the form x := y op z. May have the side-effect of setting | |
| 225 /// status flags. | |
| 226 template <InstMIPS32::InstKindMIPS32 K> | |
| 227 class InstMIPS32ThreeAddrGPR : public InstMIPS32 { | |
| 228 InstMIPS32ThreeAddrGPR() = delete; | |
| 229 InstMIPS32ThreeAddrGPR(const InstMIPS32ThreeAddrGPR &) = delete; | |
| 230 InstMIPS32ThreeAddrGPR &operator=(const InstMIPS32ThreeAddrGPR &) = delete; | |
| 231 | |
| 232 public: | |
| 233 /// Create an ordinary binary-op instruction like add, and sub. Dest and Src1 | |
| 234 /// must be registers. | |
| 235 static InstMIPS32ThreeAddrGPR *create(Cfg *Func, Variable *Dest, | |
| 236 Variable *Src0, Operand *Src1) { | |
| 237 return new (Func->allocate<InstMIPS32ThreeAddrGPR>()) | |
| 238 InstMIPS32ThreeAddrGPR(Func, Dest, Src0, Src1); | |
| 239 } | |
| 240 void emit(const Cfg *Func) const override { | |
| 241 if (!BuildDefs::dump()) | |
| 242 return; | |
| 243 emitThreeAddr(Opcode, this, Func); | |
| 244 } | |
| 245 void emitIAS(const Cfg *Func) const override { | |
| 246 (void)Func; | |
| 247 llvm_unreachable("Not yet implemented"); | |
| 248 } | |
| 249 | |
| 250 void dump(const Cfg *Func) const override { | |
| 251 if (!BuildDefs::dump()) | |
| 252 return; | |
| 253 Ostream &Str = Func->getContext()->getStrDump(); | |
| 254 dumpDest(Func); | |
| 255 Str << " = "; | |
| 256 dumpOpcode(Str, Opcode, getDest()->getType()); | |
| 257 Str << (SetFlags ? ".s " : " "); | |
| 258 dumpSources(Func); | |
| 259 } | |
| 260 static bool classof(const Inst *Inst) { return isClassof(Inst, K); } | |
| 261 | |
| 262 private: | |
| 263 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, | |
| 264 Operand *Src1) | |
| 265 : InstMIPS32(Func, K, 2, Dest) { | |
| 266 addSource(Src0); | |
| 267 addSource(Src1); | |
| 268 } | |
| 269 | |
| 270 static const char *Opcode; | |
| 271 bool SetFlags; | |
|
Jim Stichnoth
2015/11/04 14:47:24
This isn't initialized anywhere. I think it needs
rkotlerimgtec
2015/11/05 01:28:43
This variable is not needed. Was copied from ARM p
| |
| 272 }; | |
| 273 | |
| 216 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false> | 274 template <InstMIPS32::InstKindMIPS32 K, bool Signed = false> |
| 217 class InstMIPS32Imm16 : public InstMIPS32 { | 275 class InstMIPS32Imm16 : public InstMIPS32 { |
| 218 InstMIPS32Imm16() = delete; | 276 InstMIPS32Imm16() = delete; |
| 219 InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete; | 277 InstMIPS32Imm16(const InstMIPS32Imm16 &) = delete; |
| 220 InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete; | 278 InstMIPS32Imm16 &operator=(const InstMIPS32Imm16 &) = delete; |
| 221 | 279 |
| 222 public: | 280 public: |
| 223 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source, | 281 static InstMIPS32Imm16 *create(Cfg *Func, Variable *Dest, Operand *Source, |
| 224 uint32_t Imm) { | 282 uint32_t Imm) { |
| 225 return new (Func->allocate<InstMIPS32Imm16>()) | 283 return new (Func->allocate<InstMIPS32Imm16>()) |
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| 278 } | 336 } |
| 279 | 337 |
| 280 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm) | 338 InstMIPS32Imm16(Cfg *Func, Variable *Dest, uint32_t Imm) |
| 281 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {} | 339 : InstMIPS32(Func, K, 0, Dest), Imm(Imm) {} |
| 282 | 340 |
| 283 static const char *Opcode; | 341 static const char *Opcode; |
| 284 | 342 |
| 285 const uint32_t Imm; | 343 const uint32_t Imm; |
| 286 }; | 344 }; |
| 287 | 345 |
| 288 typedef InstMIPS32Imm16<InstMIPS32::Addiu, true> InstMIPS32Addiu; | 346 using InstMIPS32Add = InstMIPS32ThreeAddrGPR<InstMIPS32::Add>; |
| 289 typedef InstMIPS32Imm16<InstMIPS32::Lui> InstMIPS32Lui; | 347 using InstMIPS32Addiu = InstMIPS32Imm16<InstMIPS32::Addiu, true>; |
| 290 typedef InstMIPS32UnaryopGPR<InstMIPS32::La> InstMIPS32La; | 348 using InstMIPS32And = InstMIPS32ThreeAddrGPR<InstMIPS32::And>; |
| 291 typedef InstMIPS32Imm16<InstMIPS32::Ori> InstMIPS32Ori; | 349 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; |
| 350 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; | |
| 351 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; | |
| 352 using InstMIPS32Or = InstMIPS32ThreeAddrGPR<InstMIPS32::Or>; | |
| 353 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | |
| 354 using InstMIPS32Sub = InstMIPS32ThreeAddrGPR<InstMIPS32::Sub>; | |
| 355 using InstMIPS32Ori = InstMIPS32Imm16<InstMIPS32::Ori>; | |
| 356 using InstMIPS32Xor = InstMIPS32ThreeAddrGPR<InstMIPS32::Xor>; | |
| 292 | 357 |
| 293 /// Handles (some of) vmov's various formats. | 358 /// Handles (some of) vmov's various formats. |
| 294 class InstMIPS32Mov final : public InstMIPS32 { | 359 class InstMIPS32Mov final : public InstMIPS32 { |
| 295 InstMIPS32Mov() = delete; | 360 InstMIPS32Mov() = delete; |
| 296 InstMIPS32Mov(const InstMIPS32Mov &) = delete; | 361 InstMIPS32Mov(const InstMIPS32Mov &) = delete; |
| 297 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; | 362 InstMIPS32Mov &operator=(const InstMIPS32Mov &) = delete; |
| 298 | 363 |
| 299 public: | 364 public: |
| 300 static InstMIPS32Mov *create(Cfg *Func, Variable *Dest, Operand *Src) { | 365 static InstMIPS32Mov *create(Cfg *Func, Variable *Dest, Operand *Src) { |
| 301 return new (Func->allocate<InstMIPS32Mov>()) InstMIPS32Mov(Func, Dest, Src); | 366 return new (Func->allocate<InstMIPS32Mov>()) InstMIPS32Mov(Func, Dest, Src); |
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| 325 void emitMultiDestSingleSource(const Cfg *Func) const; | 390 void emitMultiDestSingleSource(const Cfg *Func) const; |
| 326 void emitSingleDestMultiSource(const Cfg *Func) const; | 391 void emitSingleDestMultiSource(const Cfg *Func) const; |
| 327 void emitSingleDestSingleSource(const Cfg *Func) const; | 392 void emitSingleDestSingleSource(const Cfg *Func) const; |
| 328 | 393 |
| 329 Variable *DestHi = nullptr; | 394 Variable *DestHi = nullptr; |
| 330 }; | 395 }; |
| 331 | 396 |
| 332 } // end of namespace Ice | 397 } // end of namespace Ice |
| 333 | 398 |
| 334 #endif // SUBZERO_SRC_ICEINSTMIPS32_H | 399 #endif // SUBZERO_SRC_ICEINSTMIPS32_H |
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