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Side by Side Diff: src/IceTargetLoweringARM32.h

Issue 1414343010: Sort allocas, compute frame pointer in Cfg pass (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review fixes Created 5 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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74 IceString getRegName(SizeT RegNum, Type Ty) const override; 74 IceString getRegName(SizeT RegNum, Type Ty) const override;
75 llvm::SmallBitVector getRegisterSet(RegSetMask Include, 75 llvm::SmallBitVector getRegisterSet(RegSetMask Include,
76 RegSetMask Exclude) const override; 76 RegSetMask Exclude) const override;
77 const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override { 77 const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override {
78 return TypeToRegisterSet[Ty]; 78 return TypeToRegisterSet[Ty];
79 } 79 }
80 const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override { 80 const llvm::SmallBitVector &getAliasesForRegister(SizeT Reg) const override {
81 return RegisterAliases[Reg]; 81 return RegisterAliases[Reg];
82 } 82 }
83 bool hasFramePointer() const override { return UsesFramePointer; } 83 bool hasFramePointer() const override { return UsesFramePointer; }
84 void setHasFramePointer() override { UsesFramePointer = true; }
84 SizeT getStackReg() const override { return RegARM32::Reg_sp; } 85 SizeT getStackReg() const override { return RegARM32::Reg_sp; }
85 SizeT getFrameOrStackReg() const override { 86 SizeT getFrameOrStackReg() const override {
86 return UsesFramePointer ? RegARM32::Reg_fp : RegARM32::Reg_sp; 87 return UsesFramePointer ? RegARM32::Reg_fp : RegARM32::Reg_sp;
87 } 88 }
88 SizeT getReservedTmpReg() const { return RegARM32::Reg_ip; } 89 SizeT getReservedTmpReg() const { return RegARM32::Reg_ip; }
89 90
90 size_t typeWidthInBytesOnStack(Type Ty) const override { 91 size_t typeWidthInBytesOnStack(Type Ty) const override {
91 // Round up to the next multiple of 4 bytes. In particular, i1, i8, and i16 92 // Round up to the next multiple of 4 bytes. In particular, i1, i8, and i16
92 // are rounded up to 4 bytes. 93 // are rounded up to 4 bytes.
93 return (typeWidthInBytes(Ty) + 3) & ~3; 94 return (typeWidthInBytes(Ty) + 3) & ~3;
94 } 95 }
96 uint32_t getStackAlignment() const override;
95 97
96 bool shouldSplitToVariable64On32(Type Ty) const override { 98 bool shouldSplitToVariable64On32(Type Ty) const override {
97 return Ty == IceType_i64; 99 return Ty == IceType_i64;
98 } 100 }
99 101
100 // TODO(ascull): what size is best for ARM? 102 // TODO(ascull): what size is best for ARM?
101 SizeT getMinJumpTableSize() const override { return 3; } 103 SizeT getMinJumpTableSize() const override { return 3; }
102 void emitJumpTable(const Cfg *Func, 104 void emitJumpTable(const Cfg *Func,
103 const InstJumpTable *JumpTable) const override; 105 const InstJumpTable *JumpTable) const override;
104 106
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707 709
708 private: 710 private:
709 ~TargetHeaderARM32() = default; 711 ~TargetHeaderARM32() = default;
710 712
711 TargetARM32Features CPUFeatures; 713 TargetARM32Features CPUFeatures;
712 }; 714 };
713 715
714 } // end of namespace Ice 716 } // end of namespace Ice
715 717
716 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H 718 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H
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