Index: src/compiler/mips/instruction-selector-mips.cc |
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc |
index 80c356509fee9c00af9c7d17a2bbb5a8fa77541e..79de768d3d209b2af0f0853509da8fc7036f51a5 100644 |
--- a/src/compiler/mips/instruction-selector-mips.cc |
+++ b/src/compiler/mips/instruction-selector-mips.cc |
@@ -178,18 +178,8 @@ void InstructionSelector::VisitStore(Node* node) { |
Node* value = node->InputAt(2); |
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); |
+ WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind(); |
MachineType rep = RepresentationOf(store_rep.machine_type()); |
- if (store_rep.write_barrier_kind() == kFullWriteBarrier) { |
- DCHECK(rep == kRepTagged); |
- // TODO(dcarney): refactor RecordWrite function to take temp registers |
- // and pass them here instead of using fixed regs |
- // TODO(dcarney): handle immediate indices. |
- InstructionOperand temps[] = {g.TempRegister(t1), g.TempRegister(t2)}; |
- Emit(kMipsStoreWriteBarrier, g.NoOutput(), g.UseFixed(base, t0), |
- g.UseFixed(index, t1), g.UseFixed(value, t2), arraysize(temps), temps); |
- return; |
- } |
- DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind()); |
ArchOpcode opcode; |
switch (rep) { |
@@ -226,6 +216,37 @@ void InstructionSelector::VisitStore(Node* node) { |
Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), |
addr_reg, g.TempImmediate(0), g.UseRegister(value)); |
} |
+ |
+ // TODO(mips): I guess this could be done in a better way. |
+ if (write_barrier_kind != kNoWriteBarrier) { |
+ DCHECK_EQ(kRepTagged, rep); |
+ InstructionOperand inputs[3]; |
+ size_t input_count = 0; |
+ inputs[input_count++] = g.UseUniqueRegister(base); |
+ inputs[input_count++] = g.UseUniqueRegister(index); |
+ RecordWriteMode record_write_mode; |
+ switch (write_barrier_kind) { |
+ case kNoWriteBarrier: |
+ UNREACHABLE(); |
+ break; |
+ case kMapWriteBarrier: |
+ record_write_mode = RecordWriteMode::kValueIsMap; |
+ break; |
+ case kPointerWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsPointer; |
+ break; |
+ case kFullWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsAny; |
+ break; |
+ } |
+ InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; |
+ size_t const temp_count = arraysize(temps); |
+ InstructionCode code = kArchRecordWrite; |
+ code |= MiscField::encode(static_cast<int>(record_write_mode)); |
+ Emit(code, 0, nullptr, input_count, inputs, temp_count, temps); |
+ } |
} |