Index: src/compiler/ia32/instruction-selector-ia32.cc |
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc |
index c19a4e0e41ba90885db18339a7b5ac273eb26db0..7e4e34437a8994ea1a38c4f2111dde3477721159 100644 |
--- a/src/compiler/ia32/instruction-selector-ia32.cc |
+++ b/src/compiler/ia32/instruction-selector-ia32.cc |
@@ -215,25 +215,8 @@ void InstructionSelector::VisitStore(Node* node) { |
Node* value = node->InputAt(2); |
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); |
+ WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind(); |
MachineType rep = RepresentationOf(store_rep.machine_type()); |
- if (store_rep.write_barrier_kind() == kFullWriteBarrier) { |
- DCHECK_EQ(kRepTagged, rep); |
- // TODO(dcarney): refactor RecordWrite function to take temp registers |
- // and pass them here instead of using fixed regs |
- if (g.CanBeImmediate(index)) { |
- InstructionOperand temps[] = {g.TempRegister(ecx), g.TempRegister()}; |
- Emit(kIA32StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, ebx), |
- g.UseImmediate(index), g.UseFixed(value, ecx), arraysize(temps), |
- temps); |
- } else { |
- InstructionOperand temps[] = {g.TempRegister(ecx), g.TempRegister(edx)}; |
- Emit(kIA32StoreWriteBarrier, g.NoOutput(), g.UseFixed(base, ebx), |
- g.UseFixed(index, ecx), g.UseFixed(value, edx), arraysize(temps), |
- temps); |
- } |
- return; |
- } |
- DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind()); |
ArchOpcode opcode; |
switch (rep) { |
@@ -260,7 +243,11 @@ void InstructionSelector::VisitStore(Node* node) { |
} |
InstructionOperand val; |
- if (g.CanBeImmediate(value)) { |
+ if (g.CanBeImmediate(value) && write_barrier_kind < kPointerWriteBarrier) { |
+ // It's only beneficial to use an immediate if we don't also need the |
+ // value for the write barrier below; otherwise it's cheaper to just |
+ // load the value into a register once and use that register for both |
+ // the store and the write barrier code. |
val = g.UseImmediate(value); |
} else if (rep == kRepWord8 || rep == kRepBit) { |
val = g.UseByteRegister(value); |
@@ -270,11 +257,47 @@ void InstructionSelector::VisitStore(Node* node) { |
InstructionOperand inputs[4]; |
size_t input_count = 0; |
- AddressingMode mode = |
+ AddressingMode addressing_mode = |
g.GetEffectiveAddressMemoryOperand(node, inputs, &input_count); |
- InstructionCode code = opcode | AddressingModeField::encode(mode); |
+ InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); |
inputs[input_count++] = val; |
Emit(code, 0, static_cast<InstructionOperand*>(NULL), input_count, inputs); |
+ |
+ if (write_barrier_kind != kNoWriteBarrier) { |
+ DCHECK_EQ(kRepTagged, rep); |
+ input_count = 0; |
+ inputs[input_count++] = g.UseUniqueRegister(base); |
+ if (g.CanBeImmediate(index)) { |
+ inputs[input_count++] = g.UseImmediate(index); |
+ addressing_mode = kMode_MRI; |
+ } else { |
+ inputs[input_count++] = g.UseUniqueRegister(index); |
+ addressing_mode = kMode_MR1; |
+ } |
+ RecordWriteMode record_write_mode; |
+ switch (write_barrier_kind) { |
+ case kNoWriteBarrier: |
+ UNREACHABLE(); |
+ break; |
+ case kMapWriteBarrier: |
+ record_write_mode = RecordWriteMode::kValueIsMap; |
+ break; |
+ case kPointerWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsPointer; |
+ break; |
+ case kFullWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsAny; |
+ break; |
+ } |
+ InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; |
+ size_t const temp_count = arraysize(temps); |
+ InstructionCode code = kArchRecordWrite; |
+ code |= AddressingModeField::encode(addressing_mode); |
+ code |= MiscField::encode(static_cast<int>(record_write_mode)); |
+ Emit(code, 0, nullptr, input_count, inputs, temp_count, temps); |
+ } |
} |