Index: src/compiler/arm/instruction-selector-arm.cc |
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc |
index 18b392b6753dd08b87f5cd51ee30a7545e563bb5..aa98e1663905809720316e09a2c715f1c29fd350 100644 |
--- a/src/compiler/arm/instruction-selector-arm.cc |
+++ b/src/compiler/arm/instruction-selector-arm.cc |
@@ -61,7 +61,6 @@ class ArmOperandGenerator : public OperandGenerator { |
case kArmStrb: |
case kArmLdr: |
case kArmStr: |
- case kArmStoreWriteBarrier: |
return value >= -4095 && value <= 4095; |
case kArmLdrh: |
@@ -351,18 +350,8 @@ void InstructionSelector::VisitStore(Node* node) { |
Node* value = node->InputAt(2); |
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); |
+ WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind(); |
MachineType rep = RepresentationOf(store_rep.machine_type()); |
- if (store_rep.write_barrier_kind() == kFullWriteBarrier) { |
- DCHECK(rep == kRepTagged); |
- // TODO(dcarney): refactor RecordWrite function to take temp registers |
- // and pass them here instead of using fixed regs |
- // TODO(dcarney): handle immediate indices. |
- InstructionOperand temps[] = {g.TempRegister(r5), g.TempRegister(r6)}; |
- Emit(kArmStoreWriteBarrier, g.NoOutput(), g.UseFixed(base, r4), |
- g.UseFixed(index, r5), g.UseFixed(value, r6), arraysize(temps), temps); |
- return; |
- } |
- DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind()); |
ArchOpcode opcode; |
switch (rep) { |
@@ -395,6 +384,36 @@ void InstructionSelector::VisitStore(Node* node) { |
Emit(opcode | AddressingModeField::encode(kMode_Offset_RR), g.NoOutput(), |
g.UseRegister(base), g.UseRegister(index), g.UseRegister(value)); |
} |
+ |
+ if (write_barrier_kind != kNoWriteBarrier) { |
+ DCHECK_EQ(kRepTagged, rep); |
+ InstructionOperand inputs[3]; |
+ size_t input_count = 0; |
+ inputs[input_count++] = g.UseUniqueRegister(base); |
+ inputs[input_count++] = g.UseUniqueRegister(index); |
+ RecordWriteMode record_write_mode; |
+ switch (write_barrier_kind) { |
+ case kNoWriteBarrier: |
+ UNREACHABLE(); |
+ break; |
+ case kMapWriteBarrier: |
+ record_write_mode = RecordWriteMode::kValueIsMap; |
+ break; |
+ case kPointerWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsPointer; |
+ break; |
+ case kFullWriteBarrier: |
+ inputs[input_count++] = g.UseUniqueRegister(value); |
+ record_write_mode = RecordWriteMode::kValueIsAny; |
+ break; |
+ } |
+ InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; |
+ size_t const temp_count = arraysize(temps); |
+ InstructionCode code = kArchRecordWrite; |
+ code |= MiscField::encode(static_cast<int>(record_write_mode)); |
+ Emit(code, 0, nullptr, input_count, inputs, temp_count, temps); |
+ } |
} |