[turbofan] Avoid unnecessary write barriers and improve code generation.

src/compiler/x64/instruction-codes-x64.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 105 matching lines @@
   V(X64BitcastFI)                  \
   V(X64BitcastDL)                  \
   V(X64BitcastIF)                  \
   V(X64BitcastLD)                  \
   V(X64Lea32)                      \
   V(X64Lea)                        \
   V(X64Dec32)                      \
   V(X64Inc32)                      \
   V(X64Push)                       \
   V(X64Poke)                       \
-  V(X64StoreWriteBarrier)          \
   V(X64StackCheck)
 
 
 // Addressing modes represent the "shape" of inputs to an instruction.
 // Many instructions support multiple addressing modes. Addressing modes
 // are encoded into the InstructionCode of the instruction and tell the
 // code generator after register allocation which assembler method to call.
 //
 // We use the following local notation for addressing modes:
 //
@@ skipping 20 matching lines @@
   V(M1I)  /* [      %r2*1 + K] */      \
   V(M2I)  /* [      %r2*2 + K] */      \
   V(M4I)  /* [      %r2*4 + K] */      \
   V(M8I)  /* [      %r2*8 + K] */
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_