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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 5 #ifndef V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 6 #define V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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122 V(Arm64StrD) \ | 122 V(Arm64StrD) \ |
123 V(Arm64Ldrb) \ | 123 V(Arm64Ldrb) \ |
124 V(Arm64Ldrsb) \ | 124 V(Arm64Ldrsb) \ |
125 V(Arm64Strb) \ | 125 V(Arm64Strb) \ |
126 V(Arm64Ldrh) \ | 126 V(Arm64Ldrh) \ |
127 V(Arm64Ldrsh) \ | 127 V(Arm64Ldrsh) \ |
128 V(Arm64Strh) \ | 128 V(Arm64Strh) \ |
129 V(Arm64LdrW) \ | 129 V(Arm64LdrW) \ |
130 V(Arm64StrW) \ | 130 V(Arm64StrW) \ |
131 V(Arm64Ldr) \ | 131 V(Arm64Ldr) \ |
132 V(Arm64Str) \ | 132 V(Arm64Str) |
133 V(Arm64StoreWriteBarrier) | |
134 | 133 |
135 | 134 |
136 // Addressing modes represent the "shape" of inputs to an instruction. | 135 // Addressing modes represent the "shape" of inputs to an instruction. |
137 // Many instructions support multiple addressing modes. Addressing modes | 136 // Many instructions support multiple addressing modes. Addressing modes |
138 // are encoded into the InstructionCode of the instruction and tell the | 137 // are encoded into the InstructionCode of the instruction and tell the |
139 // code generator after register allocation which assembler method to call. | 138 // code generator after register allocation which assembler method to call. |
140 // | 139 // |
141 // We use the following local notation for addressing modes: | 140 // We use the following local notation for addressing modes: |
142 // | 141 // |
143 // R = register | 142 // R = register |
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156 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ | 155 V(Operand2_R_UXTB) /* %r0 UXTB (unsigned extend byte) */ \ |
157 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \ | 156 V(Operand2_R_UXTH) /* %r0 UXTH (unsigned extend halfword) */ \ |
158 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \ | 157 V(Operand2_R_SXTB) /* %r0 SXTB (signed extend byte) */ \ |
159 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */ | 158 V(Operand2_R_SXTH) /* %r0 SXTH (signed extend halfword) */ |
160 | 159 |
161 } // namespace compiler | 160 } // namespace compiler |
162 } // namespace internal | 161 } // namespace internal |
163 } // namespace v8 | 162 } // namespace v8 |
164 | 163 |
165 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ | 164 #endif // V8_COMPILER_ARM64_INSTRUCTION_CODES_ARM64_H_ |
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