Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(160)

Side by Side Diff: tests_lit/assembler/arm32/store-sf.ll

Issue 1414043015: Fix frame pointer loads/stores in the ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fix column issue in test case. Created 5 years, 1 month ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« src/IceAssemblerARM32.cpp ('K') | « src/IceTLS.h ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
(Empty)
1 ; Sample program that generates "str reg, [fp, #CCCC]", to show that we
Jim Stichnoth 2015/11/11 20:42:09 This test case seems vastly over-complicated. How
Karl 2015/11/11 22:42:57 Done.
Jim Stichnoth 2015/11/11 23:12:27 Could you add that comment to the function? Speci
2 ; recognize that "fp" should be used instead of "sp".
3
4 ; REQUIRES: allow_dump
5
6 ; Compile using standalone assembler.
7 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -Om1 \
8 ; RUN: -test-stack-extra=4088 | FileCheck %s --check-prefix=ASM
9
10 ; Show bytes in assembled standalone code.
11 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
12 ; RUN: --args -Om1 -test-stack-extra=4088 | FileCheck %s --check-prefix=DIS
13
14 ; Compile using integrated assembler.
15 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -Om1 \
16 ; RUN: -test-stack-extra=4088 -unsafe-ias | FileCheck %s --check-prefix=IASM
17
18 ; Show bytes in assembled integrated code.
19 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
20 ; RUN: --args -Om1 -test-stack-extra=4088 -unsafe-ias \
21 ; RUN: | FileCheck %s --check-prefix=DIS
22
23 declare i8* @llvm.stacksave()
24
25 declare void @llvm.stackrestore(i8*)
26
27 define internal i32 @test_vla_in_loop(i32 %size, i32 %start, i32 %inc) {
28 entry:
29 %cmp34 = icmp ult i32 %start, %size
30 br i1 %cmp34, label %for.body3.lr.ph, label %for.end16
31
32 ; ASM-LABEL: test_vla_in_loop:
33 ; ASM-NEXT: .Ltest_vla_in_loop$entry:
34 ; ASM-NEXT: push {fp, lr}
35 ; ASM: mov fp, sp
36 ; ASM: movw ip, #4248
37 ; ASM-NEXT: sub sp, sp, ip
38 ; ASM-NEXT: str r0, [fp, #-4092]
39
40 ; DIS-LABEL: 00000000 <test_vla_in_loop>:
41 ; DIS-NEXT: 0: e92d4800
42 ; DIS-NEXT: 4: e1a0b00d
43 ; DIS-NEXT: 8: e301c098
44 ; DIS-NEXT: c: e04dd00c
45 ; DIS-NEXT: 10: e50b0ffc
46
47 ; IASM-LABEL: test_vla_in_loop:
48 ; IASM-NEXT: .Ltest_vla_in_loop$entry:
49 ; IASM-NEXT: .byte 0x0
50 ; IASM-NEXT: .byte 0x48
51 ; IASM-NEXT: .byte 0x2d
52 ; IASM-NEXT: .byte 0xe9
53
54 ; IASM-NEXT: .byte 0xd
55 ; IASM-NEXT: .byte 0xb0
56 ; IASM-NEXT: .byte 0xa0
57 ; IASM-NEXT: .byte 0xe1
58
59 ; IASM-NEXT: movw ip, #4248
60 ; IASM-NEXT: .byte 0xc
61 ; IASM-NEXT: .byte 0xd0
62 ; IASM-NEXT: .byte 0x4d
63 ; IASM-NEXT: .byte 0xe0
64
65 ; IASM-NEXT: .byte 0xfc
66 ; IASM-NEXT: .byte 0xf
67 ; IASM-NEXT: .byte 0xb
68 ; IASM-NEXT: .byte 0xe5
69
70 ; NOTE: The remaining code is not tested.
71
72 for.body3.lr.ph: ; preds = %entry, %for.end13
73 %sum.036 = phi i32 [ %add10.lcssa, %for.end13 ], [ 0, %entry ]
74 %i.035 = phi i32 [ %inc15, %for.end13 ], [ %start, %entry ]
75 %sub = sub i32 %size, %i.035
76 %0 = call i8* @llvm.stacksave()
77 %vla.alloca_mul = mul i32 4, %sub
78 %vla = alloca i8, i32 %vla.alloca_mul, align 4
79 %vla.asint = ptrtoint i8* %vla to i32
80 br label %for.body3
81
82
83 for.body3: ; preds = %for.body3.lr.ph, %f or.body3
84 %j.030 = phi i32 [ 0, %for.body3.lr.ph ], [ %inc4, %for.body3 ]
85 %mul = mul i32 %j.030, %start
86 %add = add i32 %mul, %inc
87 %call = call i32 @foo(i32 %add)
88 %gep_array = mul i32 %j.030, 4
89 %gep = add i32 %vla.asint, %gep_array
90 %gep.asptr = inttoptr i32 %gep to i32*
91 store i32 %call, i32* %gep.asptr, align 1
92 %inc4 = add i32 %j.030, 1
93 %cmp2 = icmp ult i32 %inc4, %sub
94 br i1 %cmp2, label %for.body3, label %for.body8
95
96 for.body8: ; preds = %for.body3, %for.bod y8
97 %j5.033 = phi i32 [ %inc12, %for.body8 ], [ 0, %for.body3 ]
98 %sum.132 = phi i32 [ %add10, %for.body8 ], [ %sum.036, %for.body3 ]
99 %gep_array2 = mul i32 %j5.033, 4
100 %gep3 = add i32 %vla.asint, %gep_array2
101 %gep3.asptr = inttoptr i32 %gep3 to i32*
102 %1 = load i32, i32* %gep3.asptr, align 1
103 %add10 = add i32 %1, %sum.132
104 %inc12 = add i32 %j5.033, 1
105 %cmp7 = icmp ult i32 %inc12, %sub
106 br i1 %cmp7, label %for.body8, label %for.end13
107
108 for.end13: ; preds = %for.body8
109 %add10.lcssa = phi i32 [ %add10, %for.body8 ]
110 call void @llvm.stackrestore(i8* %0)
111 %inc15 = add i32 %i.035, 1
112 %exitcond = icmp eq i32 %inc15, %size
113 br i1 %exitcond, label %for.end16, label %for.body3.lr.ph
114
115 for.end16: ; preds = %for.end13, %entry
116 %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add10.lcssa, %for.end13 ]
117 ret i32 %sum.0.lcssa
118 }
119
120 define internal i32 @foo(i32 %x) {
121 entry:
122 %mul = mul i32 %x, %x
123 ret i32 %mul
124 }
OLDNEW
« src/IceAssemblerARM32.cpp ('K') | « src/IceTLS.h ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698