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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
| 6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
| 7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
| 8 | 8 |
| 9 #include "vm/globals.h" // NOLINT | 9 #include "vm/globals.h" // NOLINT |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
| (...skipping 237 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 248 | 248 |
| 249 void Assembler::sbcs(Register rd, Register rn, Operand o, Condition cond) { | 249 void Assembler::sbcs(Register rd, Register rn, Operand o, Condition cond) { |
| 250 EmitType01(cond, o.type(), SBC, 1, rn, rd, o); | 250 EmitType01(cond, o.type(), SBC, 1, rn, rd, o); |
| 251 } | 251 } |
| 252 | 252 |
| 253 | 253 |
| 254 void Assembler::rsc(Register rd, Register rn, Operand o, Condition cond) { | 254 void Assembler::rsc(Register rd, Register rn, Operand o, Condition cond) { |
| 255 EmitType01(cond, o.type(), RSC, 0, rn, rd, o); | 255 EmitType01(cond, o.type(), RSC, 0, rn, rd, o); |
| 256 } | 256 } |
| 257 | 257 |
| 258 | 258 #if 0 |
| 259 // Moved to ARM32::AssemblerARM32::tst() |
| 259 void Assembler::tst(Register rn, Operand o, Condition cond) { | 260 void Assembler::tst(Register rn, Operand o, Condition cond) { |
| 260 EmitType01(cond, o.type(), TST, 1, rn, R0, o); | 261 EmitType01(cond, o.type(), TST, 1, rn, R0, o); |
| 261 } | 262 } |
| 262 | 263 #endif |
| 263 | 264 |
| 264 void Assembler::teq(Register rn, Operand o, Condition cond) { | 265 void Assembler::teq(Register rn, Operand o, Condition cond) { |
| 265 EmitType01(cond, o.type(), TEQ, 1, rn, R0, o); | 266 EmitType01(cond, o.type(), TEQ, 1, rn, R0, o); |
| 266 } | 267 } |
| 267 | 268 |
| 268 | 269 |
| 269 #if 0 | 270 #if 0 |
| 270 // Moved to ARM32::AssemblerARM32::cmp() | 271 // Moved to ARM32::AssemblerARM32::cmp() |
| 271 void Assembler::cmp(Register rn, Operand o, Condition cond) { | 272 void Assembler::cmp(Register rn, Operand o, Condition cond) { |
| 272 EmitType01(cond, o.type(), CMP, 1, rn, R0, o); | 273 EmitType01(cond, o.type(), CMP, 1, rn, R0, o); |
| (...skipping 3407 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3680 | 3681 |
| 3681 | 3682 |
| 3682 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3683 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3683 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3684 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3684 return fpu_reg_names[reg]; | 3685 return fpu_reg_names[reg]; |
| 3685 } | 3686 } |
| 3686 | 3687 |
| 3687 } // namespace dart | 3688 } // namespace dart |
| 3688 | 3689 |
| 3689 #endif // defined TARGET_ARCH_ARM | 3690 #endif // defined TARGET_ARCH_ARM |
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