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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #if V8_TARGET_ARCH_X64 | 5 #if V8_TARGET_ARCH_X64 |
6 | 6 |
7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
(...skipping 3141 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
3152 } | 3152 } |
3153 Label not_zero_src; | 3153 Label not_zero_src; |
3154 bsrl(dst, src); | 3154 bsrl(dst, src); |
3155 j(not_zero, ¬_zero_src, Label::kNear); | 3155 j(not_zero, ¬_zero_src, Label::kNear); |
3156 Set(dst, 63); // 63^31 == 32 | 3156 Set(dst, 63); // 63^31 == 32 |
3157 bind(¬_zero_src); | 3157 bind(¬_zero_src); |
3158 xorl(dst, Immediate(31)); // for x in [0..31], 31^x == 31 - x | 3158 xorl(dst, Immediate(31)); // for x in [0..31], 31^x == 31 - x |
3159 } | 3159 } |
3160 | 3160 |
3161 | 3161 |
| 3162 void MacroAssembler::Lzcntq(Register dst, Register src) { |
| 3163 if (CpuFeatures::IsSupported(LZCNT)) { |
| 3164 CpuFeatureScope scope(this, LZCNT); |
| 3165 lzcntq(dst, src); |
| 3166 return; |
| 3167 } |
| 3168 Label not_zero_src; |
| 3169 bsrq(dst, src); |
| 3170 j(not_zero, ¬_zero_src, Label::kNear); |
| 3171 Set(dst, 127); // 127^63 == 64 |
| 3172 bind(¬_zero_src); |
| 3173 xorl(dst, Immediate(63)); // for x in [0..63], 63^x == 63 - x |
| 3174 } |
| 3175 |
| 3176 |
| 3177 void MacroAssembler::Lzcntq(Register dst, const Operand& src) { |
| 3178 if (CpuFeatures::IsSupported(LZCNT)) { |
| 3179 CpuFeatureScope scope(this, LZCNT); |
| 3180 lzcntq(dst, src); |
| 3181 return; |
| 3182 } |
| 3183 Label not_zero_src; |
| 3184 bsrq(dst, src); |
| 3185 j(not_zero, ¬_zero_src, Label::kNear); |
| 3186 Set(dst, 127); // 127^63 == 64 |
| 3187 bind(¬_zero_src); |
| 3188 xorl(dst, Immediate(63)); // for x in [0..63], 63^x == 63 - x |
| 3189 } |
| 3190 |
| 3191 |
3162 void MacroAssembler::Tzcntl(Register dst, Register src) { | 3192 void MacroAssembler::Tzcntl(Register dst, Register src) { |
3163 if (CpuFeatures::IsSupported(BMI1)) { | 3193 if (CpuFeatures::IsSupported(BMI1)) { |
3164 CpuFeatureScope scope(this, BMI1); | 3194 CpuFeatureScope scope(this, BMI1); |
3165 tzcntl(dst, src); | 3195 tzcntl(dst, src); |
3166 return; | 3196 return; |
3167 } | 3197 } |
3168 Label not_zero_src; | 3198 Label not_zero_src; |
3169 bsfl(dst, src); | 3199 bsfl(dst, src); |
3170 j(not_zero, ¬_zero_src, Label::kNear); | 3200 j(not_zero, ¬_zero_src, Label::kNear); |
3171 Set(dst, 32); // The result of tzcnt is 32 if src = 0. | 3201 Set(dst, 32); // The result of tzcnt is 32 if src = 0. |
(...skipping 2200 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
5372 movl(rax, dividend); | 5402 movl(rax, dividend); |
5373 shrl(rax, Immediate(31)); | 5403 shrl(rax, Immediate(31)); |
5374 addl(rdx, rax); | 5404 addl(rdx, rax); |
5375 } | 5405 } |
5376 | 5406 |
5377 | 5407 |
5378 } // namespace internal | 5408 } // namespace internal |
5379 } // namespace v8 | 5409 } // namespace v8 |
5380 | 5410 |
5381 #endif // V8_TARGET_ARCH_X64 | 5411 #endif // V8_TARGET_ARCH_X64 |
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