[x64] Emit vmovss when AVX is enabled.

src/x64/assembler-x64.h

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 1395 matching lines @@
   }
   void vmaxss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
     vss(0x5f, dst, src1, src2);
   }
   void vminss(XMMRegister dst, XMMRegister src1, XMMRegister src2) {
     vss(0x5d, dst, src1, src2);
   }
   void vminss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
     vss(0x5d, dst, src1, src2);
   }
+  void vmovss(XMMRegister dst, const Operand& src) {
+    vss(0x10, dst, xmm0, src);
+  }
+  void vmovss(const Operand& dst, XMMRegister src) {
+    vss(0x11, src, xmm0, dst);
+  }
   void vucomiss(XMMRegister dst, XMMRegister src);
   void vucomiss(XMMRegister dst, const Operand& src);
   void vss(byte op, XMMRegister dst, XMMRegister src1, XMMRegister src2);
   void vss(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
 
   // BMI instruction
   void andnq(Register dst, Register src1, Register src2) {
     bmi1q(0xf2, dst, src1, src2);
   }
   void andnq(Register dst, Register src1, const Operand& src2) {
@@ skipping 748 matching lines @@
   Assembler* assembler_;
 #ifdef DEBUG
   int space_before_;
 #endif
 };
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // V8_X64_ASSEMBLER_X64_H_