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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 // | 4 // |
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
8 | 8 |
9 #ifndef VM_ASSEMBLER_ARM_H_ | 9 #ifndef VM_ASSEMBLER_ARM_H_ |
10 #define VM_ASSEMBLER_ARM_H_ | 10 #define VM_ASSEMBLER_ARM_H_ |
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568 void ldrsh(Register rd, Address ad, Condition cond = AL); | 568 void ldrsh(Register rd, Address ad, Condition cond = AL); |
569 | 569 |
570 // ldrd and strd actually support the full range of addressing modes, but | 570 // ldrd and strd actually support the full range of addressing modes, but |
571 // we don't use them, and we need to split them up into two instructions for | 571 // we don't use them, and we need to split them up into two instructions for |
572 // ARMv5TE, so we only support the base + offset mode. | 572 // ARMv5TE, so we only support the base + offset mode. |
573 void ldrd(Register rd, Register rn, int32_t offset, Condition cond = AL); | 573 void ldrd(Register rd, Register rn, int32_t offset, Condition cond = AL); |
574 void strd(Register rd, Register rn, int32_t offset, Condition cond = AL); | 574 void strd(Register rd, Register rn, int32_t offset, Condition cond = AL); |
575 | 575 |
576 void ldm(BlockAddressMode am, Register base, | 576 void ldm(BlockAddressMode am, Register base, |
577 RegList regs, Condition cond = AL); | 577 RegList regs, Condition cond = AL); |
| 578 #if 0 |
| 579 // Folded into ARM32::AssemblerARM32::pushList(), since it is its only |
| 580 // use (and doesn't implement ARM STM instruction). |
578 void stm(BlockAddressMode am, Register base, | 581 void stm(BlockAddressMode am, Register base, |
579 RegList regs, Condition cond = AL); | 582 RegList regs, Condition cond = AL); |
| 583 #endif |
580 | 584 |
581 void ldrex(Register rd, Register rn, Condition cond = AL); | 585 void ldrex(Register rd, Register rn, Condition cond = AL); |
582 void strex(Register rd, Register rt, Register rn, Condition cond = AL); | 586 void strex(Register rd, Register rt, Register rn, Condition cond = AL); |
583 | 587 |
584 // Miscellaneous instructions. | 588 // Miscellaneous instructions. |
585 void clrex(); | 589 void clrex(); |
586 void nop(Condition cond = AL); | 590 void nop(Condition cond = AL); |
587 | 591 |
588 #if 0 | 592 #if 0 |
589 // Moved to: ARM32::AssemblerARM32::bkpt() | 593 // Moved to: ARM32::AssemblerARM32::bkpt() |
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919 Register base, | 923 Register base, |
920 int32_t offset); | 924 int32_t offset); |
921 | 925 |
922 void CopyDoubleField(Register dst, Register src, | 926 void CopyDoubleField(Register dst, Register src, |
923 Register tmp1, Register tmp2, DRegister dtmp); | 927 Register tmp1, Register tmp2, DRegister dtmp); |
924 void CopyFloat32x4Field(Register dst, Register src, | 928 void CopyFloat32x4Field(Register dst, Register src, |
925 Register tmp1, Register tmp2, DRegister dtmp); | 929 Register tmp1, Register tmp2, DRegister dtmp); |
926 void CopyFloat64x2Field(Register dst, Register src, | 930 void CopyFloat64x2Field(Register dst, Register src, |
927 Register tmp1, Register tmp2, DRegister dtmp); | 931 Register tmp1, Register tmp2, DRegister dtmp); |
928 | 932 |
| 933 #if 0 |
| 934 // Moved to ARM32::AssemblerARM32::push(). |
929 void Push(Register rd, Condition cond = AL); | 935 void Push(Register rd, Condition cond = AL); |
| 936 #endif |
930 void Pop(Register rd, Condition cond = AL); | 937 void Pop(Register rd, Condition cond = AL); |
931 | 938 |
| 939 #if 0 |
| 940 // Moved to ARM32::AssemblerARM32::pushList(); |
932 void PushList(RegList regs, Condition cond = AL); | 941 void PushList(RegList regs, Condition cond = AL); |
| 942 #endif |
933 void PopList(RegList regs, Condition cond = AL); | 943 void PopList(RegList regs, Condition cond = AL); |
934 | 944 |
935 void MoveRegister(Register rd, Register rm, Condition cond = AL); | 945 void MoveRegister(Register rd, Register rm, Condition cond = AL); |
936 | 946 |
937 // Convenience shift instructions. Use mov instruction with shifter operand | 947 // Convenience shift instructions. Use mov instruction with shifter operand |
938 // for variants setting the status flags. | 948 // for variants setting the status flags. |
939 void Lsl(Register rd, Register rm, const Operand& shift_imm, | 949 void Lsl(Register rd, Register rm, const Operand& shift_imm, |
940 Condition cond = AL); | 950 Condition cond = AL); |
941 void Lsl(Register rd, Register rm, Register rs, Condition cond = AL); | 951 void Lsl(Register rd, Register rm, Register rs, Condition cond = AL); |
942 void Lsr(Register rd, Register rm, const Operand& shift_imm, | 952 void Lsr(Register rd, Register rm, const Operand& shift_imm, |
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1159 bool byte, | 1169 bool byte, |
1160 Register rd, | 1170 Register rd, |
1161 Address ad); | 1171 Address ad); |
1162 #endif | 1172 #endif |
1163 | 1173 |
1164 void EmitMemOpAddressMode3(Condition cond, | 1174 void EmitMemOpAddressMode3(Condition cond, |
1165 int32_t mode, | 1175 int32_t mode, |
1166 Register rd, | 1176 Register rd, |
1167 Address ad); | 1177 Address ad); |
1168 | 1178 |
| 1179 #if 0 |
| 1180 // Moved to ARM32::AssemblerARM32::emitMultiMemOp() |
1169 void EmitMultiMemOp(Condition cond, | 1181 void EmitMultiMemOp(Condition cond, |
1170 BlockAddressMode am, | 1182 BlockAddressMode am, |
1171 bool load, | 1183 bool load, |
1172 Register base, | 1184 Register base, |
1173 RegList regs); | 1185 RegList regs); |
| 1186 #endif |
1174 | 1187 |
1175 void EmitShiftImmediate(Condition cond, | 1188 void EmitShiftImmediate(Condition cond, |
1176 Shift opcode, | 1189 Shift opcode, |
1177 Register rd, | 1190 Register rd, |
1178 Register rm, | 1191 Register rm, |
1179 Operand o); | 1192 Operand o); |
1180 | 1193 |
1181 void EmitShiftRegister(Condition cond, | 1194 void EmitShiftRegister(Condition cond, |
1182 Shift opcode, | 1195 Shift opcode, |
1183 Register rd, | 1196 Register rd, |
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1281 Register new_value, | 1294 Register new_value, |
1282 FieldContent old_content); | 1295 FieldContent old_content); |
1283 | 1296 |
1284 DISALLOW_ALLOCATION(); | 1297 DISALLOW_ALLOCATION(); |
1285 DISALLOW_COPY_AND_ASSIGN(Assembler); | 1298 DISALLOW_COPY_AND_ASSIGN(Assembler); |
1286 }; | 1299 }; |
1287 | 1300 |
1288 } // namespace dart | 1301 } // namespace dart |
1289 | 1302 |
1290 #endif // VM_ASSEMBLER_ARM_H_ | 1303 #endif // VM_ASSEMBLER_ARM_H_ |
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