Add the PUSH instruction to ARM integrated assembler.

src/IceInstARM32.cpp

 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1163 matching lines @@
         if (PrintComma)
           Str << ", ";
         Op->emit(Func);
         PrintComma = true;
       }
     }
     Str << "}\n";
   }
 }
 
+void InstARM32Push::emitIAS(const Cfg *Func) const {
+  SizeT SrcReg = 0;
+  SizeT IntegerCount = 0;
+  ARM32::IValueT GPURegisters = 0;
+  for (SizeT i = 0; i < getSrcSize(); ++i) {
+    if (!isScalarIntegerType(getSrc(i)->getType()))
+      // TODO(kschimpf) Implement vpush.
+      return emitUsingTextFixup(Func);
+    auto *Var = llvm::dyn_cast<Variable>(getSrc(i));
+    assert((Var && Var->hasReg()) && "push only applies to registers");
+    ARM32::IValueT Reg = Var->getRegNum();
+    assert(Reg != static_cast<ARM32::IValueT>(RegARM32::Encoded_Not_GPR));
+    SrcReg = i;
+    GPURegisters |= (1 << Reg);
+    ++IntegerCount;
+  }
+  auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
+  switch (IntegerCount) {
+  case 0:
+    return;
+  case 1: {
+    if (auto *Var = llvm::dyn_cast<Variable>(getSrc(SrcReg))) {
+      // Note: Can only apply push register if single register is not sp.
+      assert((RegARM32::Encoded_Reg_sp != Var->getRegNum()) &&
+             "Effects of push register SP is undefined!");
+      // TODO(kschimpf) ARM sandbox does not allow the single register form of
+      // push, and the pushList form expects multiple registers. Convert this
+      // assert to a conditional check once it has been shown that pushList
+      // works.
+      assert(!Func->getContext()->getFlags().getUseSandboxing() &&
+             "push register not in ARM sandbox!");
+      Asm->push(Var, CondARM32::AL);
+      break;
+    }
+    // Intentionally fall to next case.
+  }
+  default:
+    // TODO(kschimpf) Implement pushList in assembler.
+    Asm->pushList(GPURegisters, CondARM32::AL);
+    break;
+  }
+  if (Asm->needsTextFixup())
+    emitUsingTextFixup(Func);
+}
+
 void InstARM32Push::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "push"
       << " ";
   dumpSources(Func);
 }
 
 void InstARM32Ret::emit(const Cfg *Func) const {
@@ skipping 433 matching lines @@
 template class InstARM32UnaryopGPR<InstARM32::Uxt, true>;
 template class InstARM32UnaryopFP<InstARM32::Vsqrt>;
 
 template class InstARM32FourAddrGPR<InstARM32::Mla>;
 template class InstARM32FourAddrGPR<InstARM32::Mls>;
 
 template class InstARM32CmpLike<InstARM32::Cmp>;
 template class InstARM32CmpLike<InstARM32::Tst>;
 
 } // end of namespace Ice