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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 // | 4 // |
| 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe | 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe |
| 6 // Please update the (git) revision if we merge changes from Dart. | 6 // Please update the (git) revision if we merge changes from Dart. |
| 7 // https://code.google.com/p/dart/wiki/GettingTheSource | 7 // https://code.google.com/p/dart/wiki/GettingTheSource |
| 8 | 8 |
| 9 #include "vm/globals.h" // NOLINT | 9 #include "vm/globals.h" // NOLINT |
| 10 #if defined(TARGET_ARCH_ARM) | 10 #if defined(TARGET_ARCH_ARM) |
| (...skipping 256 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 267 | 267 |
| 268 void Assembler::cmp(Register rn, Operand o, Condition cond) { | 268 void Assembler::cmp(Register rn, Operand o, Condition cond) { |
| 269 EmitType01(cond, o.type(), CMP, 1, rn, R0, o); | 269 EmitType01(cond, o.type(), CMP, 1, rn, R0, o); |
| 270 } | 270 } |
| 271 | 271 |
| 272 | 272 |
| 273 void Assembler::cmn(Register rn, Operand o, Condition cond) { | 273 void Assembler::cmn(Register rn, Operand o, Condition cond) { |
| 274 EmitType01(cond, o.type(), CMN, 1, rn, R0, o); | 274 EmitType01(cond, o.type(), CMN, 1, rn, R0, o); |
| 275 } | 275 } |
| 276 | 276 |
| 277 | 277 #if 0 |
| 278 // Moved to ARM32::AssemberARM32::orr() |
| 278 void Assembler::orr(Register rd, Register rn, Operand o, Condition cond) { | 279 void Assembler::orr(Register rd, Register rn, Operand o, Condition cond) { |
| 279 EmitType01(cond, o.type(), ORR, 0, rn, rd, o); | 280 EmitType01(cond, o.type(), ORR, 0, rn, rd, o); |
| 280 } | 281 } |
| 281 | 282 |
| 282 | 283 // Moved to ARM32::AssemberARM32::orr() |
| 283 void Assembler::orrs(Register rd, Register rn, Operand o, Condition cond) { | 284 void Assembler::orrs(Register rd, Register rn, Operand o, Condition cond) { |
| 284 EmitType01(cond, o.type(), ORR, 1, rn, rd, o); | 285 EmitType01(cond, o.type(), ORR, 1, rn, rd, o); |
| 285 } | 286 } |
| 286 | 287 |
| 287 | 288 // Moved to AssemblerARM32::mov() |
| 288 #if 0 | |
| 289 // Moved to AssemblerARM32::mov(..FlexImm..) | |
| 290 // TODO(kschimpf) other forms of move. | 289 // TODO(kschimpf) other forms of move. |
| 291 void Assembler::mov(Register rd, Operand o, Condition cond) { | 290 void Assembler::mov(Register rd, Operand o, Condition cond) { |
| 292 EmitType01(cond, o.type(), MOV, 0, R0, rd, o); | 291 EmitType01(cond, o.type(), MOV, 0, R0, rd, o); |
| 293 } | 292 } |
| 294 #endif | 293 #endif |
| 295 | 294 |
| 296 void Assembler::movs(Register rd, Operand o, Condition cond) { | 295 void Assembler::movs(Register rd, Operand o, Condition cond) { |
| 297 EmitType01(cond, o.type(), MOV, 1, R0, rd, o); | 296 EmitType01(cond, o.type(), MOV, 1, R0, rd, o); |
| 298 } | 297 } |
| 299 | 298 |
| (...skipping 3374 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 3674 | 3673 |
| 3675 | 3674 |
| 3676 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3675 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3677 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3676 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3678 return fpu_reg_names[reg]; | 3677 return fpu_reg_names[reg]; |
| 3679 } | 3678 } |
| 3680 | 3679 |
| 3681 } // namespace dart | 3680 } // namespace dart |
| 3682 | 3681 |
| 3683 #endif // defined TARGET_ARCH_ARM | 3682 #endif // defined TARGET_ARCH_ARM |
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