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Issue 1412923006: Add orr (register) and orr (immediate) to ARM integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe 5 // This is forked from Dart revision df52deea9f25690eb8b66c5995da92b70f7ac1fe
6 // Please update the (git) revision if we merge changes from Dart. 6 // Please update the (git) revision if we merge changes from Dart.
7 // https://code.google.com/p/dart/wiki/GettingTheSource 7 // https://code.google.com/p/dart/wiki/GettingTheSource
8 8
9 #include "vm/globals.h" // NOLINT 9 #include "vm/globals.h" // NOLINT
10 #if defined(TARGET_ARCH_ARM) 10 #if defined(TARGET_ARCH_ARM)
(...skipping 254 matching lines...) Expand 10 before | Expand all | Expand 10 after
265 265
266 void Assembler::cmp(Register rn, Operand o, Condition cond) { 266 void Assembler::cmp(Register rn, Operand o, Condition cond) {
267 EmitType01(cond, o.type(), CMP, 1, rn, R0, o); 267 EmitType01(cond, o.type(), CMP, 1, rn, R0, o);
268 } 268 }
269 269
270 270
271 void Assembler::cmn(Register rn, Operand o, Condition cond) { 271 void Assembler::cmn(Register rn, Operand o, Condition cond) {
272 EmitType01(cond, o.type(), CMN, 1, rn, R0, o); 272 EmitType01(cond, o.type(), CMN, 1, rn, R0, o);
273 } 273 }
274 274
275 275 #if 0
276 // Moved to ARM32::AssemberARM32::orr()
276 void Assembler::orr(Register rd, Register rn, Operand o, Condition cond) { 277 void Assembler::orr(Register rd, Register rn, Operand o, Condition cond) {
277 EmitType01(cond, o.type(), ORR, 0, rn, rd, o); 278 EmitType01(cond, o.type(), ORR, 0, rn, rd, o);
278 } 279 }
279 280
280 281 // Moved to ARM32::AssemberARM32::orr()
281 void Assembler::orrs(Register rd, Register rn, Operand o, Condition cond) { 282 void Assembler::orrs(Register rd, Register rn, Operand o, Condition cond) {
282 EmitType01(cond, o.type(), ORR, 1, rn, rd, o); 283 EmitType01(cond, o.type(), ORR, 1, rn, rd, o);
283 } 284 }
284 285
285
286 #if 0
287 // Moved to AssemblerARM32::mov(..FlexImm..) 286 // Moved to AssemblerARM32::mov(..FlexImm..)
Jim Stichnoth 2015/10/29 22:21:52 Change this comment like you did in the .h file?
Karl 2015/10/30 14:42:25 Done.
288 // TODO(kschimpf) other forms of move. 287 // TODO(kschimpf) other forms of move.
289 void Assembler::mov(Register rd, Operand o, Condition cond) { 288 void Assembler::mov(Register rd, Operand o, Condition cond) {
290 EmitType01(cond, o.type(), MOV, 0, R0, rd, o); 289 EmitType01(cond, o.type(), MOV, 0, R0, rd, o);
291 } 290 }
292 #endif 291 #endif
293 292
294 void Assembler::movs(Register rd, Operand o, Condition cond) { 293 void Assembler::movs(Register rd, Operand o, Condition cond) {
295 EmitType01(cond, o.type(), MOV, 1, R0, rd, o); 294 EmitType01(cond, o.type(), MOV, 1, R0, rd, o);
296 } 295 }
297 296
(...skipping 3369 matching lines...) Expand 10 before | Expand all | Expand 10 after
3667 3666
3668 3667
3669 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3668 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3670 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3669 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3671 return fpu_reg_names[reg]; 3670 return fpu_reg_names[reg];
3672 } 3671 }
3673 3672
3674 } // namespace dart 3673 } // namespace dart
3675 3674
3676 #endif // defined TARGET_ARCH_ARM 3675 #endif // defined TARGET_ARCH_ARM
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