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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #if V8_TARGET_ARCH_X64 | 5 #if V8_TARGET_ARCH_X64 |
6 | 6 |
7 #include "src/base/bits.h" | 7 #include "src/base/bits.h" |
8 #include "src/base/division-by-constant.h" | 8 #include "src/base/division-by-constant.h" |
9 #include "src/bootstrapper.h" | 9 #include "src/bootstrapper.h" |
10 #include "src/codegen.h" | 10 #include "src/codegen.h" |
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780 } | 780 } |
781 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) { | 781 for (int i = kNumberOfSavedRegs - 1; i >= 0; i--) { |
782 Register reg = saved_regs[i]; | 782 Register reg = saved_regs[i]; |
783 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { | 783 if (!reg.is(exclusion1) && !reg.is(exclusion2) && !reg.is(exclusion3)) { |
784 popq(reg); | 784 popq(reg); |
785 } | 785 } |
786 } | 786 } |
787 } | 787 } |
788 | 788 |
789 | 789 |
| 790 void MacroAssembler::Cvtss2sd(XMMRegister dst, XMMRegister src) { |
| 791 if (CpuFeatures::IsSupported(AVX)) { |
| 792 CpuFeatureScope scope(this, AVX); |
| 793 vcvtss2sd(dst, src, src); |
| 794 } else { |
| 795 cvtss2sd(dst, src); |
| 796 } |
| 797 } |
| 798 |
| 799 |
| 800 void MacroAssembler::Cvtss2sd(XMMRegister dst, const Operand& src) { |
| 801 if (CpuFeatures::IsSupported(AVX)) { |
| 802 CpuFeatureScope scope(this, AVX); |
| 803 vcvtss2sd(dst, dst, src); |
| 804 } else { |
| 805 cvtss2sd(dst, src); |
| 806 } |
| 807 } |
| 808 |
| 809 |
| 810 void MacroAssembler::Cvtsd2ss(XMMRegister dst, XMMRegister src) { |
| 811 if (CpuFeatures::IsSupported(AVX)) { |
| 812 CpuFeatureScope scope(this, AVX); |
| 813 vcvtsd2ss(dst, src, src); |
| 814 } else { |
| 815 cvtsd2ss(dst, src); |
| 816 } |
| 817 } |
| 818 |
| 819 |
| 820 void MacroAssembler::Cvtsd2ss(XMMRegister dst, const Operand& src) { |
| 821 if (CpuFeatures::IsSupported(AVX)) { |
| 822 CpuFeatureScope scope(this, AVX); |
| 823 vcvtsd2ss(dst, dst, src); |
| 824 } else { |
| 825 cvtsd2ss(dst, src); |
| 826 } |
| 827 } |
| 828 |
| 829 |
790 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, Register src) { | 830 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, Register src) { |
791 if (CpuFeatures::IsSupported(AVX)) { | 831 if (CpuFeatures::IsSupported(AVX)) { |
792 CpuFeatureScope scope(this, AVX); | 832 CpuFeatureScope scope(this, AVX); |
793 vxorpd(dst, dst, dst); | 833 vxorpd(dst, dst, dst); |
794 vcvtlsi2sd(dst, dst, src); | 834 vcvtlsi2sd(dst, dst, src); |
795 } else { | 835 } else { |
796 xorpd(dst, dst); | 836 xorpd(dst, dst); |
797 cvtlsi2sd(dst, src); | 837 cvtlsi2sd(dst, src); |
798 } | 838 } |
799 } | 839 } |
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5201 movl(rax, dividend); | 5241 movl(rax, dividend); |
5202 shrl(rax, Immediate(31)); | 5242 shrl(rax, Immediate(31)); |
5203 addl(rdx, rax); | 5243 addl(rdx, rax); |
5204 } | 5244 } |
5205 | 5245 |
5206 | 5246 |
5207 } // namespace internal | 5247 } // namespace internal |
5208 } // namespace v8 | 5248 } // namespace v8 |
5209 | 5249 |
5210 #endif // V8_TARGET_ARCH_X64 | 5250 #endif // V8_TARGET_ARCH_X64 |
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